llvm.org GIT mirror llvm / 5e2cbc1
Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!) Place the immediate to OR into a register so that it works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141319 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 8 years ago
1 changed file(s) with 12 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
56125612 // Incoming value: jbuf
56135613 // ldr.n r1, LCPI1_4
56145614 // add r1, pc
5615 // orr r1, r1, #1
5615 // mov r2, #1
5616 // orrs r1, r2
56165617 // add r2, $jbuf, #+4 ; &jbuf[1]
56175618 // str r1, [r2]
56185619 unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
56255626 .addImm(PCLabelId);
56265627 // Set the low bit because of thumb mode.
56275628 unsigned NewVReg3 = MRI->createVirtualRegister(TRC);
5628 AddDefaultCC(
5629 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg3)
5630 .addReg(NewVReg2, RegState::Kill)
5631 .addImm(0x01)));
5629 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tMOVi8), NewVReg3)
5630 .addReg(ARM::CPSR, RegState::Define)
5631 .addImm(1));
56325632 unsigned NewVReg4 = MRI->createVirtualRegister(TRC);
5633 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tADDrSPi), NewVReg4)
5633 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tORR), NewVReg4)
5634 .addReg(ARM::CPSR, RegState::Define)
5635 .addReg(NewVReg2, RegState::Kill)
5636 .addReg(NewVReg3, RegState::Kill));
5637 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
5638 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tADDrSPi), NewVReg5)
56345639 .addFrameIndex(FI)
56355640 .addImm(36)); // &jbuf[1] :: pc
56365641 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi))
5637 .addReg(NewVReg3, RegState::Kill)
56385642 .addReg(NewVReg4, RegState::Kill)
5643 .addReg(NewVReg5, RegState::Kill)
56395644 .addImm(0)
56405645 .addMemOperand(FIMMO));
56415646 } else {