llvm.org GIT mirror llvm / 5e15259
Make code layout more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9426 91177308-0d34-0410-b5e6-96231b3b80d8 Misha Brukman 17 years ago
6 changed file(s) with 566 addition(s) and 684 deletion(s). Raw diff Collapse all Expand all
1818 //
1919 //===----------------------------------------------------------------------===//
2020
21 #include "llvm/CodeGen/InstrForest.h"
22 #include "llvm/CodeGen/MachineCodeForInstruction.h"
21 #include "llvm/Constant.h"
2322 #include "llvm/Function.h"
2423 #include "llvm/iTerminators.h"
2524 #include "llvm/iMemory.h"
26 #include "llvm/Constant.h"
2725 #include "llvm/Type.h"
26 #include "llvm/CodeGen/InstrForest.h"
27 #include "llvm/CodeGen/MachineCodeForInstruction.h"
2828 #include "llvm/CodeGen/MachineInstr.h"
2929 #include "Support/STLExtras.h"
3030 #include "Config/alloca.h"
3434 //------------------------------------------------------------------------
3535
3636 void
37 InstrTreeNode::dump(int dumpChildren, int indent) const
38 {
37 InstrTreeNode::dump(int dumpChildren, int indent) const {
3938 dumpNode(indent);
4039
41 if (dumpChildren)
42 {
43 if (LeftChild)
44 LeftChild->dump(dumpChildren, indent+1);
45 if (RightChild)
46 RightChild->dump(dumpChildren, indent+1);
47 }
40 if (dumpChildren) {
41 if (LeftChild)
42 LeftChild->dump(dumpChildren, indent+1);
43 if (RightChild)
44 RightChild->dump(dumpChildren, indent+1);
45 }
4846 }
4947
5048
5149 InstructionNode::InstructionNode(Instruction* I)
52 : InstrTreeNode(NTInstructionNode, I),
53 codeIsFoldedIntoParent(false)
50 : InstrTreeNode(NTInstructionNode, I), codeIsFoldedIntoParent(false)
5451 {
5552 opLabel = I->getOpcode();
5653
5754 // Distinguish special cases of some instructions such as Ret and Br
5855 //
59 if (opLabel == Instruction::Ret && cast(I)->getReturnValue())
56 if (opLabel == Instruction::Ret && cast(I)->getReturnValue()) {
57 opLabel = RetValueOp; // ret(value) operation
58 }
59 else if (opLabel ==Instruction::Br && !cast(I)->isUnconditional())
60 {
61 opLabel = BrCondOp; // br(cond) operation
62 } else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT) {
63 opLabel = SetCCOp; // common label for all SetCC ops
64 } else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0) {
65 opLabel = AllocaN; // Alloca(ptr, N) operation
66 } else if (opLabel == Instruction::GetElementPtr &&
67 cast(I)->hasIndices()) {
68 opLabel = opLabel + 100; // getElem with index vector
69 } else if (opLabel == Instruction::Xor &&
70 BinaryOperator::isNot(I)) {
71 opLabel = (I->getType() == Type::BoolTy)? NotOp // boolean Not operator
72 : BNotOp; // bitwise Not operator
73 } else if (opLabel == Instruction::And || opLabel == Instruction::Or ||
74 opLabel == Instruction::Xor) {
75 // Distinguish bitwise operators from logical operators!
76 if (I->getType() != Type::BoolTy)
77 opLabel = opLabel + 100; // bitwise operator
78 } else if (opLabel == Instruction::Cast) {
79 const Type *ITy = I->getType();
80 switch(ITy->getPrimitiveID())
6081 {
61 opLabel = RetValueOp; // ret(value) operation
82 case Type::BoolTyID: opLabel = ToBoolTy; break;
83 case Type::UByteTyID: opLabel = ToUByteTy; break;
84 case Type::SByteTyID: opLabel = ToSByteTy; break;
85 case Type::UShortTyID: opLabel = ToUShortTy; break;
86 case Type::ShortTyID: opLabel = ToShortTy; break;
87 case Type::UIntTyID: opLabel = ToUIntTy; break;
88 case Type::IntTyID: opLabel = ToIntTy; break;
89 case Type::ULongTyID: opLabel = ToULongTy; break;
90 case Type::LongTyID: opLabel = ToLongTy; break;
91 case Type::FloatTyID: opLabel = ToFloatTy; break;
92 case Type::DoubleTyID: opLabel = ToDoubleTy; break;
93 case Type::ArrayTyID: opLabel = ToArrayTy; break;
94 case Type::PointerTyID: opLabel = ToPointerTy; break;
95 default:
96 // Just use `Cast' opcode otherwise. It's probably ignored.
97 break;
6298 }
63 else if (opLabel ==Instruction::Br && !cast(I)->isUnconditional())
64 {
65 opLabel = BrCondOp; // br(cond) operation
66 }
67 else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT)
68 {
69 opLabel = SetCCOp; // common label for all SetCC ops
70 }
71 else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0)
72 {
73 opLabel = AllocaN; // Alloca(ptr, N) operation
74 }
75 else if (opLabel == Instruction::GetElementPtr &&
76 cast(I)->hasIndices())
77 {
78 opLabel = opLabel + 100; // getElem with index vector
79 }
80 else if (opLabel == Instruction::Xor &&
81 BinaryOperator::isNot(I))
82 {
83 opLabel = (I->getType() == Type::BoolTy)? NotOp // boolean Not operator
84 : BNotOp; // bitwise Not operator
85 }
86 else if (opLabel == Instruction::And ||
87 opLabel == Instruction::Or ||
88 opLabel == Instruction::Xor)
89 {
90 // Distinguish bitwise operators from logical operators!
91 if (I->getType() != Type::BoolTy)
92 opLabel = opLabel + 100; // bitwise operator
93 }
94 else if (opLabel == Instruction::Cast)
95 {
96 const Type *ITy = I->getType();
97 switch(ITy->getPrimitiveID())
98 {
99 case Type::BoolTyID: opLabel = ToBoolTy; break;
100 case Type::UByteTyID: opLabel = ToUByteTy; break;
101 case Type::SByteTyID: opLabel = ToSByteTy; break;
102 case Type::UShortTyID: opLabel = ToUShortTy; break;
103 case Type::ShortTyID: opLabel = ToShortTy; break;
104 case Type::UIntTyID: opLabel = ToUIntTy; break;
105 case Type::IntTyID: opLabel = ToIntTy; break;
106 case Type::ULongTyID: opLabel = ToULongTy; break;
107 case Type::LongTyID: opLabel = ToLongTy; break;
108 case Type::FloatTyID: opLabel = ToFloatTy; break;
109 case Type::DoubleTyID: opLabel = ToDoubleTy; break;
110 case Type::ArrayTyID: opLabel = ToArrayTy; break;
111 case Type::PointerTyID: opLabel = ToPointerTy; break;
112 default:
113 // Just use `Cast' opcode otherwise. It's probably ignored.
114 break;
115 }
116 }
117 }
118
119
120 void
121 InstructionNode::dumpNode(int indent) const
122 {
99 }
100 }
101
102
103 void
104 InstructionNode::dumpNode(int indent) const {
123105 for (int i=0; i < indent; i++)
124106 std::cerr << " ";
125107 std::cerr << getInstruction()->getOpcodeName()
126108 << " [label " << getOpLabel() << "]" << "\n";
127109 }
128110
129
130 void
131 VRegListNode::dumpNode(int indent) const
132 {
111 void
112 VRegListNode::dumpNode(int indent) const {
133113 for (int i=0; i < indent; i++)
134114 std::cerr << " ";
135115
138118
139119
140120 void
141 VRegNode::dumpNode(int indent) const
142 {
121 VRegNode::dumpNode(int indent) const {
143122 for (int i=0; i < indent; i++)
144123 std::cerr << " ";
145124
148127 }
149128
150129 void
151 ConstantNode::dumpNode(int indent) const
152 {
130 ConstantNode::dumpNode(int indent) const {
153131 for (int i=0; i < indent; i++)
154132 std::cerr << " ";
155133
157135 << (int) getValue()->getValueType() << ")" << "\n";
158136 }
159137
160 void
161 LabelNode::dumpNode(int indent) const
162 {
138 void LabelNode::dumpNode(int indent) const {
163139 for (int i=0; i < indent; i++)
164140 std::cerr << " ";
165141
172148 // A forest of instruction trees, usually for a single method.
173149 //------------------------------------------------------------------------
174150
175 InstrForest::InstrForest(Function *F)
176 {
151 InstrForest::InstrForest(Function *F) {
177152 for (Function::iterator BB = F->begin(), FE = F->end(); BB != FE; ++BB) {
178153 for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
179154 buildTreeForInstruction(I);
180155 }
181156 }
182157
183 InstrForest::~InstrForest()
184 {
158 InstrForest::~InstrForest() {
185159 for_each(treeRoots.begin(), treeRoots.end(), deleter);
186160 }
187161
188 void
189 InstrForest::dump() const
190 {
162 void InstrForest::dump() const {
191163 for (const_root_iterator I = roots_begin(); I != roots_end(); ++I)
192164 (*I)->dump(/*dumpChildren*/ 1, /*indent*/ 0);
193165 }
194166
195 inline void
196 InstrForest::eraseRoot(InstructionNode* node)
197 {
167 inline void InstrForest::eraseRoot(InstructionNode* node) {
198168 for (RootSet::reverse_iterator RI=treeRoots.rbegin(), RE=treeRoots.rend();
199169 RI != RE; ++RI)
200170 if (*RI == node)
201171 treeRoots.erase(RI.base()-1);
202172 }
203173
204 inline void
205 InstrForest::noteTreeNodeForInstr(Instruction *instr,
206 InstructionNode *treeNode)
207 {
174 inline void InstrForest::noteTreeNodeForInstr(Instruction *instr,
175 InstructionNode *treeNode) {
208176 (*this)[instr] = treeNode;
209177 treeRoots.push_back(treeNode); // mark node as root of a new tree
210178 }
211179
212180
213 inline void
214 InstrForest::setLeftChild(InstrTreeNode *parent, InstrTreeNode *child)
215 {
181 inline void InstrForest::setLeftChild(InstrTreeNode *parent,
182 InstrTreeNode *child) {
216183 parent->LeftChild = child;
217184 child->Parent = parent;
218185 if (InstructionNode* instrNode = dyn_cast(child))
219186 eraseRoot(instrNode); // no longer a tree root
220187 }
221188
222 inline void
223 InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child)
224 {
189 inline void InstrForest::setRightChild(InstrTreeNode *parent,
190 InstrTreeNode *child) {
225191 parent->RightChild = child;
226192 child->Parent = parent;
227193 if (InstructionNode* instrNode = dyn_cast(child))
229195 }
230196
231197
232 InstructionNode*
233 InstrForest::buildTreeForInstruction(Instruction *instr)
234 {
198 InstructionNode* InstrForest::buildTreeForInstruction(Instruction *instr) {
235199 InstructionNode *treeNode = getTreeNodeForInstr(instr);
236 if (treeNode)
237 {
238 // treeNode has already been constructed for this instruction
239 assert(treeNode->getInstruction() == instr);
240 return treeNode;
241 }
200 if (treeNode) {
201 // treeNode has already been constructed for this instruction
202 assert(treeNode->getInstruction() == instr);
203 return treeNode;
204 }
242205
243206 // Otherwise, create a new tree node for this instruction.
244207 //
245208 treeNode = new InstructionNode(instr);
246209 noteTreeNodeForInstr(instr, treeNode);
247210
248 if (instr->getOpcode() == Instruction::Call)
249 { // Operands of call instruction
250 return treeNode;
251 }
211 if (instr->getOpcode() == Instruction::Call) {
212 // Operands of call instruction
213 return treeNode;
214 }
252215
253216 // If the instruction has more than 2 instruction operands,
254217 // then we need to create artificial list nodes to hold them.
284247 if (includeAddressOperand || isa(operand) ||
285248 isa(operand) || isa(operand) ||
286249 isa(operand))
287 {
288 // This operand is a data value
250 {
251 // This operand is a data value
289252
290 // An instruction that computes the incoming value is added as a
291 // child of the current instruction if:
292 // the value has only a single use
293 // AND both instructions are in the same basic block.
294 // AND the current instruction is not a PHI (because the incoming
295 // value is conceptually in a predecessor block,
296 // even though it may be in the same static block)
297 //
298 // (Note that if the value has only a single use (viz., `instr'),
299 // the def of the value can be safely moved just before instr
300 // and therefore it is safe to combine these two instructions.)
301 //
302 // In all other cases, the virtual register holding the value
303 // is used directly, i.e., made a child of the instruction node.
304 //
305 InstrTreeNode* opTreeNode;
306 if (isa(operand) && operand->hasOneUse() &&
307 cast(operand)->getParent() == instr->getParent() &&
308 instr->getOpcode() != Instruction::PHI &&
309 instr->getOpcode() != Instruction::Call)
310 {
311 // Recursively create a treeNode for it.
312 opTreeNode = buildTreeForInstruction((Instruction*)operand);
313 }
314 else if (Constant *CPV = dyn_cast(operand))
315 {
316 // Create a leaf node for a constant
317 opTreeNode = new ConstantNode(CPV);
318 }
319 else
320 {
321 // Create a leaf node for the virtual register
322 opTreeNode = new VRegNode(operand);
323 }
324
325 childArray[numChildren++] = opTreeNode;
326 }
253 // An instruction that computes the incoming value is added as a
254 // child of the current instruction if:
255 // the value has only a single use
256 // AND both instructions are in the same basic block.
257 // AND the current instruction is not a PHI (because the incoming
258 // value is conceptually in a predecessor block,
259 // even though it may be in the same static block)
260 //
261 // (Note that if the value has only a single use (viz., `instr'),
262 // the def of the value can be safely moved just before instr
263 // and therefore it is safe to combine these two instructions.)
264 //
265 // In all other cases, the virtual register holding the value
266 // is used directly, i.e., made a child of the instruction node.
267 //
268 InstrTreeNode* opTreeNode;
269 if (isa(operand) && operand->hasOneUse() &&
270 cast(operand)->getParent() == instr->getParent() &&
271 instr->getOpcode() != Instruction::PHI &&
272 instr->getOpcode() != Instruction::Call)
273 {
274 // Recursively create a treeNode for it.
275 opTreeNode = buildTreeForInstruction((Instruction*)operand);
276 } else if (Constant *CPV = dyn_cast(operand)) {
277 // Create a leaf node for a constant
278 opTreeNode = new ConstantNode(CPV);
279 } else {
280 // Create a leaf node for the virtual register
281 opTreeNode = new VRegNode(operand);
282 }
283
284 childArray[numChildren++] = opTreeNode;
285 }
327286 }
328287
329288 //--------------------------------------------------------------------
337296
338297 InstrTreeNode *parent = treeNode;
339298
340 if (numChildren > 2)
341 {
342 unsigned instrOpcode = treeNode->getInstruction()->getOpcode();
343 assert(instrOpcode == Instruction::PHI ||
344 instrOpcode == Instruction::Call ||
345 instrOpcode == Instruction::Load ||
346 instrOpcode == Instruction::Store ||
347 instrOpcode == Instruction::GetElementPtr);
348 }
299 if (numChildren > 2) {
300 unsigned instrOpcode = treeNode->getInstruction()->getOpcode();
301 assert(instrOpcode == Instruction::PHI ||
302 instrOpcode == Instruction::Call ||
303 instrOpcode == Instruction::Load ||
304 instrOpcode == Instruction::Store ||
305 instrOpcode == Instruction::GetElementPtr);
306 }
349307
350308 // Insert the first child as a direct child
351309 if (numChildren >= 1)
354312 int n;
355313
356314 // Create a list node for children 2 .. N-1, if any
357 for (n = numChildren-1; n >= 2; n--)
358 {
359 // We have more than two children
360 InstrTreeNode *listNode = new VRegListNode();
361 setRightChild(parent, listNode);
362 setLeftChild(listNode, childArray[numChildren - n]);
363 parent = listNode;
364 }
315 for (n = numChildren-1; n >= 2; n--) {
316 // We have more than two children
317 InstrTreeNode *listNode = new VRegListNode();
318 setRightChild(parent, listNode);
319 setLeftChild(listNode, childArray[numChildren - n]);
320 parent = listNode;
321 }
365322
366323 // Now insert the last remaining child (if any).
367 if (numChildren >= 2)
368 {
369 assert(n == 1);
370 setRightChild(parent, childArray[numChildren - 1]);
371 }
324 if (numChildren >= 2) {
325 assert(n == 1);
326 setRightChild(parent, childArray[numChildren - 1]);
327 }
372328
373329 delete [] childArray;
374330 return treeNode;
1313 //
1414 //===----------------------------------------------------------------------===//
1515
16 #include "llvm/CodeGen/InstrSelection.h"
17 #include "llvm/CodeGen/InstrSelectionSupport.h"
18 #include "llvm/CodeGen/InstrForest.h"
19 #include "llvm/CodeGen/MachineCodeForInstruction.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/Target/TargetRegInfo.h"
22 #include "llvm/Target/TargetMachine.h"
2316 #include "llvm/Function.h"
2417 #include "llvm/iPHINode.h"
2518 #include "llvm/Pass.h"
19 #include "llvm/CodeGen/InstrForest.h"
20 #include "llvm/CodeGen/InstrSelection.h"
21 #include "llvm/CodeGen/InstrSelectionSupport.h"
22 #include "llvm/CodeGen/MachineCodeForInstruction.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegInfo.h"
2626 #include "Support/CommandLine.h"
2727 #include "Support/LeakDetector.h"
28 using std::vector;
28 #include
2929
3030 std::vector
3131 FixConstantOperandsForInstr(Instruction* vmInstr, MachineInstr* minstr,
6565 TargetMachine &Target;
6666 void InsertCodeForPhis(Function &F);
6767 void InsertPhiElimInstructions(BasicBlock *BB,
68 const vector& CpVec);
68 const std::vector& CpVec);
6969 void SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt);
7070 void PostprocessMachineCodeForTree(InstructionNode* instrNode,
7171 int ruleForNode, short* nts);
8888 mcfi.addTemp(this);
8989
9090 Operands.push_back(Use(s1, this)); // s1 must be non-null
91 if (s2) {
91 if (s2)
9292 Operands.push_back(Use(s2, this));
93 }
9493
9594 // TmpInstructions should not be garbage checked.
9695 LeakDetector::removeGarbageObject(this);
105104 {
106105 mcfi.addTemp(this);
107106
108 if (s1) { Operands.push_back(Use(s1, this)); }
109 if (s2) { Operands.push_back(Use(s2, this)); }
107 if (s1)
108 Operands.push_back(Use(s1, this));
109 if (s2)
110 Operands.push_back(Use(s2, this));
110111
111112 // TmpInstructions should not be garbage checked.
112113 LeakDetector::removeGarbageObject(this);
120121 //
121122 InstrForest instrForest(&F);
122123
123 if (SelectDebugLevel >= Select_DebugInstTrees)
124 {
125 std::cerr << "\n\n*** Input to instruction selection for function "
126 << F.getName() << "\n\n" << F
127 << "\n\n*** Instruction trees for function "
128 << F.getName() << "\n\n";
129 instrForest.dump();
130 }
124 if (SelectDebugLevel >= Select_DebugInstTrees) {
125 std::cerr << "\n\n*** Input to instruction selection for function "
126 << F.getName() << "\n\n" << F
127 << "\n\n*** Instruction trees for function "
128 << F.getName() << "\n\n";
129 instrForest.dump();
130 }
131131
132132 //
133133 // Invoke BURG instruction selection for each tree
134134 //
135135 for (InstrForest::const_root_iterator RI = instrForest.roots_begin();
136 RI != instrForest.roots_end(); ++RI)
137 {
138 InstructionNode* basicNode = *RI;
139 assert(basicNode->parent() == NULL && "A `root' node has a parent?");
140
141 // Invoke BURM to label each tree node with a state
142 burm_label(basicNode);
143
144 if (SelectDebugLevel >= Select_DebugBurgTrees)
145 {
146 printcover(basicNode, 1, 0);
147 std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n";
148 printMatches(basicNode);
149 }
150
151 // Then recursively walk the tree to select instructions
152 SelectInstructionsForTree(basicNode, /*goalnt*/1);
153 }
136 RI != instrForest.roots_end(); ++RI) {
137 InstructionNode* basicNode = *RI;
138 assert(basicNode->parent() == NULL && "A `root' node has a parent?");
139
140 // Invoke BURM to label each tree node with a state
141 burm_label(basicNode);
142
143 if (SelectDebugLevel >= Select_DebugBurgTrees) {
144 printcover(basicNode, 1, 0);
145 std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n";
146 printMatches(basicNode);
147 }
148
149 // Then recursively walk the tree to select instructions
150 SelectInstructionsForTree(basicNode, /*goalnt*/1);
151 }
154152
155153 //
156154 // Create the MachineBasicBlock records and add all of the MachineInstrs
171169 // Insert phi elimination code
172170 InsertCodeForPhis(F);
173171
174 if (SelectDebugLevel >= Select_PrintMachineCode)
175 {
176 std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
177 MachineFunction::get(&F).dump();
178 }
172 if (SelectDebugLevel >= Select_PrintMachineCode) {
173 std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
174 MachineFunction::get(&F).dump();
175 }
179176
180177 return true;
181178 }
186183 //-------------------------------------------------------------------------
187184
188185 void
189 InstructionSelection::InsertCodeForPhis(Function &F)
190 {
186 InstructionSelection::InsertCodeForPhis(Function &F) {
191187 // for all basic blocks in function
192188 //
193189 MachineFunction &MF = MachineFunction::get(&F);
206202 //
207203 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
208204 // insert the copy instruction to the predecessor BB
209 vector mvec, CpVec;
205 std::vector mvec, CpVec;
210206 Target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PhiCpRes,
211207 mvec);
212 for (vector::iterator MI=mvec.begin();
208 for (std::vector::iterator MI=mvec.begin();
213209 MI != mvec.end(); ++MI) {
214 vector CpVec2 =
210 std::vector CpVec2 =
215211 FixConstantOperandsForInstr(const_cast(PN), *MI, Target);
216212 CpVec2.push_back(*MI);
217213 CpVec.insert(CpVec.end(), CpVec2.begin(), CpVec2.end());
220216 InsertPhiElimInstructions(PN->getIncomingBlock(i), CpVec);
221217 }
222218
223 vector mvec;
219 std::vector mvec;
224220 Target.getRegInfo().cpValue2Value(PhiCpRes, const_cast(PN),
225221 mvec);
226222 BB->insert(BB->begin(), mvec.begin(), mvec.end());
235231
236232 void
237233 InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB,
238 const vector& CpVec)
234 const std::vector& CpVec)
239235 {
240236 Instruction *TermInst = (Instruction*)BB->getTerminator();
241237 MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst);
303299 // (If this is a list node, not an instruction, then skip this step).
304300 // This function is specific to the target architecture.
305301 //
306 if (treeRoot->opLabel != VRegListOp)
307 {
308 vector minstrVec;
309
310 InstructionNode* instrNode = (InstructionNode*)treeRoot;
311 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
312
313 GetInstructionsByRule(instrNode, ruleForNode, nts, Target, minstrVec);
314
315 MachineCodeForInstruction &mvec =
316 MachineCodeForInstruction::get(instrNode->getInstruction());
317 mvec.insert(mvec.end(), minstrVec.begin(), minstrVec.end());
318 }
302 if (treeRoot->opLabel != VRegListOp) {
303 std::vector minstrVec;
304
305 InstructionNode* instrNode = (InstructionNode*)treeRoot;
306 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
307
308 GetInstructionsByRule(instrNode, ruleForNode, nts, Target, minstrVec);
309
310 MachineCodeForInstruction &mvec =
311 MachineCodeForInstruction::get(instrNode->getInstruction());
312 mvec.insert(mvec.end(), minstrVec.begin(), minstrVec.end());
313 }
319314
320315 // Then, recursively compile the child nodes, if any.
321316 //
322 if (nts[0])
323 { // i.e., there is at least one kid
324 InstrTreeNode* kids[2];
325 int currentRule = ruleForNode;
317 if (nts[0]) {
318 // i.e., there is at least one kid
319 InstrTreeNode* kids[2];
320 int currentRule = ruleForNode;
321 burm_kids(treeRoot, currentRule, kids);
322
323 // First skip over any chain rules so that we don't visit
324 // the current node again.
325 //
326 while (ThisIsAChainRule(currentRule)) {
327 currentRule = burm_rule(treeRoot->state, nts[0]);
328 nts = burm_nts[currentRule];
326329 burm_kids(treeRoot, currentRule, kids);
327
328 // First skip over any chain rules so that we don't visit
329 // the current node again.
330 //
331 while (ThisIsAChainRule(currentRule))
332 {
333 currentRule = burm_rule(treeRoot->state, nts[0]);
334 nts = burm_nts[currentRule];
335 burm_kids(treeRoot, currentRule, kids);
336 }
337
338 // Now we have the first non-chain rule so we have found
339 // the actual child nodes. Recursively compile them.
340 //
341 for (unsigned i = 0; nts[i]; i++)
342 {
343 assert(i < 2);
344 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
345 if (nodeType == InstrTreeNode::NTVRegListNode ||
346 nodeType == InstrTreeNode::NTInstructionNode)
347 SelectInstructionsForTree(kids[i], nts[i]);
348 }
349 }
330 }
331
332 // Now we have the first non-chain rule so we have found
333 // the actual child nodes. Recursively compile them.
334 //
335 for (unsigned i = 0; nts[i]; i++) {
336 assert(i < 2);
337 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
338 if (nodeType == InstrTreeNode::NTVRegListNode ||
339 nodeType == InstrTreeNode::NTInstructionNode)
340 SelectInstructionsForTree(kids[i], nts[i]);
341 }
342 }
350343
351344 // Finally, do any post-processing on this node after its children
352345 // have been translated
372365 //
373366 Instruction* vmInstr = instrNode->getInstruction();
374367 MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(vmInstr);
375 for (unsigned i = mvec.size(); i != 0; --i)
376 {
377 vector loadConstVec =
378 FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target);
379
380 mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end());
381 }
368 for (unsigned i = mvec.size(); i != 0; --i) {
369 std::vector loadConstVec =
370 FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target);
371
372 mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end());
373 }
382374 }
383375
384376
6565 getImmedValue = 0;
6666
6767 if (canUseImmed &&
68 target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
69 {
68 target.getInstrInfo().constantFitsInImmedField(opCode, intValue)) {
7069 opType = isSigned? MachineOperand::MO_SignExtendedImmed
7170 : MachineOperand::MO_UnextendedImmed;
7271 getImmedValue = intValue;
73 }
74 else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
75 {
76 opType = MachineOperand::MO_MachineRegister;
77 getMachineRegNum = target.getRegInfo().getZeroRegNum();
78 }
72 } else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0) {
73 opType = MachineOperand::MO_MachineRegister;
74 getMachineRegNum = target.getRegInfo().getZeroRegNum();
75 }
7976
8077 return opType;
8178 }
157154 MachineOperand::MO_VirtualRegister;
158155
159156 // Operand may be a virtual register or a compile-time constant
160 if (mop.getType() == MachineOperand::MO_VirtualRegister)
161 {
162 assert(mop.getVRegValue() != NULL);
163 opValue = mop.getVRegValue();
164 if (Constant *opConst = dyn_cast(opValue)) {
165 opType = ChooseRegOrImmed(opConst, opCode, target,
166 (immedPos == (int)op), machineRegNum,
167 immedValue);
168 if (opType == MachineOperand::MO_VirtualRegister)
169 constantThatMustBeLoaded = true;
170 }
171 }
172 else
173 {
174 assert(mop.isImmediate());
175 bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed;
176
177 // Bit-selection flags indicate an instruction that is extracting
178 // bits from its operand so ignore this even if it is a big constant.
179 if (mop.opHiBits32() || mop.opLoBits32() ||
180 mop.opHiBits64() || mop.opLoBits64())
181 continue;
182
183 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
184 opCode, target, (immedPos == (int)op),
185 machineRegNum, immedValue);
186
187 if (opType == MachineOperand::MO_SignExtendedImmed ||
188 opType == MachineOperand::MO_UnextendedImmed) {
189 // The optype is an immediate value
190 // This means we need to change the opcode, e.g. ADDr -> ADDi
191 unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
192 minstr->setOpcode(newOpcode);
193 }
194
195 if (opType == mop.getType())
196 continue; // no change: this is the most common case
197
157 if (mop.getType() == MachineOperand::MO_VirtualRegister) {
158 assert(mop.getVRegValue() != NULL);
159 opValue = mop.getVRegValue();
160 if (Constant *opConst = dyn_cast(opValue)) {
161 opType = ChooseRegOrImmed(opConst, opCode, target,
162 (immedPos == (int)op), machineRegNum,
163 immedValue);
198164 if (opType == MachineOperand::MO_VirtualRegister)
199 {
200 constantThatMustBeLoaded = true;
201 opValue = isSigned
202 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
203 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
204 }
205 }
165 constantThatMustBeLoaded = true;
166 }
167 } else {
168 assert(mop.isImmediate());
169 bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed;
170
171 // Bit-selection flags indicate an instruction that is extracting
172 // bits from its operand so ignore this even if it is a big constant.
173 if (mop.opHiBits32() || mop.opLoBits32() ||
174 mop.opHiBits64() || mop.opLoBits64())
175 continue;
176
177 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
178 opCode, target, (immedPos == (int)op),
179 machineRegNum, immedValue);
180
181 if (opType == MachineOperand::MO_SignExtendedImmed ||
182 opType == MachineOperand::MO_UnextendedImmed) {
183 // The optype is an immediate value
184 // This means we need to change the opcode, e.g. ADDr -> ADDi
185 unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
186 minstr->setOpcode(newOpcode);
187 }
188
189 if (opType == mop.getType())
190 continue; // no change: this is the most common case
191
192 if (opType == MachineOperand::MO_VirtualRegister) {
193 constantThatMustBeLoaded = true;
194 opValue = isSigned
195 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
196 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
197 }
198 }
206199
207200 if (opType == MachineOperand::MO_MachineRegister)
208201 minstr->SetMachineOperandReg(op, machineRegNum);
249242 InsertCodeToLoadConstant(F, oldVal, vmInstr, MVec, target);
250243 minstr->setImplicitRef(i, tmpReg);
251244
252 if (isCall)
253 { // find and replace the argument in the CallArgsDescriptor
254 unsigned i=lastCallArgNum;
255 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
256 ++i;
257 assert(i < argDesc->getNumArgs() &&
258 "Constant operands to a call *must* be in the arg list");
259 lastCallArgNum = i;
260 argDesc->getArgInfo(i).replaceArgVal(tmpReg);
261 }
245 if (isCall) {
246 // find and replace the argument in the CallArgsDescriptor
247 unsigned i=lastCallArgNum;
248 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
249 ++i;
250 assert(i < argDesc->getNumArgs() &&
251 "Constant operands to a call *must* be in the arg list");
252 lastCallArgNum = i;
253 argDesc->getArgInfo(i).replaceArgVal(tmpReg);
254 }
262255 }
263256
264257 return MVec;
1818 //
1919 //===----------------------------------------------------------------------===//
2020
21 #include "llvm/CodeGen/InstrForest.h"
22 #include "llvm/CodeGen/MachineCodeForInstruction.h"
21 #include "llvm/Constant.h"
2322 #include "llvm/Function.h"
2423 #include "llvm/iTerminators.h"
2524 #include "llvm/iMemory.h"
26 #include "llvm/Constant.h"
2725 #include "llvm/Type.h"
26 #include "llvm/CodeGen/InstrForest.h"
27 #include "llvm/CodeGen/MachineCodeForInstruction.h"
2828 #include "llvm/CodeGen/MachineInstr.h"
2929 #include "Support/STLExtras.h"
3030 #include "Config/alloca.h"
3434 //------------------------------------------------------------------------
3535
3636 void
37 InstrTreeNode::dump(int dumpChildren, int indent) const
38 {
37 InstrTreeNode::dump(int dumpChildren, int indent) const {
3938 dumpNode(indent);
4039
41 if (dumpChildren)
42 {
43 if (LeftChild)
44 LeftChild->dump(dumpChildren, indent+1);
45 if (RightChild)
46 RightChild->dump(dumpChildren, indent+1);
47 }
40 if (dumpChildren) {
41 if (LeftChild)
42 LeftChild->dump(dumpChildren, indent+1);
43 if (RightChild)
44 RightChild->dump(dumpChildren, indent+1);
45 }
4846 }
4947
5048
5149 InstructionNode::InstructionNode(Instruction* I)
52 : InstrTreeNode(NTInstructionNode, I),
53 codeIsFoldedIntoParent(false)
50 : InstrTreeNode(NTInstructionNode, I), codeIsFoldedIntoParent(false)
5451 {
5552 opLabel = I->getOpcode();
5653
5754 // Distinguish special cases of some instructions such as Ret and Br
5855 //
59 if (opLabel == Instruction::Ret && cast(I)->getReturnValue())
56 if (opLabel == Instruction::Ret && cast(I)->getReturnValue()) {
57 opLabel = RetValueOp; // ret(value) operation
58 }
59 else if (opLabel ==Instruction::Br && !cast(I)->isUnconditional())
60 {
61 opLabel = BrCondOp; // br(cond) operation
62 } else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT) {
63 opLabel = SetCCOp; // common label for all SetCC ops
64 } else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0) {
65 opLabel = AllocaN; // Alloca(ptr, N) operation
66 } else if (opLabel == Instruction::GetElementPtr &&
67 cast(I)->hasIndices()) {
68 opLabel = opLabel + 100; // getElem with index vector
69 } else if (opLabel == Instruction::Xor &&
70 BinaryOperator::isNot(I)) {
71 opLabel = (I->getType() == Type::BoolTy)? NotOp // boolean Not operator
72 : BNotOp; // bitwise Not operator
73 } else if (opLabel == Instruction::And || opLabel == Instruction::Or ||
74 opLabel == Instruction::Xor) {
75 // Distinguish bitwise operators from logical operators!
76 if (I->getType() != Type::BoolTy)
77 opLabel = opLabel + 100; // bitwise operator
78 } else if (opLabel == Instruction::Cast) {
79 const Type *ITy = I->getType();
80 switch(ITy->getPrimitiveID())
6081 {
61 opLabel = RetValueOp; // ret(value) operation
82 case Type::BoolTyID: opLabel = ToBoolTy; break;
83 case Type::UByteTyID: opLabel = ToUByteTy; break;
84 case Type::SByteTyID: opLabel = ToSByteTy; break;
85 case Type::UShortTyID: opLabel = ToUShortTy; break;
86 case Type::ShortTyID: opLabel = ToShortTy; break;
87 case Type::UIntTyID: opLabel = ToUIntTy; break;
88 case Type::IntTyID: opLabel = ToIntTy; break;
89 case Type::ULongTyID: opLabel = ToULongTy; break;
90 case Type::LongTyID: opLabel = ToLongTy; break;
91 case Type::FloatTyID: opLabel = ToFloatTy; break;
92 case Type::DoubleTyID: opLabel = ToDoubleTy; break;
93 case Type::ArrayTyID: opLabel = ToArrayTy; break;
94 case Type::PointerTyID: opLabel = ToPointerTy; break;
95 default:
96 // Just use `Cast' opcode otherwise. It's probably ignored.
97 break;
6298 }
63 else if (opLabel ==Instruction::Br && !cast(I)->isUnconditional())
64 {
65 opLabel = BrCondOp; // br(cond) operation
66 }
67 else if (opLabel >= Instruction::SetEQ && opLabel <= Instruction::SetGT)
68 {
69 opLabel = SetCCOp; // common label for all SetCC ops
70 }
71 else if (opLabel == Instruction::Alloca && I->getNumOperands() > 0)
72 {
73 opLabel = AllocaN; // Alloca(ptr, N) operation
74 }
75 else if (opLabel == Instruction::GetElementPtr &&
76 cast(I)->hasIndices())
77 {
78 opLabel = opLabel + 100; // getElem with index vector
79 }
80 else if (opLabel == Instruction::Xor &&
81 BinaryOperator::isNot(I))
82 {
83 opLabel = (I->getType() == Type::BoolTy)? NotOp // boolean Not operator
84 : BNotOp; // bitwise Not operator
85 }
86 else if (opLabel == Instruction::And ||
87 opLabel == Instruction::Or ||
88 opLabel == Instruction::Xor)
89 {
90 // Distinguish bitwise operators from logical operators!
91 if (I->getType() != Type::BoolTy)
92 opLabel = opLabel + 100; // bitwise operator
93 }
94 else if (opLabel == Instruction::Cast)
95 {
96 const Type *ITy = I->getType();
97 switch(ITy->getPrimitiveID())
98 {
99 case Type::BoolTyID: opLabel = ToBoolTy; break;
100 case Type::UByteTyID: opLabel = ToUByteTy; break;
101 case Type::SByteTyID: opLabel = ToSByteTy; break;
102 case Type::UShortTyID: opLabel = ToUShortTy; break;
103 case Type::ShortTyID: opLabel = ToShortTy; break;
104 case Type::UIntTyID: opLabel = ToUIntTy; break;
105 case Type::IntTyID: opLabel = ToIntTy; break;
106 case Type::ULongTyID: opLabel = ToULongTy; break;
107 case Type::LongTyID: opLabel = ToLongTy; break;
108 case Type::FloatTyID: opLabel = ToFloatTy; break;
109 case Type::DoubleTyID: opLabel = ToDoubleTy; break;
110 case Type::ArrayTyID: opLabel = ToArrayTy; break;
111 case Type::PointerTyID: opLabel = ToPointerTy; break;
112 default:
113 // Just use `Cast' opcode otherwise. It's probably ignored.
114 break;
115 }
116 }
117 }
118
119
120 void
121 InstructionNode::dumpNode(int indent) const
122 {
99 }
100 }
101
102
103 void
104 InstructionNode::dumpNode(int indent) const {
123105 for (int i=0; i < indent; i++)
124106 std::cerr << " ";
125107 std::cerr << getInstruction()->getOpcodeName()
126108 << " [label " << getOpLabel() << "]" << "\n";
127109 }
128110
129
130 void
131 VRegListNode::dumpNode(int indent) const
132 {
111 void
112 VRegListNode::dumpNode(int indent) const {
133113 for (int i=0; i < indent; i++)
134114 std::cerr << " ";
135115
138118
139119
140120 void
141 VRegNode::dumpNode(int indent) const
142 {
121 VRegNode::dumpNode(int indent) const {
143122 for (int i=0; i < indent; i++)
144123 std::cerr << " ";
145124
148127 }
149128
150129 void
151 ConstantNode::dumpNode(int indent) const
152 {
130 ConstantNode::dumpNode(int indent) const {
153131 for (int i=0; i < indent; i++)
154132 std::cerr << " ";
155133
157135 << (int) getValue()->getValueType() << ")" << "\n";
158136 }
159137
160 void
161 LabelNode::dumpNode(int indent) const
162 {
138 void LabelNode::dumpNode(int indent) const {
163139 for (int i=0; i < indent; i++)
164140 std::cerr << " ";
165141
172148 // A forest of instruction trees, usually for a single method.
173149 //------------------------------------------------------------------------
174150
175 InstrForest::InstrForest(Function *F)
176 {
151 InstrForest::InstrForest(Function *F) {
177152 for (Function::iterator BB = F->begin(), FE = F->end(); BB != FE; ++BB) {
178153 for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
179154 buildTreeForInstruction(I);
180155 }
181156 }
182157
183 InstrForest::~InstrForest()
184 {
158 InstrForest::~InstrForest() {
185159 for_each(treeRoots.begin(), treeRoots.end(), deleter);
186160 }
187161
188 void
189 InstrForest::dump() const
190 {
162 void InstrForest::dump() const {
191163 for (const_root_iterator I = roots_begin(); I != roots_end(); ++I)
192164 (*I)->dump(/*dumpChildren*/ 1, /*indent*/ 0);
193165 }
194166
195 inline void
196 InstrForest::eraseRoot(InstructionNode* node)
197 {
167 inline void InstrForest::eraseRoot(InstructionNode* node) {
198168 for (RootSet::reverse_iterator RI=treeRoots.rbegin(), RE=treeRoots.rend();
199169 RI != RE; ++RI)
200170 if (*RI == node)
201171 treeRoots.erase(RI.base()-1);
202172 }
203173
204 inline void
205 InstrForest::noteTreeNodeForInstr(Instruction *instr,
206 InstructionNode *treeNode)
207 {
174 inline void InstrForest::noteTreeNodeForInstr(Instruction *instr,
175 InstructionNode *treeNode) {
208176 (*this)[instr] = treeNode;
209177 treeRoots.push_back(treeNode); // mark node as root of a new tree
210178 }
211179
212180
213 inline void
214 InstrForest::setLeftChild(InstrTreeNode *parent, InstrTreeNode *child)
215 {
181 inline void InstrForest::setLeftChild(InstrTreeNode *parent,
182 InstrTreeNode *child) {
216183 parent->LeftChild = child;
217184 child->Parent = parent;
218185 if (InstructionNode* instrNode = dyn_cast(child))
219186 eraseRoot(instrNode); // no longer a tree root
220187 }
221188
222 inline void
223 InstrForest::setRightChild(InstrTreeNode *parent, InstrTreeNode *child)
224 {
189 inline void InstrForest::setRightChild(InstrTreeNode *parent,
190 InstrTreeNode *child) {
225191 parent->RightChild = child;
226192 child->Parent = parent;
227193 if (InstructionNode* instrNode = dyn_cast(child))
229195 }
230196
231197
232 InstructionNode*
233 InstrForest::buildTreeForInstruction(Instruction *instr)
234 {
198 InstructionNode* InstrForest::buildTreeForInstruction(Instruction *instr) {
235199 InstructionNode *treeNode = getTreeNodeForInstr(instr);
236 if (treeNode)
237 {
238 // treeNode has already been constructed for this instruction
239 assert(treeNode->getInstruction() == instr);
240 return treeNode;
241 }
200 if (treeNode) {
201 // treeNode has already been constructed for this instruction
202 assert(treeNode->getInstruction() == instr);
203 return treeNode;
204 }
242205
243206 // Otherwise, create a new tree node for this instruction.
244207 //
245208 treeNode = new InstructionNode(instr);
246209 noteTreeNodeForInstr(instr, treeNode);
247210
248 if (instr->getOpcode() == Instruction::Call)
249 { // Operands of call instruction
250 return treeNode;
251 }
211 if (instr->getOpcode() == Instruction::Call) {
212 // Operands of call instruction
213 return treeNode;
214 }
252215
253216 // If the instruction has more than 2 instruction operands,
254217 // then we need to create artificial list nodes to hold them.
284247 if (includeAddressOperand || isa(operand) ||
285248 isa(operand) || isa(operand) ||
286249 isa(operand))
287 {
288 // This operand is a data value
250 {
251 // This operand is a data value
289252
290 // An instruction that computes the incoming value is added as a
291 // child of the current instruction if:
292 // the value has only a single use
293 // AND both instructions are in the same basic block.
294 // AND the current instruction is not a PHI (because the incoming
295 // value is conceptually in a predecessor block,
296 // even though it may be in the same static block)
297 //
298 // (Note that if the value has only a single use (viz., `instr'),
299 // the def of the value can be safely moved just before instr
300 // and therefore it is safe to combine these two instructions.)
301 //
302 // In all other cases, the virtual register holding the value
303 // is used directly, i.e., made a child of the instruction node.
304 //
305 InstrTreeNode* opTreeNode;
306 if (isa(operand) && operand->hasOneUse() &&
307 cast(operand)->getParent() == instr->getParent() &&
308 instr->getOpcode() != Instruction::PHI &&
309 instr->getOpcode() != Instruction::Call)
310 {
311 // Recursively create a treeNode for it.
312 opTreeNode = buildTreeForInstruction((Instruction*)operand);
313 }
314 else if (Constant *CPV = dyn_cast(operand))
315 {
316 // Create a leaf node for a constant
317 opTreeNode = new ConstantNode(CPV);
318 }
319 else
320 {
321 // Create a leaf node for the virtual register
322 opTreeNode = new VRegNode(operand);
323 }
324
325 childArray[numChildren++] = opTreeNode;
326 }
253 // An instruction that computes the incoming value is added as a
254 // child of the current instruction if:
255 // the value has only a single use
256 // AND both instructions are in the same basic block.
257 // AND the current instruction is not a PHI (because the incoming
258 // value is conceptually in a predecessor block,
259 // even though it may be in the same static block)
260 //
261 // (Note that if the value has only a single use (viz., `instr'),
262 // the def of the value can be safely moved just before instr
263 // and therefore it is safe to combine these two instructions.)
264 //
265 // In all other cases, the virtual register holding the value
266 // is used directly, i.e., made a child of the instruction node.
267 //
268 InstrTreeNode* opTreeNode;
269 if (isa(operand) && operand->hasOneUse() &&
270 cast(operand)->getParent() == instr->getParent() &&
271 instr->getOpcode() != Instruction::PHI &&
272 instr->getOpcode() != Instruction::Call)
273 {
274 // Recursively create a treeNode for it.
275 opTreeNode = buildTreeForInstruction((Instruction*)operand);
276 } else if (Constant *CPV = dyn_cast(operand)) {
277 // Create a leaf node for a constant
278 opTreeNode = new ConstantNode(CPV);
279 } else {
280 // Create a leaf node for the virtual register
281 opTreeNode = new VRegNode(operand);
282 }
283
284 childArray[numChildren++] = opTreeNode;
285 }
327286 }
328287
329288 //--------------------------------------------------------------------
337296
338297 InstrTreeNode *parent = treeNode;
339298
340 if (numChildren > 2)
341 {
342 unsigned instrOpcode = treeNode->getInstruction()->getOpcode();
343 assert(instrOpcode == Instruction::PHI ||
344 instrOpcode == Instruction::Call ||
345 instrOpcode == Instruction::Load ||
346 instrOpcode == Instruction::Store ||
347 instrOpcode == Instruction::GetElementPtr);
348 }
299 if (numChildren > 2) {
300 unsigned instrOpcode = treeNode->getInstruction()->getOpcode();
301 assert(instrOpcode == Instruction::PHI ||
302 instrOpcode == Instruction::Call ||
303 instrOpcode == Instruction::Load ||
304 instrOpcode == Instruction::Store ||
305 instrOpcode == Instruction::GetElementPtr);
306 }
349307
350308 // Insert the first child as a direct child
351309 if (numChildren >= 1)
354312 int n;
355313
356314 // Create a list node for children 2 .. N-1, if any
357 for (n = numChildren-1; n >= 2; n--)
358 {
359 // We have more than two children
360 InstrTreeNode *listNode = new VRegListNode();
361 setRightChild(parent, listNode);
362 setLeftChild(listNode, childArray[numChildren - n]);
363 parent = listNode;
364 }
315 for (n = numChildren-1; n >= 2; n--) {
316 // We have more than two children
317 InstrTreeNode *listNode = new VRegListNode();
318 setRightChild(parent, listNode);
319 setLeftChild(listNode, childArray[numChildren - n]);
320 parent = listNode;
321 }
365322
366323 // Now insert the last remaining child (if any).
367 if (numChildren >= 2)
368 {
369 assert(n == 1);
370 setRightChild(parent, childArray[numChildren - 1]);
371 }
324 if (numChildren >= 2) {
325 assert(n == 1);
326 setRightChild(parent, childArray[numChildren - 1]);
327 }
372328
373329 delete [] childArray;
374330 return treeNode;
1313 //
1414 //===----------------------------------------------------------------------===//
1515
16 #include "llvm/CodeGen/InstrSelection.h"
17 #include "llvm/CodeGen/InstrSelectionSupport.h"
18 #include "llvm/CodeGen/InstrForest.h"
19 #include "llvm/CodeGen/MachineCodeForInstruction.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/Target/TargetRegInfo.h"
22 #include "llvm/Target/TargetMachine.h"
2316 #include "llvm/Function.h"
2417 #include "llvm/iPHINode.h"
2518 #include "llvm/Pass.h"
19 #include "llvm/CodeGen/InstrForest.h"
20 #include "llvm/CodeGen/InstrSelection.h"
21 #include "llvm/CodeGen/InstrSelectionSupport.h"
22 #include "llvm/CodeGen/MachineCodeForInstruction.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegInfo.h"
2626 #include "Support/CommandLine.h"
2727 #include "Support/LeakDetector.h"
28 using std::vector;
28 #include
2929
3030 std::vector
3131 FixConstantOperandsForInstr(Instruction* vmInstr, MachineInstr* minstr,
6565 TargetMachine &Target;
6666 void InsertCodeForPhis(Function &F);
6767 void InsertPhiElimInstructions(BasicBlock *BB,
68 const vector& CpVec);
68 const std::vector& CpVec);
6969 void SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt);
7070 void PostprocessMachineCodeForTree(InstructionNode* instrNode,
7171 int ruleForNode, short* nts);
8888 mcfi.addTemp(this);
8989
9090 Operands.push_back(Use(s1, this)); // s1 must be non-null
91 if (s2) {
91 if (s2)
9292 Operands.push_back(Use(s2, this));
93 }
9493
9594 // TmpInstructions should not be garbage checked.
9695 LeakDetector::removeGarbageObject(this);
105104 {
106105 mcfi.addTemp(this);
107106
108 if (s1) { Operands.push_back(Use(s1, this)); }
109 if (s2) { Operands.push_back(Use(s2, this)); }
107 if (s1)
108 Operands.push_back(Use(s1, this));
109 if (s2)
110 Operands.push_back(Use(s2, this));
110111
111112 // TmpInstructions should not be garbage checked.
112113 LeakDetector::removeGarbageObject(this);
120121 //
121122 InstrForest instrForest(&F);
122123
123 if (SelectDebugLevel >= Select_DebugInstTrees)
124 {
125 std::cerr << "\n\n*** Input to instruction selection for function "
126 << F.getName() << "\n\n" << F
127 << "\n\n*** Instruction trees for function "
128 << F.getName() << "\n\n";
129 instrForest.dump();
130 }
124 if (SelectDebugLevel >= Select_DebugInstTrees) {
125 std::cerr << "\n\n*** Input to instruction selection for function "
126 << F.getName() << "\n\n" << F
127 << "\n\n*** Instruction trees for function "
128 << F.getName() << "\n\n";
129 instrForest.dump();
130 }
131131
132132 //
133133 // Invoke BURG instruction selection for each tree
134134 //
135135 for (InstrForest::const_root_iterator RI = instrForest.roots_begin();
136 RI != instrForest.roots_end(); ++RI)
137 {
138 InstructionNode* basicNode = *RI;
139 assert(basicNode->parent() == NULL && "A `root' node has a parent?");
140
141 // Invoke BURM to label each tree node with a state
142 burm_label(basicNode);
143
144 if (SelectDebugLevel >= Select_DebugBurgTrees)
145 {
146 printcover(basicNode, 1, 0);
147 std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n";
148 printMatches(basicNode);
149 }
150
151 // Then recursively walk the tree to select instructions
152 SelectInstructionsForTree(basicNode, /*goalnt*/1);
153 }
136 RI != instrForest.roots_end(); ++RI) {
137 InstructionNode* basicNode = *RI;
138 assert(basicNode->parent() == NULL && "A `root' node has a parent?");
139
140 // Invoke BURM to label each tree node with a state
141 burm_label(basicNode);
142
143 if (SelectDebugLevel >= Select_DebugBurgTrees) {
144 printcover(basicNode, 1, 0);
145 std::cerr << "\nCover cost == " << treecost(basicNode, 1, 0) <<"\n\n";
146 printMatches(basicNode);
147 }
148
149 // Then recursively walk the tree to select instructions
150 SelectInstructionsForTree(basicNode, /*goalnt*/1);
151 }
154152
155153 //
156154 // Create the MachineBasicBlock records and add all of the MachineInstrs
171169 // Insert phi elimination code
172170 InsertCodeForPhis(F);
173171
174 if (SelectDebugLevel >= Select_PrintMachineCode)
175 {
176 std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
177 MachineFunction::get(&F).dump();
178 }
172 if (SelectDebugLevel >= Select_PrintMachineCode) {
173 std::cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
174 MachineFunction::get(&F).dump();
175 }
179176
180177 return true;
181178 }
186183 //-------------------------------------------------------------------------
187184
188185 void
189 InstructionSelection::InsertCodeForPhis(Function &F)
190 {
186 InstructionSelection::InsertCodeForPhis(Function &F) {
191187 // for all basic blocks in function
192188 //
193189 MachineFunction &MF = MachineFunction::get(&F);
206202 //
207203 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
208204 // insert the copy instruction to the predecessor BB
209 vector mvec, CpVec;
205 std::vector mvec, CpVec;
210206 Target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PhiCpRes,
211207 mvec);
212 for (vector::iterator MI=mvec.begin();
208 for (std::vector::iterator MI=mvec.begin();
213209 MI != mvec.end(); ++MI) {
214 vector CpVec2 =
210 std::vector CpVec2 =
215211 FixConstantOperandsForInstr(const_cast(PN), *MI, Target);
216212 CpVec2.push_back(*MI);
217213 CpVec.insert(CpVec.end(), CpVec2.begin(), CpVec2.end());
220216 InsertPhiElimInstructions(PN->getIncomingBlock(i), CpVec);
221217 }
222218
223 vector mvec;
219 std::vector mvec;
224220 Target.getRegInfo().cpValue2Value(PhiCpRes, const_cast(PN),
225221 mvec);
226222 BB->insert(BB->begin(), mvec.begin(), mvec.end());
235231
236232 void
237233 InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB,
238 const vector& CpVec)
234 const std::vector& CpVec)
239235 {
240236 Instruction *TermInst = (Instruction*)BB->getTerminator();
241237 MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst);
303299 // (If this is a list node, not an instruction, then skip this step).
304300 // This function is specific to the target architecture.
305301 //
306 if (treeRoot->opLabel != VRegListOp)
307 {
308 vector minstrVec;
309
310 InstructionNode* instrNode = (InstructionNode*)treeRoot;
311 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
312
313 GetInstructionsByRule(instrNode, ruleForNode, nts, Target, minstrVec);
314
315 MachineCodeForInstruction &mvec =
316 MachineCodeForInstruction::get(instrNode->getInstruction());
317 mvec.insert(mvec.end(), minstrVec.begin(), minstrVec.end());
318 }
302 if (treeRoot->opLabel != VRegListOp) {
303 std::vector minstrVec;
304
305 InstructionNode* instrNode = (InstructionNode*)treeRoot;
306 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
307
308 GetInstructionsByRule(instrNode, ruleForNode, nts, Target, minstrVec);
309
310 MachineCodeForInstruction &mvec =
311 MachineCodeForInstruction::get(instrNode->getInstruction());
312 mvec.insert(mvec.end(), minstrVec.begin(), minstrVec.end());
313 }
319314
320315 // Then, recursively compile the child nodes, if any.
321316 //
322 if (nts[0])
323 { // i.e., there is at least one kid
324 InstrTreeNode* kids[2];
325 int currentRule = ruleForNode;
317 if (nts[0]) {
318 // i.e., there is at least one kid
319 InstrTreeNode* kids[2];
320 int currentRule = ruleForNode;
321 burm_kids(treeRoot, currentRule, kids);
322
323 // First skip over any chain rules so that we don't visit
324 // the current node again.
325 //
326 while (ThisIsAChainRule(currentRule)) {
327 currentRule = burm_rule(treeRoot->state, nts[0]);
328 nts = burm_nts[currentRule];
326329 burm_kids(treeRoot, currentRule, kids);
327
328 // First skip over any chain rules so that we don't visit
329 // the current node again.
330 //
331 while (ThisIsAChainRule(currentRule))
332 {
333 currentRule = burm_rule(treeRoot->state, nts[0]);
334 nts = burm_nts[currentRule];
335 burm_kids(treeRoot, currentRule, kids);
336 }
337
338 // Now we have the first non-chain rule so we have found
339 // the actual child nodes. Recursively compile them.
340 //
341 for (unsigned i = 0; nts[i]; i++)
342 {
343 assert(i < 2);
344 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
345 if (nodeType == InstrTreeNode::NTVRegListNode ||
346 nodeType == InstrTreeNode::NTInstructionNode)
347 SelectInstructionsForTree(kids[i], nts[i]);
348 }
349 }
330 }
331
332 // Now we have the first non-chain rule so we have found
333 // the actual child nodes. Recursively compile them.
334 //
335 for (unsigned i = 0; nts[i]; i++) {
336 assert(i < 2);
337 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
338 if (nodeType == InstrTreeNode::NTVRegListNode ||
339 nodeType == InstrTreeNode::NTInstructionNode)
340 SelectInstructionsForTree(kids[i], nts[i]);
341 }
342 }
350343
351344 // Finally, do any post-processing on this node after its children
352345 // have been translated
372365 //
373366 Instruction* vmInstr = instrNode->getInstruction();
374367 MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(vmInstr);
375 for (unsigned i = mvec.size(); i != 0; --i)
376 {
377 vector loadConstVec =
378 FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target);
379
380 mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end());
381 }
368 for (unsigned i = mvec.size(); i != 0; --i) {
369 std::vector loadConstVec =
370 FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target);
371
372 mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end());
373 }
382374 }
383375
384376
6565 getImmedValue = 0;
6666
6767 if (canUseImmed &&
68 target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
69 {
68 target.getInstrInfo().constantFitsInImmedField(opCode, intValue)) {
7069 opType = isSigned? MachineOperand::MO_SignExtendedImmed
7170 : MachineOperand::MO_UnextendedImmed;
7271 getImmedValue = intValue;
73 }
74 else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
75 {
76 opType = MachineOperand::MO_MachineRegister;
77 getMachineRegNum = target.getRegInfo().getZeroRegNum();
78 }
72 } else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0) {
73 opType = MachineOperand::MO_MachineRegister;
74 getMachineRegNum = target.getRegInfo().getZeroRegNum();
75 }
7976
8077 return opType;
8178 }
157154 MachineOperand::MO_VirtualRegister;
158155
159156 // Operand may be a virtual register or a compile-time constant
160 if (mop.getType() == MachineOperand::MO_VirtualRegister)
161 {
162 assert(mop.getVRegValue() != NULL);
163 opValue = mop.getVRegValue();
164 if (Constant *opConst = dyn_cast(opValue)) {
165 opType = ChooseRegOrImmed(opConst, opCode, target,
166 (immedPos == (int)op), machineRegNum,
167 immedValue);
168 if (opType == MachineOperand::MO_VirtualRegister)
169 constantThatMustBeLoaded = true;
170 }
171 }
172 else
173 {
174 assert(mop.isImmediate());
175 bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed;
176
177 // Bit-selection flags indicate an instruction that is extracting
178 // bits from its operand so ignore this even if it is a big constant.
179 if (mop.opHiBits32() || mop.opLoBits32() ||
180 mop.opHiBits64() || mop.opLoBits64())
181 continue;
182
183 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
184 opCode, target, (immedPos == (int)op),
185 machineRegNum, immedValue);
186
187 if (opType == MachineOperand::MO_SignExtendedImmed ||
188 opType == MachineOperand::MO_UnextendedImmed) {
189 // The optype is an immediate value
190 // This means we need to change the opcode, e.g. ADDr -> ADDi
191 unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
192 minstr->setOpcode(newOpcode);
193 }
194
195 if (opType == mop.getType())
196 continue; // no change: this is the most common case
197
157 if (mop.getType() == MachineOperand::MO_VirtualRegister) {
158 assert(mop.getVRegValue() != NULL);
159 opValue = mop.getVRegValue();
160 if (Constant *opConst = dyn_cast(opValue)) {
161 opType = ChooseRegOrImmed(opConst, opCode, target,
162 (immedPos == (int)op), machineRegNum,
163 immedValue);
198164 if (opType == MachineOperand::MO_VirtualRegister)
199 {
200 constantThatMustBeLoaded = true;
201 opValue = isSigned
202 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
203 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
204 }
205 }
165 constantThatMustBeLoaded = true;
166 }
167 } else {
168 assert(mop.isImmediate());
169 bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed;
170
171 // Bit-selection flags indicate an instruction that is extracting
172 // bits from its operand so ignore this even if it is a big constant.
173 if (mop.opHiBits32() || mop.opLoBits32() ||
174 mop.opHiBits64() || mop.opLoBits64())
175 continue;
176
177 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
178 opCode, target, (immedPos == (int)op),
179 machineRegNum, immedValue);
180
181 if (opType == MachineOperand::MO_SignExtendedImmed ||
182 opType == MachineOperand::MO_UnextendedImmed) {
183 // The optype is an immediate value
184 // This means we need to change the opcode, e.g. ADDr -> ADDi
185 unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
186 minstr->setOpcode(newOpcode);
187 }
188
189 if (opType == mop.getType())
190 continue; // no change: this is the most common case
191
192 if (opType == MachineOperand::MO_VirtualRegister) {
193 constantThatMustBeLoaded = true;
194 opValue = isSigned
195 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
196 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
197 }
198 }
206199
207200 if (opType == MachineOperand::MO_MachineRegister)
208201 minstr->SetMachineOperandReg(op, machineRegNum);
249242 InsertCodeToLoadConstant(F, oldVal, vmInstr, MVec, target);
250243 minstr->setImplicitRef(i, tmpReg);
251244
252 if (isCall)
253 { // find and replace the argument in the CallArgsDescriptor
254 unsigned i=lastCallArgNum;
255 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
256 ++i;
257 assert(i < argDesc->getNumArgs() &&
258 "Constant operands to a call *must* be in the arg list");
259 lastCallArgNum = i;
260 argDesc->getArgInfo(i).replaceArgVal(tmpReg);
261 }
245 if (isCall) {
246 // find and replace the argument in the CallArgsDescriptor
247 unsigned i=lastCallArgNum;
248 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
249 ++i;
250 assert(i < argDesc->getNumArgs() &&
251 "Constant operands to a call *must* be in the arg list");
252 lastCallArgNum = i;
253 argDesc->getArgInfo(i).replaceArgVal(tmpReg);
254 }
262255 }
263256
264257 return MVec;