llvm.org GIT mirror llvm / 5d79859
Make sure that the register is in the register class before adding it as a machine op. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142021 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 9 years ago
1 changed file(s) with 3 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
59205920
59215921 MachineInstrBuilder MIB(&*II);
59225922
5923 for (unsigned i = 0; SavedRegs[i] != 0; ++i)
5923 for (unsigned i = 0; SavedRegs[i] != 0; ++i) {
5924 if (!TRC->contains(SavedRegs[i])) continue;
59245925 if (!DefRegs[SavedRegs[i]])
59255926 MIB.addReg(SavedRegs[i], RegState::Implicit | RegState::Define);
5927 }
59265928
59275929 break;
59285930 }