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[AVX-512] Add AVX-512 vector shift intrinsics to memory santitizer. Just needed to add the intrinsics to the exist switch. The code is generic enough to support the wider vectors with no changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286980 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 4 years ago
2 changed file(s) with 82 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
23612361 case llvm::Intrinsic::x86_sse_cvttps2pi:
23622362 handleVectorConvertIntrinsic(I, 2);
23632363 break;
2364
2365 case llvm::Intrinsic::x86_avx512_psll_w_512:
2366 case llvm::Intrinsic::x86_avx512_psll_d_512:
2367 case llvm::Intrinsic::x86_avx512_psll_q_512:
2368 case llvm::Intrinsic::x86_avx512_pslli_w_512:
2369 case llvm::Intrinsic::x86_avx512_pslli_d_512:
2370 case llvm::Intrinsic::x86_avx512_pslli_q_512:
2371 case llvm::Intrinsic::x86_avx512_psrl_w_512:
2372 case llvm::Intrinsic::x86_avx512_psrl_d_512:
2373 case llvm::Intrinsic::x86_avx512_psrl_q_512:
2374 case llvm::Intrinsic::x86_avx512_psra_w_512:
2375 case llvm::Intrinsic::x86_avx512_psra_d_512:
2376 case llvm::Intrinsic::x86_avx512_psra_q_512:
2377 case llvm::Intrinsic::x86_avx512_psrli_w_512:
2378 case llvm::Intrinsic::x86_avx512_psrli_d_512:
2379 case llvm::Intrinsic::x86_avx512_psrli_q_512:
2380 case llvm::Intrinsic::x86_avx512_psrai_w_512:
2381 case llvm::Intrinsic::x86_avx512_psrai_d_512:
2382 case llvm::Intrinsic::x86_avx512_psrai_q_512:
2383 case llvm::Intrinsic::x86_avx512_psra_q_256:
2384 case llvm::Intrinsic::x86_avx512_psra_q_128:
2385 case llvm::Intrinsic::x86_avx512_psrai_q_256:
2386 case llvm::Intrinsic::x86_avx512_psrai_q_128:
23642387 case llvm::Intrinsic::x86_avx2_psll_w:
23652388 case llvm::Intrinsic::x86_avx2_psll_d:
23662389 case llvm::Intrinsic::x86_avx2_psll_q:
24132436 break;
24142437 case llvm::Intrinsic::x86_avx2_psllv_d:
24152438 case llvm::Intrinsic::x86_avx2_psllv_d_256:
2439 case llvm::Intrinsic::x86_avx512_psllv_d_512:
24162440 case llvm::Intrinsic::x86_avx2_psllv_q:
24172441 case llvm::Intrinsic::x86_avx2_psllv_q_256:
2442 case llvm::Intrinsic::x86_avx512_psllv_q_512:
24182443 case llvm::Intrinsic::x86_avx2_psrlv_d:
24192444 case llvm::Intrinsic::x86_avx2_psrlv_d_256:
2445 case llvm::Intrinsic::x86_avx512_psrlv_d_512:
24202446 case llvm::Intrinsic::x86_avx2_psrlv_q:
24212447 case llvm::Intrinsic::x86_avx2_psrlv_q_256:
2448 case llvm::Intrinsic::x86_avx512_psrlv_q_512:
24222449 case llvm::Intrinsic::x86_avx2_psrav_d:
24232450 case llvm::Intrinsic::x86_avx2_psrav_d_256:
2451 case llvm::Intrinsic::x86_avx512_psrav_d_512:
2452 case llvm::Intrinsic::x86_avx512_psrav_q_128:
2453 case llvm::Intrinsic::x86_avx512_psrav_q_256:
2454 case llvm::Intrinsic::x86_avx512_psrav_q_512:
24242455 handleVectorShiftIntrinsic(I, /* Variable */ true);
24252456 break;
24262457
55 target triple = "x86_64-unknown-linux-gnu"
66
77 declare x86_mmx @llvm.x86.mmx.psll.d(x86_mmx, x86_mmx)
8 declare <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32>, <16 x i32>)
89 declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>)
910 declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>)
1011 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>)
12 declare <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16>, <8 x i16>)
1113 declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32)
14 declare <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16>, i32)
1215
1316 define i64 @test_mmx(i64 %x.coerce, i64 %y.coerce) sanitize_memory {
1417 entry:
4851 ; CHECK: ret <8 x i16>
4952
5053
54 define <32 x i16> @test_avx512_scalar(<32 x i16> %x, i32 %y) sanitize_memory {
55 entry:
56 %0 = tail call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> %x, i32 %y)
57 ret <32 x i16> %0
58 }
59
60 ; CHECK-LABEL: @test_avx512_scalar
61 ; CHECK: = icmp ne i32 {{.*}}, 0
62 ; CHECK: = sext i1 {{.*}} to i512
63 ; CHECK: = bitcast i512 {{.*}} to <32 x i16>
64 ; CHECK: = call <32 x i16> @llvm.x86.avx512.pslli.w.512(
65 ; CHECK: = or <32 x i16>
66 ; CHECK: call <32 x i16> @llvm.x86.avx512.pslli.w.512(
67 ; CHECK: ret <32 x i16>
68
69
5170 define <8 x i16> @test_sse2(<8 x i16> %x, <8 x i16> %y) sanitize_memory {
5271 entry:
5372 %0 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %x, <8 x i16> %y)
6483 ; CHECK: = or <8 x i16>
6584 ; CHECK: call <8 x i16> @llvm.x86.sse2.psrl.w(
6685 ; CHECK: ret <8 x i16>
86
87
88 define <32 x i16> @test_avx512(<32 x i16> %x, <8 x i16> %y) sanitize_memory {
89 entry:
90 %0 = tail call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> %x, <8 x i16> %y)
91 ret <32 x i16> %0
92 }
93
94 ; CHECK-LABEL: @test_avx512
95 ; CHECK: = bitcast <8 x i16> {{.*}} to i128
96 ; CHECK: = trunc i128 {{.*}} to i64
97 ; CHECK: = icmp ne i64 {{.*}}, 0
98 ; CHECK: = sext i1 {{.*}} to i512
99 ; CHECK: = bitcast i512 {{.*}} to <32 x i16>
100 ; CHECK: = call <32 x i16> @llvm.x86.avx512.psrl.w.512(
101 ; CHECK: = or <32 x i16>
102 ; CHECK: call <32 x i16> @llvm.x86.avx512.psrl.w.512(
103 ; CHECK: ret <32 x i16>
67104
68105
69106 ; Test variable shift (i.e. vector by vector).
95132 ; CHECK: = or <8 x i32>
96133 ; CHECK: = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(
97134 ; CHECK: ret <8 x i32>
135
136 define <16 x i32> @test_avx512_512(<16 x i32> %x, <16 x i32> %y) sanitize_memory {
137 entry:
138 %0 = tail call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> %x, <16 x i32> %y)
139 ret <16 x i32> %0
140 }
141
142 ; CHECK-LABEL: @test_avx512_512
143 ; CHECK: = icmp ne <16 x i32> {{.*}}, zeroinitializer
144 ; CHECK: = sext <16 x i1> {{.*}} to <16 x i32>
145 ; CHECK: = call <16 x i32> @llvm.x86.avx512.psllv.d.512(
146 ; CHECK: = or <16 x i32>
147 ; CHECK: = tail call <16 x i32> @llvm.x86.avx512.psllv.d.512(
148 ; CHECK: ret <16 x i32>