llvm.org GIT mirror llvm / 5c56853
AMDGPU: Fix crash when constant folding with physreg operand git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327209 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 2 years ago
2 changed file(s) with 29 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
470470 MachineOperand &Op) {
471471 if (Op.isReg()) {
472472 // If this has a subregister, it obviously is a register source.
473 if (Op.getSubReg() != AMDGPU::NoSubRegister)
473 if (Op.getSubReg() != AMDGPU::NoSubRegister ||
474 !TargetRegisterInfo::isVirtualRegister(Op.getReg()))
474475 return &Op;
475476
476477 MachineInstr *Def = MRI.getVRegDef(Op.getReg());
803803 S_ENDPGM
804804
805805 ...
806 ---
807 # Make sure there is no crash if one of the operands is a physical register
808 # GCN-LABEL: name: constant_fold_physreg_op{{$}}
809 # GCN: %3:sreg_64 = S_AND_B64 $exec, 0, implicit-def dead $scc
810
811 name: constant_fold_physreg_op
812 tracksRegLiveness: true
813 body: |
814 bb.0:
815 successors: %bb.1, %bb.3
816 liveins: $vgpr0, $sgpr4_sgpr5
817
818 %19:sreg_64 = IMPLICIT_DEF
819 %0:sreg_64 = SI_IF killed %19, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
820 S_BRANCH %bb.1
821
822 bb.1:
823 %6:sreg_64 = S_MOV_B64 0
824 %7:sreg_64 = S_AND_B64 $exec, killed %6, implicit-def dead $scc
825 $vcc = COPY %7
826
827 bb.3:
828 liveins: $vcc
829 SI_END_CF %0, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
830 S_ENDPGM implicit $vcc
831
832 ...