llvm.org GIT mirror llvm / 5c21be0
[ARM] Make RWPI use movw/movt when available When constructing global address literals while targeting the RWPI relocation model. LLVM currently only uses literal pools. If MOVW/MOVT instructions are available we can use these instead. Beside being more efficient it allows -arm-execute-only to work with -relocation-model=RWPI as well. When we generate MOVW/MOVT for global addresses when targeting the RWPI relocation model, we need to use base relative relocations. This patch does the needed plumbing in MC to generate these for MOVW/MOVT. Differential Revision: https://reviews.llvm.org/D29487 Change-Id: I446786e43a6f5aa9b6a5bb2cd216d60d41c7755d git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294298 91177308-0d34-0410-b5e6-96231b3b80d8 Christof Douma 3 years ago
5 changed file(s) with 173 addition(s) and 36 deletion(s). Raw diff Collapse all Expand all
31103110 return Result;
31113111 } else if (Subtarget->isRWPI() && !IsRO) {
31123112 // SB-relative.
3113 ARMConstantPoolValue *CPV =
3114 ARMConstantPoolConstant::Create(GV, ARMCP::SBREL);
3115 SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4);
3116 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
3117 SDValue G = DAG.getLoad(
3118 PtrVT, dl, DAG.getEntryNode(), CPAddr,
3119 MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));
3113 SDValue RelAddr;
3114 if (Subtarget->useMovt(DAG.getMachineFunction())) {
3115 ++NumMovwMovt;
3116 SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, ARMII::MO_SBREL);
3117 RelAddr = DAG.getNode(ARMISD::Wrapper, dl, PtrVT, G);
3118 } else { // use literal pool for address constant
3119 ARMConstantPoolValue *CPV =
3120 ARMConstantPoolConstant::Create(GV, ARMCP::SBREL);
3121 SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4);
3122 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
3123 RelAddr = DAG.getLoad(
3124 PtrVT, dl, DAG.getEntryNode(), CPAddr,
3125 MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));
3126 }
31203127 SDValue SB = DAG.getCopyFromReg(DAG.getEntryNode(), dl, ARM::R9, PtrVT);
3121 SDValue Result = DAG.getNode(ISD::ADD, dl, PtrVT, SB, G);
3128 SDValue Result = DAG.getNode(ISD::ADD, dl, PtrVT, SB, RelAddr);
31223129 return Result;
31233130 }
31243131
3737
3838 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
3939 const MCSymbol *Symbol) {
40 MCSymbolRefExpr::VariantKind SymbolVariant = MCSymbolRefExpr::VK_None;
41 if (MO.getTargetFlags() & ARMII::MO_SBREL)
42 SymbolVariant = MCSymbolRefExpr::VK_ARM_SBREL;
43
4044 const MCExpr *Expr =
41 MCSymbolRefExpr::create(Symbol, MCSymbolRefExpr::VK_None, OutContext);
45 MCSymbolRefExpr::create(Symbol, SymbolVariant, OutContext);
4246 switch (MO.getTargetFlags() & ARMII::MO_OPTION_MASK) {
4347 default:
4448 llvm_unreachable("Unknown target flag on symbol operand");
4650 break;
4751 case ARMII::MO_LO16:
4852 Expr =
49 MCSymbolRefExpr::create(Symbol, MCSymbolRefExpr::VK_None, OutContext);
53 MCSymbolRefExpr::create(Symbol, SymbolVariant, OutContext);
5054 Expr = ARMMCExpr::createLower16(Expr, OutContext);
5155 break;
5256 case ARMII::MO_HI16:
5357 Expr =
54 MCSymbolRefExpr::create(Symbol, MCSymbolRefExpr::VK_None, OutContext);
58 MCSymbolRefExpr::create(Symbol, SymbolVariant, OutContext);
5559 Expr = ARMMCExpr::createUpper16(Expr, OutContext);
5660 break;
5761 }
290290
291291 /// MO_OPTION_MASK - Most flags are mutually exclusive; this mask selects
292292 /// just that part of the flag set.
293 MO_OPTION_MASK = 0x1f,
293 MO_OPTION_MASK = 0x0f,
294
295 /// MO_SBREL - On a symbol operand, this represents a static base relative
296 /// relocation. Used in movw and movt instructions.
297 MO_SBREL = 0x10,
294298
295299 /// MO_DLLIMPORT - On a symbol operand, this represents that the reference
296300 /// to the symbol is for an import stub. This is used for DLL import
268268 }
269269 break;
270270 case ARM::fixup_t2_movt_hi16:
271 Type = ELF::R_ARM_THM_MOVT_ABS;
271 switch (Modifier) {
272 default: llvm_unreachable("Unsupported Modifier");
273 case MCSymbolRefExpr::VK_None:
274 Type = ELF::R_ARM_THM_MOVT_ABS;
275 break;
276 case MCSymbolRefExpr::VK_ARM_SBREL:
277 Type = ELF:: R_ARM_THM_MOVT_BREL;
278 break;
279 }
272280 break;
273281 case ARM::fixup_t2_movw_lo16:
274 Type = ELF::R_ARM_THM_MOVW_ABS_NC;
282 switch (Modifier) {
283 default: llvm_unreachable("Unsupported Modifier");
284 case MCSymbolRefExpr::VK_None:
285 Type = ELF::R_ARM_THM_MOVW_ABS_NC;
286 break;
287 case MCSymbolRefExpr::VK_ARM_SBREL:
288 Type = ELF:: R_ARM_THM_MOVW_BREL_NC;
289 break;
290 }
275291 break;
276292 }
277293 }
1212 ; RUN: llc -relocation-model=rwpi -mtriple=thumbv6m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB1_RO_ABS --check-prefix=THUMB1_RW_SB
1313 ; RUN: llc -relocation-model=ropi-rwpi -mtriple=thumbv6m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB1_RO_PC --check-prefix=THUMB1_RW_SB
1414
15 ; RUN: llc -relocation-model=rwpi -mtriple=armv7a--none-eabi -mattr=no-movt < %s | FileCheck %s --check-prefix=CHECK --check-prefix=NO_MOVT_ARM_RO_ABS --check-prefix=NO_MOVT_ARM_RW_SB
16 ; RUN: llc -relocation-model=ropi-rwpi -mtriple=armv7a--none-eabi -mattr=no-movt < %s | FileCheck %s --check-prefix=CHECK --check-prefix=NO_MOVT_ARM_RO_PC --check-prefix=NO_MOVT_ARM_RW_SB
17
18 ; RUN: llc -relocation-model=rwpi -mtriple=thumbv7m--none-eabi -mattr=no-movt < %s | FileCheck %s --check-prefix=CHECK --check-prefix=NO_MOVT_THUMB2_RO_ABS --check-prefix=NO_MOVT_THUMB2_RW_SB
19 ; RUN: llc -relocation-model=ropi-rwpi -mtriple=thumbv7m--none-eabi -mattr=no-movt < %s | FileCheck %s --check-prefix=CHECK --check-prefix=NO_MOVT_THUMB2_RO_PC --check-prefix=NO_MOVT_THUMB2_RW_SB
20
1521 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
1622
1723 @a = external global i32, align 4
2733 ; ARM_RW_ABS: movt r[[REG]], :upper16:a
2834 ; ARM_RW_ABS: ldr r0, [r[[REG]]]
2935
30 ; ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
36 ; ARM_RW_SB: movw r[[REG:[0-9]]], :lower16:a(sbrel)
37 ; ARM_RW_SB: movt r[[REG]], :upper16:a(sbrel)
3138 ; ARM_RW_SB: ldr r0, [r9, r[[REG]]]
39
40 ; NO_MOVT_ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
41 ; NO_MOVT_ARM_RW_SB: ldr r0, [r9, r[[REG]]]
3242
3343 ; THUMB2_RW_ABS: movw r[[REG:[0-9]]], :lower16:a
3444 ; THUMB2_RW_ABS: movt r[[REG]], :upper16:a
3545 ; THUMB2_RW_ABS: ldr r0, [r[[REG]]]
3646
37 ; THUMB2_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
47 ; THUMB2_RW_SB: movw r[[REG:[0-9]]], :lower16:a(sbrel)
48 ; THUMB2_RW_SB: movt r[[REG]], :upper16:a(sbrel)
3849 ; THUMB2_RW_SB: ldr.w r0, [r9, r[[REG]]]
50
51 ; NO_MOVT_THUMB2_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
52 ; NO_MOVT_THUMB2_RW_SB: ldr.w r0, [r9, r[[REG]]]
3953
4054 ; THUMB1_RW_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
4155 ; THUMB1_RW_ABS: ldr r0, [r[[REG]]]
4660
4761 ; CHECK: {{(bx lr|pop)}}
4862
49 ; ARM_RW_SB: [[LCPI]]
50 ; ARM_RW_SB: .long a(sbrel)
51
52 ; THUMB2_RW_SB: [[LCPI]]
53 ; THUMB2_RW_SB: .long a(sbrel)
63 ; NO_MOVT_ARM_RW_SB: [[LCPI]]
64 ; NO_MOVT_ARM_RW_SB: .long a(sbrel)
65
66 ; NO_MOVT_THUMB2_RW_SB: [[LCPI]]
67 ; NO_MOVT_THUMB2_RW_SB: .long a(sbrel)
5468
5569 ; THUMB1_RW_ABS: [[LCPI]]
5670 ; THUMB1_RW_ABS-NEXT: .long a
6983 ; ARM_RW_ABS: movt r[[REG]], :upper16:a
7084 ; ARM_RW_ABS: str r0, [r[[REG:[0-9]]]]
7185
72 ; ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
73 ; ARM_RW_SB: str r0, [r9, r[[REG]]]
86 ; ARM_RW_SB: movw r[[REG:[0-9]]], :lower16:a
87 ; ARM_RW_SB: movt r[[REG]], :upper16:a
88 ; ARM_RW_SB: str r0, [r9, r[[REG:[0-9]]]]
89
90 ; NO_MOVT_ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
91 ; NO_MOVT_ARM_RW_SB: str r0, [r9, r[[REG]]]
7492
7593 ; THUMB2_RW_ABS: movw r[[REG:[0-9]]], :lower16:a
7694 ; THUMB2_RW_ABS: movt r[[REG]], :upper16:a
7795 ; THUMB2_RW_ABS: str r0, [r[[REG]]]
7896
79 ; THUMB2_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
97 ; THUMB2_RW_SB: movw r[[REG:[0-9]]], :lower16:a(sbrel)
98 ; THUMB2_RW_SB: movt r[[REG]], :upper16:a(sbrel)
8099 ; THUMB2_RW_SB: str.w r0, [r9, r[[REG]]]
100
101 ; NO_MOVT_THUMB2_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
102 ; NO_MOVT_THUMB2_RW_SB: str.w r0, [r9, r[[REG]]]
81103
82104 ; THUMB1_RW_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
83105 ; THUMB1_RW_ABS: str r0, [r[[REG]]]
88110
89111 ; CHECK: {{(bx lr|pop)}}
90112
91 ; ARM_RW_SB: [[LCPI]]
92 ; ARM_RW_SB: .long a(sbrel)
93
94 ; THUMB2_RW_SB: [[LCPI]]
95 ; THUMB2_RW_SB: .long a(sbrel)
113 ; NO_MOVT_ARM_RW_SB: [[LCPI]]
114 ; NO_MOVT_ARM_RW_SB: .long a(sbrel)
115
116 ; NO_MOVT_THUMB2_RW_SB: [[LCPI]]
117 ; NO_MOVT_THUMB2_RW_SB: .long a(sbrel)
96118
97119 ; THUMB1_RW_ABS: [[LCPI]]
98120 ; THUMB1_RW_ABS-NEXT: .long a
110132 ; ARM_RO_ABS: movw r[[reg:[0-9]]], :lower16:b
111133 ; ARM_RO_ABS: movt r[[reg]], :upper16:b
112134 ; ARM_RO_ABS: ldr r0, [r[[reg]]]
135
136 ; NO_MOVT_ARM_RO_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
137 ; NO_MOVT_ARM_RO_ABS: ldr r0, [r[[REG]]]
113138
114139 ; ARM_RO_PC: movw r[[REG:[0-9]]], :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+8))
115140 ; ARM_RO_PC: movt r[[REG]], :upper16:(b-([[LPC]]+8))
116141 ; ARM_RO_PC: [[LPC]]:
117142 ; ARM_RO_PC-NEXT: ldr r0, [pc, r[[REG]]]
118143
144 ; NO_MOVT_ARM_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
145 ; NO_MOVT_ARM_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]:
146 ; NO_MOVT_ARM_RO_PC: ldr r0, [pc, r[[REG]]]
147
119148 ; THUMB2_RO_ABS: movw r[[REG:[0-9]]], :lower16:b
120149 ; THUMB2_RO_ABS: movt r[[REG]], :upper16:b
121150 ; THUMB2_RO_ABS: ldr r0, [r[[REG]]]
151
152 ; NO_MOVT_THUMB2_RO_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
153 ; NO_MOVT_THUMB2_RO_ABS: ldr r0, [r[[REG]]]
122154
123155 ; THUMB2_RO_PC: movw r[[REG:[0-9]]], :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+4))
124156 ; THUMB2_RO_PC: movt r[[REG]], :upper16:(b-([[LPC]]+4))
126158 ; THUMB2_RO_PC-NEXT: add r[[REG]], pc
127159 ; THUMB2_RO_PC: ldr r0, [r[[REG]]]
128160
161 ; NO_MOVT_THUMB2_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
162 ; NO_MOVT_THUMB2_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]:
163 ; NO_MOVT_THUMB2_RO_PC-NEXT: add r[[REG]], pc
164 ; NO_MOVT_THUMB2_RO_PC: ldr r0, [r[[REG]]]
165
166
129167 ; THUMB1_RO_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
130168 ; THUMB1_RO_ABS: ldr r0, [r[[REG]]]
131169
136174
137175 ; CHECK: {{(bx lr|pop)}}
138176
177 ; NO_MOVT_ARM_RO_ABS: [[LCPI]]
178 ; NO_MOVT_ARM_RO_ABS-NEXT: .long b
179
180 ; NO_MOVT_THUMB2_RO_ABS: [[LCPI]]
181 ; NO_MOVT_THUMB2_RO_ABS-NEXT: .long b
182
139183 ; THUMB1_RO_ABS: [[LCPI]]
140184 ; THUMB1_RO_ABS-NEXT: .long b
141185
186 ; NO_MOVT_ARM_RO_PC: [[LCPI]]
187 ; NO_MOVT_ARM_RO_PC-NEXT: .long b-([[LPC]]+8)
188
189 ; NO_MOVT_THUMB2_RO_PC: [[LCPI]]
190 ; NO_MOVT_THUMB2_RO_PC-NEXT: .long b-([[LPC]]+4)
191
142192 ; THUMB1_RO_PC: [[LCPI]]
143193 ; THUMB1_RO_PC-NEXT: .long b-([[LPC]]+4)
144194 }
151201 ; ARM_RW_ABS: movw r[[REG:[0-9]]], :lower16:a
152202 ; ARM_RW_ABS: movt r[[REG]], :upper16:a
153203
154 ; ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
204 ; ARM_RW_SB: movw r[[REG:[0-9]]], :lower16:a(sbrel)
205 ; ARM_RW_SB: movt r[[REG]], :upper16:a(sbrel)
155206 ; ARM_RW_SB: add r0, r9, r[[REG]]
207
208 ; NO_MOVT_ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
209 ; NO_MOVT_ARM_RW_SB: add r0, r9, r[[REG]]
156210
157211 ; THUMB2_RW_ABS: movw r[[REG:[0-9]]], :lower16:a
158212 ; THUMB2_RW_ABS: movt r[[REG]], :upper16:a
159213
160 ; THUMB2_RW_SB: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
214 ; THUMB2_RW_SB: movw r[[REG:[0-9]]], :lower16:a(sbrel)
215 ; THUMB2_RW_SB: movt r[[REG]], :upper16:a(sbrel)
161216 ; THUMB2_RW_SB: add r0, r9
217
218 ; NO_MOVT_THUMB2_RW_SB: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
219 ; NO_MOVT_THUMB2_RW_SB: add r0, r9
162220
163221 ; THUMB1_RW_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
164222
168226
169227 ; CHECK: {{(bx lr|pop)}}
170228
171 ; ARM_RW_SB: [[LCPI]]
172 ; ARM_RW_SB: .long a(sbrel)
173
174 ; THUMB2_RW_SB: [[LCPI]]
175 ; THUMB2_RW_SB: .long a(sbrel)
229 ; NO_MOVT_ARM_RW_SB: [[LCPI]]
230 ; NO_MOVT_ARM_RW_SB: .long a(sbrel)
231
232 ; NO_MOVT_THUMB2_RW_SB: [[LCPI]]
233 ; NO_MOVT_THUMB2_RW_SB: .long a(sbrel)
176234
177235 ; THUMB1_RW_ABS: [[LCPI]]
178236 ; THUMB1_RW_ABS-NEXT: .long a
188246
189247 ; ARM_RO_ABS: movw r[[REG:[0-9]]], :lower16:b
190248 ; ARM_RO_ABS: movt r[[REG]], :upper16:b
249
250 ; NO_MOVT_ARM_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
191251
192252 ; ARM_RO_PC: movw r[[REG:[0-9]]], :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+8))
193253 ; ARM_RO_PC: movt r[[REG]], :upper16:(b-([[LPC]]+8))
194254 ; ARM_RO_PC: [[LPC]]:
195255 ; ARM_RO_PC-NEXT: add r0, pc, r[[REG:[0-9]]]
196256
257 ; NO_MOVT_ARM_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
258 ; NO_MOVT_ARM_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]:
259 ; NO_MOVT_ARM_RO_PC-NEXT: add r0, pc, r[[REG]]
260
197261 ; THUMB2_RO_ABS: movw r[[REG:[0-9]]], :lower16:b
198262 ; THUMB2_RO_ABS: movt r[[REG]], :upper16:b
263
264 ; NO_MOVT_THUMB2_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
199265
200266 ; THUMB2_RO_PC: movw r0, :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+4))
201267 ; THUMB2_RO_PC: movt r0, :upper16:(b-([[LPC]]+4))
202268 ; THUMB2_RO_PC: [[LPC]]:
203269 ; THUMB2_RO_PC-NEXT: add r0, pc
204270
271 ; NO_MOVT_THUMB2_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
272 ; NO_MOVT_THUMB2_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]:
273 ; NO_MOVT_THUMB2_RO_PC-NEXT: add r[[REG]], pc
274
205275 ; THUMB1_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
206276
207277 ; THUMB1_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
210280
211281 ; CHECK: {{(bx lr|pop)}}
212282
283 ; NO_MOVT_ARM_RO_ABS: [[LCPI]]
284 ; NO_MOVT_ARM_RO_ABS-NEXT: .long b
285
286 ; NO_MOVT_THUMB2_RO_ABS: [[LCPI]]
287 ; NO_MOVT_THUMB2_RO_ABS-NEXT: .long b
288
213289 ; THUMB1_RO_ABS: [[LCPI]]
214290 ; THUMB1_RO_ABS-NEXT: .long b
215291
292 ; NO_MOVT_ARM_RO_PC: [[LCPI]]
293 ; NO_MOVT_ARM_RO_PC-NEXT: .long b-([[LPC]]+8)
294
295 ; NO_MOVT_THUMB2_RO_PC: [[LCPI]]
296 ; NO_MOVT_THUMB2_RO_PC-NEXT: .long b-([[LPC]]+4)
297
216298 ; THUMB1_RO_PC: [[LCPI]]
217299 ; THUMB1_RO_PC-NEXT: .long b-([[LPC]]+4)
218300 }
224306
225307 ; ARM_RO_ABS: movw r[[REG:[0-9]]], :lower16:take_addr_func
226308 ; ARM_RO_ABS: movt r[[REG]], :upper16:take_addr_func
309
310 ; NO_MOVT_ARM_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
227311
228312 ; ARM_RO_PC: movw r[[REG:[0-9]]], :lower16:(take_addr_func-([[LPC:.LPC[0-9]+_[0-9]+]]+8))
229313 ; ARM_RO_PC: movt r[[REG]], :upper16:(take_addr_func-([[LPC]]+8))
230314 ; ARM_RO_PC: [[LPC]]:
231315 ; ARM_RO_PC-NEXT: add r0, pc, r[[REG:[0-9]]]
232316
317 ; NO_MOVT_ARM_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
318 ; NO_MOVT_ARM_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]:
319 ; NO_MOVT_ARM_RO_PC-NEXT: add r0, pc, r[[REG]]
320
233321 ; THUMB2_RO_ABS: movw r[[REG:[0-9]]], :lower16:take_addr_func
234322 ; THUMB2_RO_ABS: movt r[[REG]], :upper16:take_addr_func
323
324 ; NO_MOVT_THUMB2_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
235325
236326 ; THUMB2_RO_PC: movw r0, :lower16:(take_addr_func-([[LPC:.LPC[0-9]+_[0-9]+]]+4))
237327 ; THUMB2_RO_PC: movt r0, :upper16:(take_addr_func-([[LPC]]+4))
238328 ; THUMB2_RO_PC: [[LPC]]:
239329 ; THUMB2_RO_PC-NEXT: add r0, pc
240330
331 ; NO_MOVT_THUMB2_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
332 ; NO_MOVT_THUMB2_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]:
333 ; NO_MOVT_THUMB2_RO_PC-NEXT: add r[[REG]], pc
334
241335 ; THUMB1_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]]
242336
243337 ; THUMB1_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]]
246340
247341 ; CHECK: {{(bx lr|pop)}}
248342
343 ; NO_MOVT_ARM_RO_ABS: [[LCPI]]
344 ; NO_MOVT_ARM_RO_ABS-NEXT: .long take_addr_func
345
346 ; NO_MOVT_THUMB2_RO_ABS: [[LCPI]]
347 ; NO_MOVT_THUMB2_RO_ABS-NEXT: .long take_addr_func
348
249349 ; THUMB1_RO_ABS: [[LCPI]]
250350 ; THUMB1_RO_ABS-NEXT: .long take_addr_func
351
352 ; NO_MOVT_ARM_RO_PC: [[LCPI]]
353 ; NO_MOVT_ARM_RO_PC-NEXT: .long take_addr_func-([[LPC]]+8)
354
355 ; NO_MOVT_THUMB2_RO_PC: [[LCPI]]
356 ; NO_MOVT_THUMB2_RO_PC-NEXT: .long take_addr_func-([[LPC]]+4)
251357
252358 ; THUMB1_RO_PC: [[LCPI]]
253359 ; THUMB1_RO_PC-NEXT: .long take_addr_func-([[LPC]]+4)