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ARM: add @llvm.arm.space intrinsic for testing ConstantIslands. Creating tests for the ConstantIslands pass is very difficult, since it depends on precise layout details. Having the ability to precisely inject a number of bytes into the stream helps greatly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221903 91177308-0d34-0410-b5e6-96231b3b80d8 Tim Northover 5 years ago
5 changed file(s) with 34 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
1818
1919 def int_arm_thread_pointer : GCCBuiltin<"__builtin_thread_pointer">,
2020 Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
21
22 // A space-consuming intrinsic primarily for testing ARMConstantIslands. The
23 // first argument is the number of bytes this "instruction" takes up, the second
24 // and return value are essentially chains, used to force ordering during ISel.
25 def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
2126
2227 //===----------------------------------------------------------------------===//
2328 // Saturating Arithmetic
15911591 EmitJumpTable(MI);
15921592 return;
15931593 }
1594 case ARM::SPACE:
1595 OutStreamer.EmitZeros(MI->getOperand(1).getImm());
1596 return;
15941597 case ARM::TRAP: {
15951598 // Non-Darwin binutils don't yet support the "trap" mnemonic.
15961599 // FIXME: Remove this special case when they do.
673673 ++NumEntries;
674674 return NumEntries * EntrySize + InstSize;
675675 }
676 case ARM::SPACE:
677 return MI->getOperand(1).getImm();
676678 }
677679 }
678680
56205620 // is discarded.
56215621 def ITasm : ARMAsmPseudo<"it$mask $cc", (ins it_pred:$cc, it_mask:$mask)>,
56225622 ComplexDeprecationPredicate<"IT">;
5623
5624 let mayLoad = 1, mayStore =1, hasSideEffects = 1 in
5625 def SPACE : PseudoInst<(outs GPR:$Rd), (ins i32imm:$size, GPR:$Rn),
5626 NoItinerary,
5627 [(set GPR:$Rd, (int_arm_space imm:$size, GPR:$Rn))]>;
0 ; RUN: llc -mtriple=armv7 -o - %s | FileCheck %s
1
2 define i32 @test_space() minsize {
3 ; CHECK-LABEL: test_space:
4 ; CHECK: ldr {{r[0-9]+}}, [[CPENTRY:.?LCPI[0-9]+_[0-9]+]]
5 ; CHECK: b [[PAST_CP:.?LBB[0-9]+_[0-9]+]]
6
7 ; CHECK: [[CPENTRY]]:
8 ; CHECK-NEXT: 12345678
9
10 ; CHECK: [[PAST_CP]]:
11 ; CHECK: .zero 10000
12 %addr = inttoptr i32 12345678 to i32*
13 %val = load i32* %addr
14 call i32 @llvm.arm.space(i32 10000, i32 undef)
15 ret i32 %val
16 }
17
18 declare i32 @llvm.arm.space(i32, i32)