llvm.org GIT mirror llvm / 5bbee4b
Work around an interaction between fast-isel and regalloc=local. The local register allocator's physreg liveness doesn't recognize subregs, so it doesn't know that defs of %ecx that are immediately followed by uses of %cl aren't dead. This comes up due to the way fast-isel emits shift instructions. This is a temporary workaround. Arguably, local regalloc should handle subreg references correctly. On the other hand, perhaps fast-isel should use INSERT_SUBREG instead of just assigning to the most convenient super-register of %cl when lowering shifts. This fixes MultiSource/Benchmarks/MallocBench/espresso, MultiSource/Applications/hexxagon, and others, under -fast. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56947 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 12 years ago
1 changed file(s) with 5 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
740740 if (Op1Reg == 0) return false;
741741 TII.copyRegToReg(*MBB, MBB->end(), CReg, Op1Reg, RC, RC);
742742 unsigned ResultReg = createResultReg(RC);
743 BuildMI(MBB, TII.get(OpReg), ResultReg).addReg(Op0Reg);
743 BuildMI(MBB, TII.get(OpReg), ResultReg).addReg(Op0Reg)
744 // FIXME: The "Local" register allocator's physreg liveness doesn't
745 // recognize subregs. Adding the superreg of CL that's actually defined
746 // prevents it from being re-allocated for this instruction.
747 .addReg(CReg, false, true);
744748 UpdateValueMap(I, ResultReg);
745749 return true;
746750 }