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[GlobalISel][X86] Support G_IMPLICIT_DEF. Summary: Support G_IMPLICIT_DEF. Reviewers: zvi, guyblank, t.p.northover Reviewed By: guyblank Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D36733 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311633 91177308-0d34-0410-b5e6-96231b3b80d8 Igor Breger 2 years ago
7 changed file(s) with 307 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
8484 MachineFunction &MF) const;
8585 bool selectCondBranch(MachineInstr &I, MachineRegisterInfo &MRI,
8686 MachineFunction &MF) const;
87 bool selectImplicitDef(MachineInstr &I, MachineRegisterInfo &MRI) const;
8788
8889 // emit insert subreg instruction and insert it before MachineInstr &I
8990 bool emitInsertSubreg(unsigned DstReg, unsigned SrcReg, MachineInstr &I,
332333 if (selectInsert(I, MRI, MF))
333334 return true;
334335 if (selectCondBranch(I, MRI, MF))
336 return true;
337 if (selectImplicitDef(I, MRI))
335338 return true;
336339
337340 return false;
11271130 return true;
11281131 }
11291132
1133 bool X86InstructionSelector::selectImplicitDef(MachineInstr &I,
1134 MachineRegisterInfo &MRI) const {
1135
1136 if (I.getOpcode() != TargetOpcode::G_IMPLICIT_DEF)
1137 return false;
1138
1139 unsigned DstReg = I.getOperand(0).getReg();
1140
1141 if (!MRI.getRegClassOrNull(DstReg)) {
1142 const LLT DstTy = MRI.getType(DstReg);
1143 const TargetRegisterClass *RC = getRegClass(DstTy, DstReg, MRI);
1144
1145 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) {
1146 DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
1147 << " operand\n");
1148 return false;
1149 }
1150 }
1151
1152 I.setDesc(TII.get(X86::IMPLICIT_DEF));
1153 return true;
1154 }
1155
11301156 InstructionSelector *
11311157 llvm::createX86InstructionSelector(const X86TargetMachine &TM,
11321158 X86Subtarget &Subtarget,
5151 const LLT s32 = LLT::scalar(32);
5252 const LLT s64 = LLT::scalar(64);
5353
54 for (auto Ty : {p0, s1, s8, s16, s32})
55 setAction({G_IMPLICIT_DEF, Ty}, Legal);
56
5457 for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
5558 for (auto Ty : {s8, s16, s32})
5659 setAction({BinOp, Ty}, Legal);
119122 const LLT s32 = LLT::scalar(32);
120123 const LLT s64 = LLT::scalar(64);
121124
125 for (auto Ty : {p0, s1, s8, s16, s32, s64})
126 setAction({G_IMPLICIT_DEF, Ty}, Legal);
127
122128 for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
123129 for (auto Ty : {s8, s16, s32, s64})
124130 setAction({BinOp, Ty}, Legal);
210210
211211 switch (MI.getOpcode()) {
212212 case TargetOpcode::G_LOAD:
213 case TargetOpcode::G_STORE: {
213 case TargetOpcode::G_STORE:
214 case TargetOpcode::G_IMPLICIT_DEF: {
214215 // we going to try to map 32/64 bit to PMI_FP32/PMI_FP64
215216 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI);
216217 if (Size != 32 && Size != 64)
0 # RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
1 # RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
2
3 ---
4 name: test_implicit_def
5 # ALL-LABEL: name: test_implicit_def
6 registers:
7 # X64: %0(s1) = G_IMPLICIT_DEF
8 # X64-NEXT: %1(s8) = G_IMPLICIT_DEF
9 # X64-NEXT: %2(s16) = G_IMPLICIT_DEF
10 # X64-NEXT: %3(s32) = G_IMPLICIT_DEF
11 # X64-NEXT: %4(s64) = G_IMPLICIT_DEF
12 #
13 # X32: %0(s1) = G_IMPLICIT_DEF
14 # X32-NEXT: %1(s8) = G_IMPLICIT_DEF
15 # X32-NEXT: %2(s16) = G_IMPLICIT_DEF
16 # X32-NEXT: %3(s32) = G_IMPLICIT_DEF
17 # X32-NEXT: %5(s32) = G_IMPLICIT_DEF
18 # X32-NEXT: %6(s32) = G_IMPLICIT_DEF
19 # X32-NEXT: %4(s64) = G_MERGE_VALUES %5(s32), %6(s32)
20 body: |
21 bb.0.entry:
22 liveins:
23 %0:_(s1) = G_IMPLICIT_DEF
24 %1:_(s8) = G_IMPLICIT_DEF
25 %2:_(s16) = G_IMPLICIT_DEF
26 %3:_(s32) = G_IMPLICIT_DEF
27 %4:_(s64) = G_IMPLICIT_DEF
28 ...
180180 ret i32* @g_int
181181 }
182182
183 define i8 @test_undef() {
184 ret i8 undef
185 }
186
187 define i8 @test_undef2(i8 %a) {
188 %r = add i8 %a, undef
189 ret i8 %r
190 }
191
192 define float @test_undef3() {
193 ret float undef
194 }
195
196 define float @test_undef4(float %a) {
197 %r = fadd float %a, undef
198 ret float %r
199 }
183200 ...
184201 ---
185202 name: test_add_i8
11101127 RET 0, implicit %rax
11111128
11121129 ...
1113
1130 ---
1131 name: test_undef
1132 # CHECK-LABEL: name: test_undef
1133 alignment: 4
1134 legalized: true
1135 regBankSelected: false
1136 # CHECK: registers:
1137 # CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
1138 registers:
1139 - { id: 0, class: _, preferred-register: '' }
1140 liveins:
1141 fixedStack:
1142 stack:
1143 constants:
1144 # CHECK: %0(s8) = G_IMPLICIT_DEF
1145 # CHECK-NEXT: %al = COPY %0(s8)
1146 # CHECK-NEXT: RET 0, implicit %al
1147 body: |
1148 bb.1 (%ir-block.0):
1149 %0(s8) = G_IMPLICIT_DEF
1150 %al = COPY %0(s8)
1151 RET 0, implicit %al
1152
1153 ...
1154 ---
1155 name: test_undef2
1156 # CHECK-LABEL: name: test_undef2
1157 alignment: 4
1158 legalized: true
1159 regBankSelected: false
1160 # CHECK: registers:
1161 # CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
1162 # CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
1163 # CHECK-NEXT: - { id: 2, class: gpr, preferred-register: '' }
1164 registers:
1165 - { id: 0, class: _, preferred-register: '' }
1166 - { id: 1, class: _, preferred-register: '' }
1167 - { id: 2, class: _, preferred-register: '' }
1168 liveins:
1169 fixedStack:
1170 stack:
1171 constants:
1172 # CHECK: %0(s8) = COPY %edi
1173 # CHECK-NEXT: %1(s8) = G_IMPLICIT_DEF
1174 # CHECK-NEXT: %2(s8) = G_ADD %0, %1
1175 # CHECK-NEXT: %al = COPY %2(s8)
1176 # CHECK-NEXT: RET 0, implicit %al
1177 body: |
1178 bb.1 (%ir-block.0):
1179 liveins: %edi
1180
1181 %0(s8) = COPY %edi
1182 %1(s8) = G_IMPLICIT_DEF
1183 %2(s8) = G_ADD %0, %1
1184 %al = COPY %2(s8)
1185 RET 0, implicit %al
1186
1187 ...
1188 ---
1189 name: test_undef3
1190 # CHECK-LABEL: name: test_undef3
1191 alignment: 4
1192 legalized: true
1193 regBankSelected: false
1194 # CHECK: registers:
1195 # CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
1196 registers:
1197 - { id: 0, class: _, preferred-register: '' }
1198 liveins:
1199 fixedStack:
1200 stack:
1201 constants:
1202 # CHECK: %0(s32) = G_IMPLICIT_DEF
1203 # CHECK-NEXT: %xmm0 = COPY %0(s32)
1204 # CHECK-NEXT: RET 0, implicit %xmm0
1205 body: |
1206 bb.1 (%ir-block.0):
1207 %0(s32) = G_IMPLICIT_DEF
1208 %xmm0 = COPY %0(s32)
1209 RET 0, implicit %xmm0
1210
1211 ...
1212 ---
1213 name: test_undef4
1214 # CHECK-LABEL: name: test_undef4
1215 alignment: 4
1216 legalized: true
1217 regBankSelected: false
1218 # CHECK: registers:
1219 # CHECK-NEXT: - { id: 0, class: vecr, preferred-register: '' }
1220 # CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
1221 # CHECK-NEXT: - { id: 2, class: vecr, preferred-register: '' }
1222 # CHECK-NEXT: - { id: 3, class: vecr, preferred-register: '' }
1223 registers:
1224 - { id: 0, class: _, preferred-register: '' }
1225 - { id: 1, class: _, preferred-register: '' }
1226 - { id: 2, class: _, preferred-register: '' }
1227 liveins:
1228 fixedStack:
1229 stack:
1230 constants:
1231 # CHECK: %0(s32) = COPY %xmm0
1232 # CHECK-NEXT: %1(s32) = G_IMPLICIT_DEF
1233 # CHECK-NEXT: %3(s32) = COPY %1(s32)
1234 # CHECK-NEXT: %2(s32) = G_FADD %0, %3
1235 # CHECK-NEXT: %xmm0 = COPY %2(s32)
1236 # CHECK-NEXT: RET 0, implicit %xmm0
1237 body: |
1238 bb.1 (%ir-block.0):
1239 liveins: %xmm0
1240
1241 %0(s32) = COPY %xmm0
1242 %1(s32) = G_IMPLICIT_DEF
1243 %2(s32) = G_FADD %0, %1
1244 %xmm0 = COPY %2(s32)
1245 RET 0, implicit %xmm0
1246
1247 ...
1248
0 # RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
1 --- |
2
3 define i8 @test() {
4 ret i8 undef
5 }
6
7 define i8 @test2(i8 %a) {
8 %r = add i8 %a, undef
9 ret i8 %r
10 }
11
12 ...
13 ---
14 name: test
15 # ALL-LABEL: name: test
16 alignment: 4
17 legalized: true
18 regBankSelected: true
19 # ALL: registers:
20 # ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
21 registers:
22 - { id: 0, class: gpr, preferred-register: '' }
23 liveins:
24 fixedStack:
25 stack:
26 constants:
27 # ALL: %0 = IMPLICIT_DEF
28 # ALL-NEXT: %al = COPY %0
29 # ALL-NEXT: RET 0, implicit %al
30 body: |
31 bb.1 (%ir-block.0):
32 %0(s8) = G_IMPLICIT_DEF
33 %al = COPY %0(s8)
34 RET 0, implicit %al
35
36 ...
37 ---
38 name: test2
39 # ALL-LABEL: name: test2
40 alignment: 4
41 legalized: true
42 regBankSelected: true
43 # ALL: registers:
44 # ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
45 # ALL-NEXT: - { id: 1, class: gr8, preferred-register: '' }
46 # ALL-NEXT: - { id: 2, class: gr8, preferred-register: '' }
47 registers:
48 - { id: 0, class: gpr, preferred-register: '' }
49 - { id: 1, class: gpr, preferred-register: '' }
50 - { id: 2, class: gpr, preferred-register: '' }
51 liveins:
52 fixedStack:
53 stack:
54 constants:
55 # ALL: %0 = COPY %dil
56 # ALL-NEXT: %1 = IMPLICIT_DEF
57 # ALL-NEXT: %2 = ADD8rr %0, %1, implicit-def %eflags
58 # ALL-NEXT: %al = COPY %2
59 # ALL-NEXT: RET 0, implicit %al
60 body: |
61 bb.1 (%ir-block.0):
62 liveins: %edi
63
64 %0(s8) = COPY %edi
65 %1(s8) = G_IMPLICIT_DEF
66 %2(s8) = G_ADD %0, %1
67 %al = COPY %2(s8)
68 RET 0, implicit %al
69
70 ...
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
2
3 define i8 @test() {
4 ; ALL-LABEL: test:
5 ; ALL: # BB#0:
6 ; ALL-NEXT: retq
7 ret i8 undef
8 }
9
10 define i8 @test2(i8 %a) {
11 ; ALL-LABEL: test2:
12 ; ALL: # BB#0:
13 ; ALL-NEXT: addb %al, %dil
14 ; ALL-NEXT: movl %edi, %eax
15 ; ALL-NEXT: retq
16 %r = add i8 %a, undef
17 ret i8 %r
18 }
19
20
21 define float @test3() {
22 ; ALL-LABEL: test3:
23 ; ALL: # BB#0:
24 ; ALL-NEXT: retq
25 ret float undef
26 }
27
28 define float @test4(float %a) {
29 ; ALL-LABEL: test4:
30 ; ALL: # BB#0:
31 ; ALL-NEXT: addss %xmm0, %xmm0
32 ; ALL-NEXT: retq
33 %r = fadd float %a, undef
34 ret float %r
35 }
36