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Merging r243661: ------------------------------------------------------------------------ r243661 | Matthew.Arsenault | 2015-07-30 13:03:11 -0400 (Thu, 30 Jul 2015) | 6 lines AMDGPU: Set SubRegIndex size and offset I'm not sure what reasons the comment here could have had for not setting these. Without these set, there is an assertion hit during DWARF emission. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@253230 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 3 years ago
1 changed file(s) with 1 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
1313 let Namespace = "AMDGPU" in {
1414
1515 foreach Index = 0-15 in {
16 // Indices are used in a variety of ways here, so don't set a size/offset.
17 def sub#Index : SubRegIndex<-1, -1>;
16 def sub#Index : SubRegIndex<32, !shl(Index, 5)>;
1817 }
1918
2019 def INDIRECT_BASE_ADDR : Register <"INDIRECT_BASE_ADDR">;