llvm.org GIT mirror llvm / 58bfcdb
Thread comparisons over udiv/sdiv/ashr/lshr exact and lshr nuw/nsw whenever possible. This goes into instcombine and instsimplify because instsimplify doesn't need to check hasOneUse since it returns (almost exclusively) constants. This fixes PR9343 #4 #5 and #8! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127064 91177308-0d34-0410-b5e6-96231b3b80d8 Nick Lewycky 8 years ago
4 changed file(s) with 109 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
13431343 // the compare, and if only one of them is then we moved it to RHS already.
13441344 if (isa(LHS) && (isa(RHS) || isa(RHS) ||
13451345 isa(RHS)))
1346 // We already know that LHS != LHS.
1346 // We already know that LHS != RHS.
13471347 return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred));
13481348
13491349 // If we are comparing with zero then try hard since this is a common case.
16961696 case ICmpInst::ICMP_ULT:
16971697 case ICmpInst::ICMP_ULE:
16981698 return ConstantInt::getTrue(RHS->getContext());
1699 }
1700 }
1701
1702 if (MaxRecurse && LBO && RBO && LBO->getOpcode() == RBO->getOpcode() &&
1703 LBO->getOperand(1) == RBO->getOperand(1)) {
1704 switch (LBO->getOpcode()) {
1705 default: break;
1706 case Instruction::UDiv:
1707 case Instruction::LShr:
1708 if (ICmpInst::isSigned(Pred))
1709 break;
1710 // fall-through
1711 case Instruction::SDiv:
1712 case Instruction::AShr:
1713 if (!LBO->isExact() && !RBO->isExact())
1714 break;
1715 if (Value *V = SimplifyICmpInst(Pred, LBO->getOperand(0),
1716 RBO->getOperand(0), TD, DT, MaxRecurse-1))
1717 return V;
1718 break;
1719 case Instruction::Shl: {
1720 bool NUW = LBO->hasNoUnsignedWrap() && LBO->hasNoUnsignedWrap();
1721 bool NSW = LBO->hasNoSignedWrap() && RBO->hasNoSignedWrap();
1722 if (!NUW && !NSW)
1723 break;
1724 if (!NSW && ICmpInst::isSigned(Pred))
1725 break;
1726 if (Value *V = SimplifyICmpInst(Pred, LBO->getOperand(0),
1727 RBO->getOperand(0), TD, DT, MaxRecurse-1))
1728 return V;
1729 break;
1730 }
16991731 }
17001732 }
17011733
23922392 }
23932393 }
23942394 break;
2395 case Instruction::UDiv:
2396 case Instruction::LShr:
2397 if (I.isSigned())
2398 break;
2399 // fall-through
2400 case Instruction::SDiv:
2401 case Instruction::AShr:
2402 if (!BO0->isExact() && !BO1->isExact())
2403 break;
2404 return new ICmpInst(I.getPredicate(), BO0->getOperand(0),
2405 BO1->getOperand(0));
2406 case Instruction::Shl: {
2407 bool NUW = BO0->hasNoUnsignedWrap() && BO1->hasNoUnsignedWrap();
2408 bool NSW = BO0->hasNoSignedWrap() && BO1->hasNoSignedWrap();
2409 if (!NUW && !NSW)
2410 break;
2411 if (!NSW && I.isSigned())
2412 break;
2413 return new ICmpInst(I.getPredicate(), BO0->getOperand(0),
2414 BO1->getOperand(0));
2415 }
23952416 }
23962417 }
23972418 }
418418 %B = icmp slt i32 %Y, %A
419419 ret i1 %B
420420 }
421
422 ; CHECK: @test44
423 ; CHECK: %B = icmp sgt i32 %Y, -1
424 define i1 @test44(i32 %X, i32 %Y) {
425 %A = srem i32 %X, %Y
426 %B = icmp slt i32 %A, %Y
427 ret i1 %B
428 }
429
430 ; CHECK: @test45
431 ; CHECK: %B = icmp slt i32 %Y, 0
432 define i1 @test45(i32 %X, i32 %Y) {
433 %A = srem i32 %X, %Y
434 %B = icmp slt i32 %Y, %A
435 ret i1 %B
436 }
437
438 ; PR9343 #4
439 ; CHECK: @test46
440 ; CHECK: %C = icmp ult i32 %X, %Y
441 define i1 @test46(i32 %X, i32 %Y, i32 %Z) {
442 %A = ashr exact i32 %X, %Z
443 %B = ashr exact i32 %Y, %Z
444 %C = icmp ult i32 %A, %B
445 ret i1 %C
446 }
447
448 ; PR9343 #5
449 ; CHECK: @test47
450 ; CHECK: %C = icmp ugt i32 %X, %Y
451 define i1 @test47(i32 %X, i32 %Y, i32 %Z) {
452 %A = ashr exact i32 %X, %Z
453 %B = ashr exact i32 %Y, %Z
454 %C = icmp ugt i32 %A, %B
455 ret i1 %C
456 }
457
458 ; PR9343 #8
459 ; CHECK: @test48
460 ; CHECK: %C = icmp eq i32 %X, %Y
461 define i1 @test48(i32 %X, i32 %Y, i32 %Z) {
462 %A = sdiv exact i32 %X, %Z
463 %B = sdiv exact i32 %Y, %Z
464 %C = icmp eq i32 %A, %B
465 ret i1 %C
466 }
260260 ; CHECK: ret i1 true
261261 }
262262
263 define i1 @udiv2(i32 %X, i32 %Y, i32 %Z) {
264 ; CHECK: @udiv2
265 %A = udiv exact i32 10, %Z
266 %B = udiv exact i32 20, %Z
267 %C = icmp ult i32 %A, %B
268 ret i1 %C
269 ; CHECK: ret i1 true
270 }
271
263272 define i1 @sdiv1(i32 %X) {
264273 ; CHECK: @sdiv1
265274 %A = sdiv i32 %X, 1000000