llvm.org GIT mirror llvm / 58421d7
initial implementation of ARMRegisterInfo::eliminateFrameIndex fixes test/Regression/CodeGen/ARM/ret_arg5.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 14 years ago
4 changed file(s) with 34 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
5252
5353 def movri : InstARM<(ops IntRegs:$dst, i32imm:$src),
5454 "mov $dst, $src", [(set IntRegs:$dst, imm:$src)]>;
55
56 def addri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b),
57 "add $dst, $a, $b",
58 [(set IntRegs:$dst, (add IntRegs:$a, imm:$b))]>;
7676
7777 void
7878 ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
79 assert(0 && "Not Implemented");
79 MachineInstr &MI = *II;
80 MachineBasicBlock &MBB = *MI.getParent();
81 MachineFunction &MF = *MBB.getParent();
82
83 assert (MI.getOpcode() == ARM::movrr);
84
85 unsigned FrameIdx = 1;
86
87 int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex();
88
89 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
90
91 unsigned StackSize = MF.getFrameInfo()->getStackSize();
92
93 Offset += StackSize;
94
95 // Insert a set of r12 with the full address
96 // r12 = r13 + offset
97 MachineBasicBlock *MBB2 = MI.getParent();
98 BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
99
100 // Replace the FrameIndex with r12
101 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
80102 }
81103
82104 void ARMRegisterInfo::
4949 let MethodBodies = [{
5050 IntRegsClass::iterator
5151 IntRegsClass::allocation_order_end(MachineFunction &MF) const {
52 return end() - 1;
52 // r15 == Program Counter
53 // r14 == Link Register
54 // r13 == Stack Pointer
55 // r12 == ip (scratch)
56 // r11 == Frame Pointer
57 // r10 == Stack Limit
58 return end() - 4;
5359 }
5460 }];
5561 }
0 ; RUN: llvm-as < %s | llc -march=arm
1 ; XFAIL: *
21 int %test(int %a1, int %a2, int %a3, int %a4, int %a5) {
32 ret int %a5
43 }