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[ARM GlobalISel] Legalize extensions to < 32 bits Make it legal to extend from e.g. s1 to s8 or s16. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359766 91177308-0d34-0410-b5e6-96231b3b80d8 Diana Picus 8 months ago
2 changed file(s) with 134 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
8181 }
8282
8383 getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
84 .legalForCartesianProduct({s32}, {s1, s8, s16});
84 .legalForCartesianProduct({s8, s16, s32}, {s1, s8, s16});
8585
8686 getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
8787 .legalFor({s32})
0 # RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s
11 # RUN: llc -mtriple thumb-- -mattr=+v6t2 -run-pass=legalizer %s -o - | FileCheck %s
22 --- |
3 define void @test_zext_s16() { ret void }
4 define void @test_sext_s8() { ret void }
5 define void @test_anyext_s1() { ret void }
6 ...
7 ---
8 name: test_zext_s16
9 # CHECK-LABEL: name: test_zext_s16
3 define void @test_zext_s16_to_s32() { ret void }
4 define void @test_sext_s8_to_s32() { ret void }
5 define void @test_anyext_s1_to_s32() { ret void }
6
7 define void @test_zext_s8_to_s16() { ret void }
8 define void @test_sext_s1_to_s16() { ret void }
9
10 define void @test_anyext_s1_to_s8() { ret void }
11
12 define void @test_ext_combine() { ret void }
13 ...
14 ---
15 name: test_zext_s16_to_s32
16 # CHECK-LABEL: name: test_zext_s16_to_s32
1017 legalized: false
1118 # CHECK: legalized: true
1219 regBankSelected: false
2936 BX_RET 14, $noreg, implicit $r0
3037 ...
3138 ---
32 name: test_sext_s8
33 # CHECK-LABEL: name: test_sext_s8
39 name: test_sext_s8_to_s32
40 # CHECK-LABEL: name: test_sext_s8_to_s32
3441 legalized: false
3542 # CHECK: legalized: true
3643 regBankSelected: false
5360 BX_RET 14, $noreg, implicit $r0
5461 ...
5562 ---
56 name: test_anyext_s1
57 # CHECK-LABEL: name: test_anyext_s1
63 name: test_anyext_s1_to_s32
64 # CHECK-LABEL: name: test_anyext_s1_to_s32
5865 legalized: false
5966 # CHECK: legalized: true
6067 regBankSelected: false
7683 $r0 = COPY %2(s32)
7784 BX_RET 14, $noreg, implicit $r0
7885 ...
86 ---
87 name: test_zext_s8_to_s16
88 # CHECK-LABEL: name: test_zext_s8_to_s16
89 legalized: false
90 # CHECK: legalized: true
91 regBankSelected: false
92 selected: false
93 tracksRegLiveness: true
94 registers:
95 - { id: 0, class: _ }
96 - { id: 1, class: _ }
97 - { id: 2, class: _ }
98 body: |
99 bb.0:
100 liveins: $r0
101
102 %0(p0) = COPY $r0
103 %1(s8) = G_LOAD %0(p0) :: (load 1)
104 %2(s16) = G_ZEXT %1
105 ; G_ZEXT from s8 to s16 is legal, so we should find it unchanged in the output
106 ; CHECK: {{%[0-9]+}}:_(s16) = G_ZEXT {{%[0-9]+}}(s8)
107 G_STORE %2(s16), %0(p0) :: (store 2)
108 BX_RET 14, $noreg
109 ...
110 ---
111 name: test_sext_s1_to_s16
112 # CHECK-LABEL: name: test_sext_s1_to_s16
113 legalized: false
114 # CHECK: legalized: true
115 regBankSelected: false
116 selected: false
117 tracksRegLiveness: true
118 registers:
119 - { id: 0, class: _ }
120 - { id: 1, class: _ }
121 - { id: 2, class: _ }
122 body: |
123 bb.0:
124 liveins: $r0
125
126 %0(p0) = COPY $r0
127 %1(s1) = G_LOAD %0(p0) :: (load 1)
128 %2(s16) = G_SEXT %1(s1)
129 ; G_SEXT from s1 to s16 is legal, so we should find it unchanged in the output
130 ; CHECK: {{%[0-9]+}}:_(s16) = G_SEXT {{%[0-9]+}}(s1)
131 G_STORE %2(s16), %0(p0) :: (store 2)
132 BX_RET 14, $noreg
133 ...
134 ---
135 name: test_anyext_s1_to_s8
136 # CHECK-LABEL: name: test_anyext_s1_to_s8
137 legalized: false
138 # CHECK: legalized: true
139 regBankSelected: false
140 selected: false
141 tracksRegLiveness: true
142 registers:
143 - { id: 0, class: _ }
144 - { id: 1, class: _ }
145 - { id: 2, class: _ }
146 body: |
147 bb.0:
148 liveins: $r0
149
150 %0(p0) = COPY $r0
151 %1(s1) = G_LOAD %0(p0) :: (load 1)
152 %2(s8) = G_ANYEXT %1
153 ; G_ANYEXT from s1 to s8 is legal, so we should find it unchanged in the output
154 ; CHECK: {{%[0-9]+}}:_(s8) = G_ANYEXT {{%[0-9]+}}(s1)
155 G_STORE %2(s8), %0(p0) :: (store 1)
156 BX_RET 14, $noreg
157 ...
158 ---
159 name: test_ext_combine
160 # CHECK-LABEL: name: test_ext_combine
161 legalized: false
162 # CHECK: legalized: true
163 regBankSelected: false
164 selected: false
165 tracksRegLiveness: true
166 registers:
167 - { id: 0, class: _ }
168 - { id: 1, class: _ }
169 - { id: 2, class: _ }
170 - { id: 3, class: _ }
171 - { id: 4, class: _ }
172 - { id: 5, class: _ }
173 body: |
174 bb.0:
175 liveins: $r0
176
177 %0(p0) = COPY $r0
178 %1(s8) = G_LOAD %0(p0) :: (load 1)
179 ; CHECK: [[V8:%[0-9]+]]:_(s8) = G_LOAD
180
181 %2(s16) = G_ZEXT %1
182 %3(s16) = G_SEXT %1
183
184 %4(s16) = G_OR %2, %3
185 ; G_OR is going to widen to 32 bits and the extensions/truncs should combine
186 ; with the already existing ones
187 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[V8]](s8)
188 ; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[V8]](s8)
189 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SEXT]]
190 ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
191 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[OR]]
192 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[BITS]](s32)
193 ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[BITS]](s32)
194 ; CHECK: $r0 = COPY [[ASHR]]
195
196 %5(s32) = G_SEXT %4(s16)
197 $r0 = COPY %5
198
199 BX_RET 14, $noreg, implicit $r0
200 ...