llvm.org GIT mirror llvm / 57c3dac
Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp and X86FastISel.cpp into X86MachineFunction.h, so that it can be shared, instead of having each selector keep track of its own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56825 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 11 years ago
5 changed file(s) with 40 addition(s) and 47 deletion(s). Raw diff Collapse all Expand all
3939 ///
4040 unsigned StackPtr;
4141
42 /// GlobalBaseReg - keeps track of the virtual register mapped onto global
43 /// base register.
44 unsigned GlobalBaseReg;
45
4642 /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87
4743 /// floating point ops.
4844 /// When SSE is available, use it for f32 operations.
5955 : FastISel(mf, mmi, vm, bm, am) {
6056 Subtarget = &TM.getSubtarget();
6157 StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP;
62 GlobalBaseReg = 0;
6358 X86ScalarSSEf64 = Subtarget->hasSSE2();
6459 X86ScalarSSEf32 = Subtarget->hasSSE1();
6560 }
10196 bool X86SelectCall(Instruction *I);
10297
10398 CCAssignFn *CCAssignFnForCall(unsigned CC, bool isTailCall = false);
104
105 unsigned getGlobalBaseReg();
10699
107100 const X86InstrInfo *getInstrInfo() const {
108101 return getTargetMachine()->getInstrInfo();
149142 // under the assumption that i64 won't be used if the target doesn't
150143 // support it.
151144 return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT);
152 }
153
154 /// getGlobalBaseReg - Return the the global base register. Output
155 /// instructions required to initialize the global base register, if necessary.
156 ///
157 unsigned X86FastISel::getGlobalBaseReg() {
158 assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
159 if (!GlobalBaseReg)
160 GlobalBaseReg = getInstrInfo()->initializeGlobalBaseReg(MBB->getParent());
161 return GlobalBaseReg;
162145 }
163146
164147 #include "X86GenCallingConv.inc"
432415 if (!isCall &&
433416 TM.getRelocationModel() == Reloc::PIC_ &&
434417 !Subtarget->is64Bit())
435 AM.Base.Reg = getGlobalBaseReg();
418 AM.Base.Reg = getInstrInfo()->getGlobalBaseReg(&MF);
436419
437420 // Emit an extra load if the ABI requires it.
438421 if (Subtarget->GVRequiresExtraLoad(GV, TM, isCall)) {
10411024 TM.getRelocationModel() == Reloc::PIC_ &&
10421025 Subtarget->isPICStyleGOT()) {
10431026 TargetRegisterClass *RC = X86::GR32RegisterClass;
1044 unsigned Base = getGlobalBaseReg();
1027 unsigned Base = getInstrInfo()->getGlobalBaseReg(&MF);
10451028 bool Emitted = TII.copyRegToReg(*MBB, MBB->end(), X86::EBX, Base, RC, RC);
10461029 assert(Emitted && "Failed to emit a copy instruction!");
10471030 }
122122 /// make the right decision when generating code for different targets.
123123 const X86Subtarget *Subtarget;
124124
125 /// GlobalBaseReg - keeps track of the virtual register mapped onto global
126 /// base register.
127 unsigned GlobalBaseReg;
128
129125 /// CurBB - Current BB being isel'd.
130126 ///
131127 MachineBasicBlock *CurBB;
142138 Subtarget(&TM.getSubtarget()),
143139 OptForSize(OptimizeForSize) {}
144140
145 virtual bool runOnFunction(Function &Fn) {
146 // Make sure we re-emit a set of the global base reg if necessary
147 GlobalBaseReg = 0;
148 return SelectionDAGISel::runOnFunction(Fn);
149 }
150
151141 virtual const char *getPassName() const {
152142 return "X86 DAG->DAG Instruction Selection";
153143 }
11731163 /// initialize the global base register, if necessary.
11741164 ///
11751165 SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
1176 assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
1177 if (!GlobalBaseReg)
1178 GlobalBaseReg = TM.getInstrInfo()->initializeGlobalBaseReg(BB->getParent());
1166 MachineFunction *MF = CurBB->getParent();
1167 unsigned GlobalBaseReg = TM.getInstrInfo()->getGlobalBaseReg(MF);
11791168 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
11801169 }
11811170
29462946 return Size;
29472947 }
29482948
2949 /// initializeGlobalBaseReg - Output the instructions required to put the
2950 /// base address to use for accessing globals into a register.
2949 /// getGlobalBaseReg - Return a virtual register initialized with the
2950 /// the global base register value. Output instructions required to
2951 /// initialize the register in the function entry block, if necessary.
29512952 ///
2952 unsigned X86InstrInfo::initializeGlobalBaseReg(MachineFunction *MF) const {
2953 unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
2954 assert(!TM.getSubtarget().is64Bit() &&
2955 "X86-64 PIC uses RIP relative addressing");
2956
2957 X86MachineFunctionInfo *X86FI = MF->getInfo();
2958 unsigned GlobalBaseReg = X86FI->getGlobalBaseReg();
2959 if (GlobalBaseReg != 0)
2960 return GlobalBaseReg;
2961
29532962 // Insert the set of GlobalBaseReg into the first MBB of the function
29542963 MachineBasicBlock &FirstMBB = MF->front();
29552964 MachineBasicBlock::iterator MBBI = FirstMBB.begin();
29652974 // not to pc, but to _GLOBAL_ADDRESS_TABLE_ external
29662975 if (TM.getRelocationModel() == Reloc::PIC_ &&
29672976 TM.getSubtarget().isPICStyleGOT()) {
2968 unsigned GlobalBaseReg =
2977 GlobalBaseReg =
29692978 RegInfo.createVirtualRegister(X86::GR32RegisterClass);
29702979 BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg)
29712980 .addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_");
2972 return GlobalBaseReg;
2973 }
2974
2975 return PC;
2976 }
2981 } else {
2982 GlobalBaseReg = PC;
2983 }
2984
2985 X86FI->setGlobalBaseReg(GlobalBaseReg);
2986 return GlobalBaseReg;
2987 }
413413 ///
414414 virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
415415
416 /// initializeGlobalBaseReg - Output the instructions required to put the
417 /// base address to use for accessing globals into a register.
418 ///
419 unsigned initializeGlobalBaseReg(MachineFunction *MF) const;
416 /// getGlobalBaseReg - Return a virtual register initialized with the
417 /// the global base register value. Output instructions required to
418 /// initialize the register in the function entry block, if necessary.
419 ///
420 unsigned getGlobalBaseReg(MachineFunction *MF) const;
420421
421422 private:
422423 MachineInstr* foldMemoryOperand(MachineFunction &MF,
5757 /// holds the virtual register into which the sret argument is passed.
5858 unsigned SRetReturnReg;
5959
60 /// GlobalBaseReg - keeps track of the virtual register mapped onto global
61 /// base register.
62 unsigned GlobalBaseReg;
63
6064 public:
6165 X86MachineFunctionInfo() : ForceFramePointer(false),
6266 CalleeSavedFrameSize(0),
6468 DecorationStyle(None),
6569 ReturnAddrIndex(0),
6670 TailCallReturnAddrDelta(0),
67 SRetReturnReg(0) {}
71 SRetReturnReg(0),
72 GlobalBaseReg(0) {}
6873
6974 X86MachineFunctionInfo(MachineFunction &MF) : ForceFramePointer(false),
7075 CalleeSavedFrameSize(0),
7277 DecorationStyle(None),
7378 ReturnAddrIndex(0),
7479 TailCallReturnAddrDelta(0),
75 SRetReturnReg(0) {}
80 SRetReturnReg(0),
81 GlobalBaseReg(0) {}
7682
7783 bool getForceFramePointer() const { return ForceFramePointer;}
7884 void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }
94100
95101 unsigned getSRetReturnReg() const { return SRetReturnReg; }
96102 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
103
104 unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
105 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
97106 };
98107 } // End llvm namespace
99108