llvm.org GIT mirror llvm / 5617e05
TargetMachine: Move lib/CodeGen specific callbacks to LLVMTargetMachine; NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346184 91177308-0d34-0410-b5e6-96231b3b80d8 Matthias Braun 11 months ago
1 changed file(s) with 12 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
283283 void getNameWithPrefix(SmallVectorImpl &Name, const GlobalValue *GV,
284284 Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
285285 MCSymbol *getSymbol(const GlobalValue *GV) const;
286
287 /// True if the target uses physical regs at Prolog/Epilog insertion
288 /// time. If true (most machines), all vregs must be allocated before
289 /// PEI. If false (virtual-register machines), then callee-save register
290 /// spilling and scavenging are not needed or used.
291 virtual bool usesPhysRegsForPEI() const { return true; }
292
293 /// True if the target wants to use interprocedural register allocation by
294 /// default. The -enable-ipra flag can be used to override this.
295 virtual bool useIPRA() const {
296 return false;
297 }
298286 };
299287
300288 /// This class describes a target machine that is implemented with the LLVM
348336 bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
349337 raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
350338 MCContext &Context);
339
340 /// True if the target uses physical regs at Prolog/Epilog insertion
341 /// time. If true (most machines), all vregs must be allocated before
342 /// PEI. If false (virtual-register machines), then callee-save register
343 /// spilling and scavenging are not needed or used.
344 virtual bool usesPhysRegsForPEI() const { return true; }
345
346 /// True if the target wants to use interprocedural register allocation by
347 /// default. The -enable-ipra flag can be used to override this.
348 virtual bool useIPRA() const {
349 return false;
350 }
351351 };
352352
353353 } // end namespace llvm