llvm.org GIT mirror llvm / 544f14c
[mips] Restrict tail call optimization The tail call optimization was being used without proper consideration of ABI requirements for saving and restoring the GP. This patch restricts tail call optimization to functions within the same translation unit. Reviewers: vkalintiris Differential Revision: https://reviews.llvm.org/D24763 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287505 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Dardis 2 years ago
8 changed file(s) with 163 addition(s) and 178 deletion(s). Raw diff Collapse all Expand all
26492649 // Get a count of how many bytes are to be pushed on the stack.
26502650 unsigned NextStackOffset = CCInfo.getNextStackOffset();
26512651
2652 // Check if it's really possible to do a tail call.
2653 if (IsTailCall)
2652 // Check if it's really possible to do a tail call. Restrict it to functions
2653 // that are part of this compilation unit.
2654 bool InternalLinkage = false;
2655 if (IsTailCall) {
26542656 IsTailCall = isEligibleForTailCallOptimization(
26552657 CCInfo, NextStackOffset, *MF.getInfo());
2656
2658 if (GlobalAddressSDNode *G = dyn_cast(Callee)) {
2659 InternalLinkage = G->getGlobal()->hasInternalLinkage();
2660 IsTailCall &= (InternalLinkage || G->getGlobal()->hasLocalLinkage() ||
2661 G->getGlobal()->hasPrivateLinkage() ||
2662 G->getGlobal()->hasHiddenVisibility() ||
2663 G->getGlobal()->hasProtectedVisibility());
2664 }
2665 }
26572666 if (!IsTailCall && CLI.CS && CLI.CS->isMustTailCall())
26582667 report_fatal_error("failed to perform tail call elimination on a call "
26592668 "site marked musttail");
27882797 // node so that legalize doesn't hack it.
27892798 bool IsPICCall = (ABI.IsN64() || IsPIC); // true if calls are translated to
27902799 // jalr $25
2791 bool GlobalOrExternal = false, InternalLinkage = false, IsCallReloc = false;
27922800 SDValue CalleeLo;
27932801 EVT Ty = Callee.getValueType();
2802 bool GlobalOrExternal = false, IsCallReloc = false;
27942803
27952804 if (GlobalAddressSDNode *G = dyn_cast(Callee)) {
27962805 if (IsPICCall) {
289289 ; NOODDSPREG-DAG: lwc1 $f18, 36($[[R0]])
290290
291291 ; NOODDSPREG-DAG: lwc1 $[[F0:f[0-9]*[02468]]], 40($[[R0]])
292 ; NOODDSPREG-DAG: swc1 $[[F0]], 8($sp)
292 ; NOODDSPREG-DAG: swc1 $[[F0]], 0($sp)
293293
294294 %0 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 0), align 4
295295 %1 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 1), align 4
11
22 define void @f1(i64 %ll1, float %f, i64 %ll, i32 %i, float %f2) nounwind {
33 entry:
4 ; CHECK-DAG: lw $[[R2:[0-9]+]], 64($sp)
5 ; CHECK-DAG: lw $[[R3:[0-9]+]], 68($sp)
4 ; CHECK-DAG: lw $[[R2:[0-9]+]], 80($sp)
5 ; CHECK-DAG: lw $[[R3:[0-9]+]], 84($sp)
66 ; CHECK-DAG: move $[[R1:[0-9]+]], $5
77 ; CHECK-DAG: move $[[R0:[0-9]+]], $4
88 ; CHECK-DAG: ori $6, ${{[0-9]+}}, 3855
1717 tail call void @ff2(i64 %ll, double 3.000000e+00) nounwind
1818 %sub = add nsw i32 %i, -1
1919 ; CHECK-DAG: lw $25, %call16(ff3)
20 ; CHECK-DAG: sw $[[R1]], 76($sp)
21 ; CHECK-DAG: sw $[[R0]], 72($sp)
20 ; CHECK-DAG: sw $[[R1]], 28($sp)
21 ; CHECK-DAG: sw $[[R0]], 24($sp)
2222 ; CHECK-DAG: move $6, $[[R2]]
2323 ; CHECK-DAG: move $7, $[[R3]]
24 ; CHECK: jr $25
24 ; CHECK: jalr $25
2525 tail call void @ff3(i32 %i, i64 %ll, i32 %sub, i64 %ll1) nounwind
2626 ret void
2727 }
2929 ; CHECK: lw $25, %call16(foo2)(${{[0-9]+}})
3030 ; CHECK: jalr $25
3131 ; CHECK: lw $25, %call16(foo2)(${{[0-9]+}})
32 ; CHECK: jr $25
32 ; CHECK: jalr $25
3333
3434 define void @foo1() {
3535 entry:
7777 %2 = fadd float %1, 1.0
7878 ; R6C: jrc $ra
7979 ret float %2
80 }
81
82 define void @musttail_call_void_void() {
83 ; ALL-LABEL: musttail_call_void_void:
84
85 ; O32: lw $[[TGT:[0-9]+]], %call16(extern_void_void)($gp)
86
87 ; N64: ld $[[TGT:[0-9]+]], %call16(extern_void_void)($gp)
88
89 ; NOT-R6C: jr $[[TGT]]
90 ; R6C: jrc $[[TGT]]
91
92 musttail call void @extern_void_void()
93 ret void
94 }
95
96 define i32 @musttail_call_i32_void() {
97 ; ALL-LABEL: musttail_call_i32_void:
98
99 ; O32: lw $[[TGT:[0-9]+]], %call16(extern_i32_void)($gp)
100
101 ; N64: ld $[[TGT:[0-9]+]], %call16(extern_i32_void)($gp)
102
103 ; NOT-R6C: jr $[[TGT]]
104 ; R6C: jrc $[[TGT]]
105
106 %1 = musttail call i32 @extern_i32_void()
107 ret i32 %1
108 }
109
110 define float @musttail_call_float_void() {
111 ; ALL-LABEL: musttail_call_float_void:
112
113 ; O32: lw $[[TGT:[0-9]+]], %call16(extern_float_void)($gp)
114
115 ; N64: ld $[[TGT:[0-9]+]], %call16(extern_float_void)($gp)
116
117 ; NOT-R6C: jr $[[TGT]]
118 ; R6C: jrc $[[TGT]]
119
120 %1 = musttail call float @extern_float_void()
121 ret float %1
12280 }
12381
12482 define i32 @indirect_call_void_void(void ()* %addr) {
1717 ; O32 case: The last two arguments should appear at 16(sp), 20(sp). The order
1818 ; of the loads doesn't matter, but they have to become before the
1919 ; stores
20 declare i32 @func2(i32, i32, i32, i32, i32, i32)
20 define internal i32 @func2(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {
21 %1 = add i32 %a, %b
22 %2 = add i32 %1, %c
23 %3 = add i32 %2, %d
24 %4 = add i32 %3, %e
25 %5 = add i32 %4, %f
26 ret i32 %5
27 }
2128
2229 define i32 @func1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f){
2330 ; MIPS32-LABEL: func1:
2633 ; MIPS32-NEXT: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
2734 ; MIPS32-NEXT: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
2835 ; MIPS32-NEXT: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
29 %retval = tail call i32 @func1(i32 %a, i32 %f, i32 %c, i32 %d, i32 %e, i32 %b)
36 %retval = tail call i32 @func2(i32 %a, i32 %f, i32 %c, i32 %d, i32 %e, i32 %b)
3037
3138 ret i32 %retval
3239 }
3542 ; of the loads doesn't matter, but they have to become before the
3643 ; stores
3744
38 declare i64 @func4(i64, i64, i64, i64, i64, i64, i64, i64, i64, i64)
39
45 define internal i64 @func4(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e,
46 i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) {
47 %1 = add i64 %a, %b
48 %2 = add i64 %1, %c
49 %3 = add i64 %2, %d
50 %4 = add i64 %3, %e
51 %5 = add i64 %4, %f
52 %6 = add i64 %1, %g
53 %7 = add i64 %2, %h
54 %8 = add i64 %3, %i
55 %9 = add i64 %4, %j
56 ret i64 %5
57 }
4058 define i64 @func3(i64 %a, i64 %b, i64 %c, i64 %d,
4159 i64 %e, i64 %f, i64 %g, i64 %h,
4260 i64 %i, i64 %j){
5068
5169 ret i64 %retval
5270 }
53
54
2020 ; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64r6 -mips-tail-calls=1 < %s -o - \
2121 ; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=N64R6
2222
23 declare i8 @f2(i8)
23 define internal i8 @f2(i8) {
24 ret i8 4
25 }
2426
2527 define i8 @f1(i8 signext %i) nounwind {
2628 %a = tail call i8 @f2(i8 %i)
2729 ret i8 %a
2830 }
2931
30 ; PIC32: {{[0-9]}}: 08 00 20 03 jr $25
31 ; STATIC32: {{[0-9]}}: 00 00 00 08 j 0
32 ; ALL: f1:
33 ; PIC32: {{[0-9a-z]}}: 08 00 20 03 jr $25
34 ; STATIC32: {{[0-9a-z]}}: 00 00 00 08 j 0
3235
3336 ; N64: {{[0-9a-z]+}}: 08 00 20 03 jr $25
3437
3538 ; PIC32MM: {{[0-9a-z]+}}: b9 45 jrc $25
36 ; STATIC32MM: {{[0-9]}}: 00 d4 00 00 j 0
39 ; STATIC32MM: {{[0-9a-z]}}: 00 d4 00 00 j 0
3740
38 ; PIC32R6: {{[0-9]}}: 00 00 19 d8 jrc $25
39 ; STATIC32R6: {{[0-9]}}: 00 00 00 08 j 0
41 ; PIC32R6: {{[0-9a-z]}}: 00 00 19 d8 jrc $25
42 ; STATIC32R6: {{[0-9a-z]}}: 00 00 00 08 j 0
4043
41 ; N64R6: {{[0-9a-z]+}}: 09 00 20 03 jr $25
44 ; N64R6: {{[0-9a-z]+}}: 00 00 19 d8 jrc $25
4245
0 ; RUN: llc -march=mipsel -relocation-model=pic \
1 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=PIC32
1 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32
22 ; RUN: llc -march=mipsel -relocation-model=static \
3 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC32
3 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
44 ; RUN: llc -march=mips64el -mcpu=mips64r2 \
5 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=N64
5 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64
66 ; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic \
77 ; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | \
8 ; RUN: FileCheck %s -check-prefix=PIC16
8 ; RUN: FileCheck %s -check-prefixes=ALL,PIC16
99
1010 ; RUN: llc -march=mipsel -relocation-model=pic -mattr=+micromips -mips-tail-calls=1 < %s | \
11 ; RUN: FileCheck %s -check-prefix=PIC32
11 ; RUN: FileCheck %s -check-prefixes=ALL,PIC32MM
1212 ; RUN: llc -march=mipsel -relocation-model=static -mattr=+micromips \
13 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC32
13 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
1414
1515 ; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mips-tail-calls=1 < %s | \
16 ; RUN: FileCheck %s -check-prefix=PIC32
16 ; RUN: FileCheck %s -check-prefixes=ALL,PIC32R6
1717 ; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
18 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC32
18 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
1919 ; RUN: llc -march=mips64el -mcpu=mips64r6 \
20 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=N64
20 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64R6
2121
2222 ; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mattr=+micromips \
23 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=PIC32
23 ; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32MM
2424 ; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
25 ; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC32
25 ; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
2626 ; RUN: llc -march=mips64el -mcpu=mips64r6 -mattr=+micromips -mips-tail-calls=1 < %s \
27 ; RUN: | FileCheck %s -check-prefix=N64
27 ; RUN: | FileCheck %s -check-prefixes=ALL,N64
2828
2929 @g0 = common global i32 0, align 4
3030 @g1 = common global i32 0, align 4
3939
4040 define i32 @caller1(i32 %a0) nounwind {
4141 entry:
42 ; PIC32-NOT: jalr
43 ; STATIC32-NOT: jal
44 ; N64-NOT: jalr
42 ; ALL-LABEL: caller1:
43 ; PIC32: jalr $25
44 ; PIC32MM: jalr $25
45 ; PIC32R6: jalr $25
46 ; STATIC32: jal
47 ; N64: jalr $25
48 ; N64R6: jalr $25
4549 ; PIC16: jalrc
4650
4751 %call = tail call i32 @callee1(i32 1, i32 1, i32 1, i32 %a0) nounwind
5256
5357 define i32 @caller2(i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
5458 entry:
55 ; PIC32: jalr
56 ; STATIC32: jal
57 ; N64-NOT: jalr
59 ; ALL-LABEL: caller2
60 ; PIC32: jalr $25
61 ; PIC32MM: jalr $25
62 ; PIC32R6: jalr $25
63 ; STATIC32: jal
64 ; N64: jalr $25
65 ; N64R6: jalr $25
5866 ; PIC16: jalrc
5967
6068 %call = tail call i32 @callee2(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind
6573
6674 define i32 @caller3(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind {
6775 entry:
68 ; PIC32: jalr
69 ; STATIC32: jal
70 ; N64-NOT: jalr
76 ; ALL-LABEL: caller3:
77 ; PIC32: jalr $25
78 ; PIC32R6: jalr $25
79 ; PIC32MM: jalr $25
80 ; STATIC32: jal
81 ; N64: jalr $25
82 ; N64R6: jalr $25
7183 ; PIC16: jalrc
7284
7385 %call = tail call i32 @callee3(i32 1, i32 1, i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind
7890
7991 define i32 @caller4(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {
8092 entry:
81 ; PIC32: jalr
82 ; STATIC32: jal
83 ; N64: jalr
93 ; ALL-LABEL: caller4:
94 ; PIC32: jalr $25
95 ; PIC32R6: jalr $25
96 ; PIC32MM: jalr $25
97 ; STATIC32: jal
98 ; N64: jalr $25
99 ; N64R6: jalr $25
84100 ; PIC16: jalrc
85101
86102 %call = tail call i32 @callee4(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
91107
92108 define i32 @caller5() nounwind readonly {
93109 entry:
94 ; PIC32: .ent caller5
95 ; PIC32-NOT: jalr $25
96 ; PIC32: .end caller5
97 ; STATIC32: .ent caller5
98 ; STATIC32-NOT: jal
99 ; STATIC32: .end caller5
100 ; N64: .ent caller5
101 ; N64-NOT: jalr $25
102 ; N64: .end caller5
103 ; PIC16: .ent caller5
104 ; PIC16: jalrc
105 ; PIC16: .end caller5
110 ; ALL-LABEL: caller5:
111 ; PIC32: jr $25
112 ; PIC32R6: jr $25
113 ; PIC32MM: jr
114 ; STATIC32: j
115 ; N64: jr $25
116 ; N64R6: jr $25
117 ; PIC16: jalrc
106118
107119 %0 = load i32, i32* @g0, align 4
108120 %1 = load i32, i32* @g1, align 4
136148
137149 define i32 @caller8_0() nounwind {
138150 entry:
139 ; PIC32: .ent caller8_0
140 ; PIC32: jr
141 ; PIC32: .end caller8_0
142 ; STATIC32: .ent caller8_0
151 ; ALL-LABEL: caller8_0:
152 ; PIC32: jr $25
153 ; PIC32R6: jrc $25
154 ; PIC32MM: jrc
143155 ; STATIC32: j
144 ; STATIC32: .end caller8_0
145 ; N64: .ent caller8_0
146 ; N64-NOT: jalr $25
147 ; N64: .end caller8_0
148 ; PIC16: .ent caller8_0
149 ; PIC16: jalrc
150 ; PIC16: .end caller8_0
156 ; N64: jr $25
157 ; N64R6: jrc $25
158 ; PIC16: jalrc
151159
152160 %call = tail call fastcc i32 @caller8_1()
153161 ret i32 %call
155163
156164 define internal fastcc i32 @caller8_1() nounwind noinline {
157165 entry:
158 ; PIC32: .ent caller8_1
159 ; PIC32: jalr
160 ; PIC32: .end caller8_1
161 ; STATIC32: .ent caller8_1
162 ; STATIC32: jal
163 ; STATIC32: .end caller8_1
164 ; N64: .ent caller8_1
165 ; N64-NOT: jalr $25
166 ; N64: .end caller8_1
167 ; PIC16: .ent caller8_1
168 ; PIC16: jalrc
169 ; PIC16: .end caller8_1
166 ; ALL-LABEL: caller8_1:
167 ; PIC32: jalr $25
168 ; PIC32R6: jalr $25
169 ; PIC32MM: jalr $25
170 ; STATIC32: jal
171 ; N64: jalr $25
172 ; N64R6: jalr $25
173 ; PIC16: jalrc
170174
171175 %call = tail call i32 (i32, ...) @callee8(i32 2, i32 1) nounwind
172176 ret i32 %call
180184
181185 define i32 @caller9_0() nounwind {
182186 entry:
183 ; PIC32: .ent caller9_0
184 ; PIC32: jr
185 ; PIC32: .end caller9_0
186 ; STATIC32: .ent caller9_0
187 ; ALL-LABEL: caller9_0:
188 ; PIC32: jr $25
189 ; PIC32R6: jrc $25
190 ; PIC32MM: jrc
187191 ; STATIC32: j
188 ; STATIC32: .end caller9_0
189 ; N64: .ent caller9_0
190 ; N64-NOT: jalr $25
191 ; N64: .end caller9_0
192 ; PIC16: .ent caller9_0
193 ; PIC16: jalrc
194 ; PIC16: .end caller9_0
192 ; N64: jr $25
193 ; N64R6: jrc $25
194 ; PIC16: jalrc
195195 %call = tail call fastcc i32 @caller9_1()
196196 ret i32 %call
197197 }
198198
199199 define internal fastcc i32 @caller9_1() nounwind noinline {
200200 entry:
201 ; PIC32: .ent caller9_1
202 ; PIC32: jalr
203 ; PIC32: .end caller9_1
204 ; STATIC32: .ent caller9_1
205 ; STATIC32: jal
206 ; STATIC32: .end caller9_1
207 ; N64: .ent caller9_1
208 ; N64: jalr
209 ; N64: .end caller9_1
210 ; PIC16: .ent caller9_1
211 ; PIC16: jalrc
212 ; PIC16: .end caller9_1
201 ; ALL-LABEL: caller9_1:
202 ; PIC32: jalr $25
203 ; PIC32R6: jalrc $25
204 ; PIC32MM: jalr $25
205 ; STATIC32: jal
206 ; N64: jalr $25
207 ; N64R6: jalrc $25
208 ; PIC16: jalrc
213209
214210 %call = tail call i32 @callee9(%struct.S* byval @gs1) nounwind
215211 ret i32 %call
219215
220216 define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind {
221217 entry:
222 ; PIC32: .ent caller10
223 ; PIC32-NOT: jalr $25
224 ; STATIC32: .ent caller10
225 ; STATIC32-NOT: jal
226 ; N64: .ent caller10
227 ; N64-NOT: jalr $25
228 ; PIC16: .ent caller10
218 ; ALL-LABEL: caller10:
219 ; PIC32: jalr $25
220 ; PIC32R6: jalr $25
221 ; PIC32MM: jalr $25
222 ; STATIC32: jal
223 ; N64: jalr $25
224 ; N64R6: jalr $25
229225 ; PIC16: jalrc
230226
231227 %call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
236232
237233 define i32 @caller11() nounwind noinline {
238234 entry:
239 ; PIC32: .ent caller11
240 ; PIC32: jalr
241 ; STATIC32: .ent caller11
242 ; STATIC32: jal
243 ; N64: .ent caller11
244 ; N64: jalr
245 ; PIC16: .ent caller11
235 ; ALL-LABEL: caller11:
236 ; PIC32: jalr $25
237 ; PIC32R6: jalrc $25
238 ; PIC32MM: jalr $25
239 ; STATIC32: jal
240 ; N64: jalr $25
241 ; N64R6: jalrc $25
246242 ; PIC16: jalrc
247243
248244 %call = tail call i32 @callee11(%struct.S* byval @gs1) nounwind
255251
256252 define i32 @caller12(%struct.S* nocapture byval %a0) nounwind {
257253 entry:
258 ; PIC32: .ent caller12
259 ; PIC32: jalr
260 ; STATIC32: .ent caller12
261 ; STATIC32: jal
262 ; N64: .ent caller12
263 ; N64: jalr
264 ; PIC16: .ent caller12
254 ; ALL-LABEL: caller12:
255 ; PIC32: jalr $25
256 ; PIC32R6: jalrc $25
257 ; PIC32MM: jalr $25
258 ; STATIC32: jal
259 ; N64: jalr $25
260 ; N64R6: jalrc $25
265261 ; PIC16: jalrc
266262
267263 %0 = bitcast %struct.S* %a0 to i8*
274270
275271 define i32 @caller13() nounwind {
276272 entry:
277 ; PIC32: .ent caller13
278 ; PIC32-NOT: jalr
279 ; STATIC32: .ent caller13
280 ; STATIC32-NOT: jal
281 ; N64: .ent caller13
282 ; N64-NOT: jalr $25
283 ; PIC16: .ent caller13
273 ; ALL-LABEL: caller13
274 ; PIC32: jalr $25
275 ; PIC32R6: jalr $25
276 ; PIC32MM: jalr $25
277 ; STATIC32: jal
278 ; N64: jalr $25
279 ; N64R6: jalr $25
284280 ; PIC16: jalrc
285281
286282 %call = tail call i32 (i32, ...) @callee13(i32 1, i32 2) nounwind
289285
290286 ; Check that there is a chain edge between the load and store nodes.
291287 ;
292 ; PIC32-LABEL: caller14:
293 ; PIC32: lw ${{[0-9]+}}, 16($sp)
288 ; ALL-LABEL: caller14:
289 ; PIC32: lw ${{[0-9]+}}, 48($sp)
294290 ; PIC32: sw $4, 16($sp)
291
292 ; PIC32MM: lw ${{[0-9]+}}, 48($sp)
293 ; PIC32MM: sw16 $4, 16(${{[0-9]+}})
295294
296295 define void @caller14(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
297296 entry: