llvm.org GIT mirror llvm / 5345260
Allow strict subclasses of register classes, this way we can handle ARM instructions with: foo GPR, rGPR which happens a lot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112025 91177308-0d34-0410-b5e6-96231b3b80d8 Eric Christopher 9 years ago
1 changed file(s) with 3 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
111111 if (!RC)
112112 return false;
113113
114 // For now, all the operands must have the same register class.
114 // For now, all the operands must have the same register class or be
115 // a strict subclass of the destination.
115116 if (DstRC) {
116 if (DstRC != RC)
117 if (DstRC != RC && !DstRC->hasSubClass(RC))
117118 return false;
118119 } else
119120 DstRC = RC;