llvm.org GIT mirror llvm / 519daf5
Don't attempt to use flags from predicated instructions. The ARM backend can eliminate cmp instructions by reusing flags from a nearby sub instruction with similar arguments. Don't do that if the sub is predicated - the flags are not written unconditionally. <rdar://problem/12263428> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163535 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 8 years ago
2 changed file(s) with 29 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
20272027
20282028 // Masked compares sometimes use the same register as the corresponding 'and'.
20292029 if (CmpMask != ~0) {
2030 if (!isSuitableForMask(MI, SrcReg, CmpMask, false)) {
2030 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(MI)) {
20312031 MI = 0;
20322032 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SrcReg),
20332033 UE = MRI->use_end(); UI != UE; ++UI) {
20342034 if (UI->getParent() != CmpInstr->getParent()) continue;
20352035 MachineInstr *PotentialAND = &*UI;
2036 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true))
2036 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true) ||
2037 isPredicated(PotentialAND))
20372038 continue;
20382039 MI = PotentialAND;
20392040 break;
20982099
20992100 // The single candidate is called MI.
21002101 if (!MI) MI = Sub;
2102
2103 // We can't use a predicated instruction - it doesn't always write the flags.
2104 if (isPredicated(MI))
2105 return false;
21012106
21022107 switch (MI->getOpcode()) {
21032108 default: break;
22052210 // Toggle the optional operand to CPSR.
22062211 MI->getOperand(5).setReg(ARM::CPSR);
22072212 MI->getOperand(5).setIsDef(true);
2213 assert(!isPredicated(MI) && "Can't use flags from predicated instruction");
22082214 CmpInstr->eraseFromParent();
22092215
22102216 // Modify the condition code of operands in OperandsToUpdate.
6262 if.else:
6363 ret i32 %sub
6464 }
65
66 ; If the sub/rsb instruction is predicated, we can't use the flags.
67 ;
68 ; Test case from MultiSource/Benchmarks/Ptrdist/bc/number.s
69 ; CHECK: bc_raise
70 ; CHECK: rsbeq
71 ; CHECK: cmp
72 define i32 @bc_raise() nounwind ssp {
73 entry:
74 %val.2.i = select i1 undef, i32 0, i32 undef
75 %sub.i = sub nsw i32 0, %val.2.i
76 %retval.0.i = select i1 undef, i32 %val.2.i, i32 %sub.i
77 %cmp1 = icmp eq i32 %retval.0.i, 0
78 br i1 %cmp1, label %land.lhs.true, label %if.end11
79
80 land.lhs.true: ; preds = %num2long.exit
81 ret i32 17
82
83 if.end11: ; preds = %num2long.exit
84 ret i32 23
85 }