llvm.org GIT mirror llvm / 4f4ab9e
[X86] resolveTargetShuffleInputs - add depth to limit recursion. Avoids slow downs from calls to ComputeNumSignBits/computeKnownBits going too deep. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367240 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 1 year, 17 days ago
1 changed file(s) with 19 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
66676667 static bool resolveTargetShuffleInputs(SDValue Op,
66686668 SmallVectorImpl &Inputs,
66696669 SmallVectorImpl &Mask,
6670 SelectionDAG &DAG);
6670 SelectionDAG &DAG, unsigned Depth);
66716671
66726672 // Attempt to decode ops that could be represented as a shuffle mask.
66736673 // The decoded shuffle mask may contain a different number of elements to the
66756675 static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
66766676 SmallVectorImpl &Mask,
66776677 SmallVectorImpl &Ops,
6678 SelectionDAG &DAG) {
6678 SelectionDAG &DAG, unsigned Depth) {
66796679 Mask.clear();
66806680 Ops.clear();
66816681
67276727 case ISD::OR: {
67286728 // Inspect each operand at the byte level. We can merge these into a
67296729 // blend shuffle mask if for each byte at least one is masked out (zero).
6730 KnownBits Known0 = DAG.computeKnownBits(N.getOperand(0), DemandedElts);
6731 KnownBits Known1 = DAG.computeKnownBits(N.getOperand(1), DemandedElts);
6730 KnownBits Known0 =
6731 DAG.computeKnownBits(N.getOperand(0), DemandedElts, Depth + 1);
6732 KnownBits Known1 =
6733 DAG.computeKnownBits(N.getOperand(1), DemandedElts, Depth + 1);
67326734 if (Known0.One.isNullValue() && Known1.One.isNullValue()) {
67336735 bool IsByteMask = true;
67346736 unsigned NumSizeInBytes = NumSizeInBits / 8;
67676769 return false;
67686770 SmallVector SrcMask0, SrcMask1;
67696771 SmallVector SrcInputs0, SrcInputs1;
6770 if (!resolveTargetShuffleInputs(N0, SrcInputs0, SrcMask0, DAG) ||
6771 !resolveTargetShuffleInputs(N1, SrcInputs1, SrcMask1, DAG))
6772 if (!resolveTargetShuffleInputs(N0, SrcInputs0, SrcMask0, DAG, Depth + 1) ||
6773 !resolveTargetShuffleInputs(N1, SrcInputs1, SrcMask1, DAG, Depth + 1))
67726774 return false;
67736775 int MaskSize = std::max(SrcMask0.size(), SrcMask1.size());
67746776 SmallVector Mask0, Mask1;
68186820 SmallVector SubMask;
68196821 SmallVector SubInputs;
68206822 if (!resolveTargetShuffleInputs(peekThroughOneUseBitcasts(Sub), SubInputs,
6821 SubMask, DAG))
6823 SubMask, DAG, Depth + 1))
68226824 return false;
68236825 if (SubMask.size() != NumSubElts) {
68246826 assert(((SubMask.size() % NumSubElts) == 0 ||
69426944 // as a truncation shuffle.
69436945 if (Opcode == X86ISD::PACKSS) {
69446946 if ((!N0.isUndef() &&
6945 DAG.ComputeNumSignBits(N0, EltsLHS) <= NumBitsPerElt) ||
6947 DAG.ComputeNumSignBits(N0, EltsLHS, Depth + 1) <= NumBitsPerElt) ||
69466948 (!N1.isUndef() &&
6947 DAG.ComputeNumSignBits(N1, EltsRHS) <= NumBitsPerElt))
6949 DAG.ComputeNumSignBits(N1, EltsRHS, Depth + 1) <= NumBitsPerElt))
69486950 return false;
69496951 } else {
69506952 APInt ZeroMask = APInt::getHighBitsSet(2 * NumBitsPerElt, NumBitsPerElt);
6951 if ((!N0.isUndef() && !DAG.MaskedValueIsZero(N0, ZeroMask, EltsLHS)) ||
6952 (!N1.isUndef() && !DAG.MaskedValueIsZero(N1, ZeroMask, EltsRHS)))
6953 if ((!N0.isUndef() &&
6954 !DAG.MaskedValueIsZero(N0, ZeroMask, EltsLHS, Depth + 1)) ||
6955 (!N1.isUndef() &&
6956 !DAG.MaskedValueIsZero(N1, ZeroMask, EltsRHS, Depth + 1)))
69536957 return false;
69546958 }
69556959
71007104 static bool resolveTargetShuffleInputs(SDValue Op,
71017105 SmallVectorImpl &Inputs,
71027106 SmallVectorImpl &Mask,
7103 SelectionDAG &DAG) {
7107 SelectionDAG &DAG, unsigned Depth) {
71047108 unsigned NumElts = Op.getValueType().getVectorNumElements();
71057109 APInt DemandedElts = APInt::getAllOnesValue(NumElts);
71067110 if (!setTargetShuffleZeroElements(Op, Mask, Inputs))
7107 if (!getFauxShuffleMask(Op, DemandedElts, Mask, Inputs, DAG))
7111 if (!getFauxShuffleMask(Op, DemandedElts, Mask, Inputs, DAG, Depth))
71087112 return false;
71097113
71107114 resolveTargetShuffleInputsAndMask(Inputs, Mask);
3275932763 // Extract target shuffle mask and resolve sentinels and inputs.
3276032764 SmallVector OpMask;
3276132765 SmallVector OpInputs;
32762 if (!resolveTargetShuffleInputs(Op, OpInputs, OpMask, DAG))
32766 if (!resolveTargetShuffleInputs(Op, OpInputs, OpMask, DAG, Depth))
3276332767 return SDValue();
3276432768
3276532769 // Add the inputs to the Ops list, avoiding duplicates.
3555135555 // Resolve the target shuffle inputs and mask.
3555235556 SmallVector Mask;
3555335557 SmallVector Ops;
35554 if (!resolveTargetShuffleInputs(SrcBC, Ops, Mask, DAG))
35558 if (!resolveTargetShuffleInputs(SrcBC, Ops, Mask, DAG, 0))
3555535559 return SDValue();
3555635560
3555735561 // Attempt to narrow/widen the shuffle mask to the correct size.