llvm.org GIT mirror llvm / 4e54f41
ARM: do not add a regmask for TAILJUMPs The jump doesn't really kill the registers, the following call does but we never get back anyway. This avoids some verify-machineinstrs problems when TAILJUMPs are if-converted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191962 91177308-0d34-0410-b5e6-96231b3b80d8 Matthias Braun 6 years ago
2 changed file(s) with 54 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
17781778 RegsToPass[i].second.getValueType()));
17791779
17801780 // Add a register mask operand representing the call-preserved registers.
1781 const uint32_t *Mask;
1782 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
1783 const ARMBaseRegisterInfo *ARI = static_cast(TRI);
1784 if (isThisReturn) {
1785 // For 'this' returns, use the R0-preserving mask if applicable
1786 Mask = ARI->getThisReturnPreservedMask(CallConv);
1787 if (!Mask) {
1788 // Set isThisReturn to false if the calling convention is not one that
1789 // allows 'returned' to be modeled in this way, so LowerCallResult does
1790 // not try to pass 'this' straight through
1791 isThisReturn = false;
1781 if (!isTailCall) {
1782 const uint32_t *Mask;
1783 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
1784 const ARMBaseRegisterInfo *ARI = static_cast(TRI);
1785 if (isThisReturn) {
1786 // For 'this' returns, use the R0-preserving mask if applicable
1787 Mask = ARI->getThisReturnPreservedMask(CallConv);
1788 if (!Mask) {
1789 // Set isThisReturn to false if the calling convention is not one that
1790 // allows 'returned' to be modeled in this way, so LowerCallResult does
1791 // not try to pass 'this' straight through
1792 isThisReturn = false;
1793 Mask = ARI->getCallPreservedMask(CallConv);
1794 }
1795 } else
17921796 Mask = ARI->getCallPreservedMask(CallConv);
1793 }
1794 } else
1795 Mask = ARI->getCallPreservedMask(CallConv);
1796
1797 assert(Mask && "Missing call preserved mask for calling convention");
1798 Ops.push_back(DAG.getRegisterMask(Mask));
1797
1798 assert(Mask && "Missing call preserved mask for calling convention");
1799 Ops.push_back(DAG.getRegisterMask(Mask));
1800 }
17991801
18001802 if (InFlag.getNode())
18011803 Ops.push_back(InFlag);
0 ; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs
1
2 %union.opcode = type { i32 }
3
4 @opcode = external global %union.opcode, align 4
5
6 ; Function Attrs: nounwind ssp
7 define i32 @sfu() {
8 entry:
9 %bf.load = load i32* getelementptr inbounds (%union.opcode* @opcode, i32 0, i32 0), align 4
10 %bf.lshr = lshr i32 %bf.load, 26
11 %bf.clear = and i32 %bf.lshr, 7
12 switch i32 %bf.clear, label %return [
13 i32 0, label %sw.bb
14 i32 1, label %sw.bb1
15 ]
16
17 sw.bb: ; preds = %entry
18 %call = tail call i32 @func0()
19 br label %return
20
21 sw.bb1: ; preds = %entry
22 %call2 = tail call i32 @func1()
23 br label %return
24
25 return: ; preds = %sw.bb1, %sw.bb, %entry
26 %retval.0 = phi i32 [ %call2, %sw.bb1 ], [ %call, %sw.bb ], [ -1, %entry ]
27 ret i32 %retval.0
28 }
29
30 ; Function Attrs: nounwind ssp
31 declare i32 @func0()
32
33 ; Function Attrs: nounwind ssp
34 declare i32 @func1()