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Merging r200195: ------------------------------------------------------------------------ r200195 | michel.daenzer | 2014-01-26 23:20:44 -0800 (Sun, 26 Jan 2014) | 4 lines R600/SI: Add intrinsic for S_SENDMSG instruction Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@204636 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 6 years ago
4 changed file(s) with 41 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
313313
314314 Counters Result = ZeroCounts;
315315
316 // S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish,
317 // but we also want to wait for any other outstanding transfers before
318 // signalling other hardware blocks
319 if (MI.getOpcode() == AMDGPU::S_SENDMSG)
320 return LastIssued;
321
316322 // For each register affected by this
317323 // instruction increase the result sequence
318324 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
2020 def InterpSlot : Operand {
2121 let PrintMethod = "printInterpSlot";
2222 }
23
24 def SendMsgImm : Operand;
2325
2426 def isSI : Predicate<"Subtarget.getGeneration() "
2527 ">= AMDGPUSubtarget::SOUTHERN_ISLANDS">;
825827 def S_WAITCNT : SOPP <0x0000000c, (ins WAIT_FLAG:$simm16), "S_WAITCNT $simm16",
826828 []
827829 >;
828 } // End hasSideEffects
829830 //def S_SETHALT : SOPP_ <0x0000000d, "S_SETHALT", []>;
830831 //def S_SLEEP : SOPP_ <0x0000000e, "S_SLEEP", []>;
831832 //def S_SETPRIO : SOPP_ <0x0000000f, "S_SETPRIO", []>;
832 //def S_SENDMSG : SOPP_ <0x00000010, "S_SENDMSG", []>;
833
834 let Uses = [EXEC] in {
835 def S_SENDMSG : SOPP <0x00000010, (ins SendMsgImm:$simm16, M0Reg:$m0), "S_SENDMSG $simm16",
836 [(int_SI_sendmsg imm:$simm16, M0Reg:$m0)]
837 > {
838 let DisableEncoding = "$m0";
839 }
840 } // End Uses = [EXEC]
841
833842 //def S_SENDMSGHALT : SOPP_ <0x00000011, "S_SENDMSGHALT", []>;
834843 //def S_TRAP : SOPP_ <0x00000012, "S_TRAP", []>;
835844 //def S_ICACHE_INV : SOPP_ <0x00000013, "S_ICACHE_INV", []>;
836845 //def S_INCPERFLEVEL : SOPP_ <0x00000014, "S_INCPERFLEVEL", []>;
837846 //def S_DECPERFLEVEL : SOPP_ <0x00000015, "S_DECPERFLEVEL", []>;
838847 //def S_TTRACEDATA : SOPP_ <0x00000016, "S_TTRACEDATA", []>;
848 } // End hasSideEffects
839849
840850 def V_CNDMASK_B32_e32 : VOP2 <0x00000000, (outs VReg_32:$dst),
841851 (ins VSrc_32:$src0, VReg_32:$src1, VCCReg:$vcc),
3737 llvm_i32_ty], // tfe(imm)
3838 []>;
3939
40 def int_SI_sendmsg : Intrinsic <[], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
41
4042 class Sample : Intrinsic <[llvm_v4f32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>;
4143
4244 def int_SI_sample : Sample;
0 ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s
1
2 ; CHECK-LABEL: @main
3 ; CHECK: S_SENDMSG 34
4 ; CHECK: S_SENDMSG 274
5 ; CHECK: S_SENDMSG 562
6 ; CHECK: S_SENDMSG 3
7
8 define void @main() {
9 main_body:
10 call void @llvm.SI.sendmsg(i32 34, i32 0);
11 call void @llvm.SI.sendmsg(i32 274, i32 0);
12 call void @llvm.SI.sendmsg(i32 562, i32 0);
13 call void @llvm.SI.sendmsg(i32 3, i32 0);
14 ret void
15 }
16
17 ; Function Attrs: nounwind
18 declare void @llvm.SI.sendmsg(i32, i32) #0
19
20 attributes #0 = { nounwind }