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MC: Fix Intel assembly parser for [global + offset] We were dropping the displacement on the floor if we also had some immediate offset. Should fix PR19033. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202774 91177308-0d34-0410-b5e6-96231b3b80d8 Reid Kleckner 6 years ago
2 changed file(s) with 36 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
935935 unsigned Scale, SMLoc Start, SMLoc End,
936936 unsigned Size, StringRef Identifier,
937937 InlineAsmIdentifierInfo &Info){
938 if (isa(Disp)) {
939 // If this is not a VarDecl then assume it is a FuncDecl or some other label
940 // reference. We need an 'r' constraint here, so we need to create register
941 // operand to ensure proper matching. Just pick a GPR based on the size of
942 // a pointer.
943 if (!Info.IsVarDecl) {
944 unsigned RegNo =
945 is64BitMode() ? X86::RBX : (is32BitMode() ? X86::EBX : X86::BX);
946 return X86Operand::CreateReg(RegNo, Start, End, /*AddressOf=*/true,
947 SMLoc(), Identifier, Info.OpDecl);
948 }
938 // If this is not a VarDecl then assume it is a FuncDecl or some other label
939 // reference. We need an 'r' constraint here, so we need to create register
940 // operand to ensure proper matching. Just pick a GPR based on the size of
941 // a pointer.
942 if (isa(Disp) && !Info.IsVarDecl) {
943 unsigned RegNo =
944 is64BitMode() ? X86::RBX : (is32BitMode() ? X86::EBX : X86::BX);
945 return X86Operand::CreateReg(RegNo, Start, End, /*AddressOf=*/true,
946 SMLoc(), Identifier, Info.OpDecl);
947 }
948
949 // We either have a direct symbol reference, or an offset from a symbol. The
950 // parser always puts the symbol on the LHS, so look there for size
951 // calculation purposes.
952 const MCBinaryExpr *BinOp = dyn_cast(Disp);
953 bool IsSymRef =
954 isa(BinOp ? BinOp->getLHS() : Disp);
955 if (IsSymRef) {
949956 if (!Size) {
950957 Size = Info.Type * 8; // Size is in terms of bits in this context.
951958 if (Size)
11531160 if (ParseIntelExpression(SM, End))
11541161 return 0;
11551162
1156 const MCExpr *Disp;
1163 const MCExpr *Disp = 0;
11571164 if (const MCExpr *Sym = SM.getSym()) {
11581165 // A symbolic displacement.
11591166 Disp = Sym;
11611168 RewriteIntelBracExpression(InstInfo->AsmRewrites, SM.getSymName(),
11621169 ImmDisp, SM.getImm(), BracLoc, StartInBrac,
11631170 End);
1164 } else {
1165 // An immediate displacement only.
1166 Disp = MCConstantExpr::Create(SM.getImm(), getContext());
1171 }
1172
1173 if (SM.getImm() || !Disp) {
1174 const MCExpr *Imm = MCConstantExpr::Create(SM.getImm(), getContext());
1175 if (Disp)
1176 Disp = MCBinaryExpr::CreateAdd(Disp, Imm, getContext());
1177 else
1178 Disp = Imm; // An immediate displacement only.
11671179 }
11681180
11691181 // Parse the dot operator (e.g., [ebx].foo.bar).
589589 // CHECK: fxrstorq (%rax)
590590 fxsave64 opaque ptr [rax]
591591 fxrstor64 opaque ptr [rax]
592
593 .bss
594 .globl _g0
595 .text
596
597 // CHECK: movq _g0, %rbx
598 // CHECK: movq _g0+8, %rcx
599 mov rbx, qword ptr [_g0]
600 mov rcx, qword ptr [_g0 + 8]