llvm.org GIT mirror llvm / 4d96c63
After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125259 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 9 years ago
2 changed file(s) with 31 addition(s) and 14 deletion(s). Raw diff Collapse all Expand all
109109 bool ConvertInstTo3Addr(MachineBasicBlock::iterator &mi,
110110 MachineBasicBlock::iterator &nmi,
111111 MachineFunction::iterator &mbbi,
112 unsigned RegB, unsigned Dist);
112 unsigned RegA, unsigned RegB, unsigned Dist);
113113
114114 typedef std::pair, MachineInstr*> NewKill;
115115 bool canUpdateDeletedKills(SmallVector &Kills,
549549 unsigned FromRegC = getMappedReg(regC, SrcRegMap);
550550 unsigned ToRegB = getMappedReg(regB, DstRegMap);
551551 unsigned ToRegC = getMappedReg(regC, DstRegMap);
552 if (!regsAreCompatible(FromRegB, ToRegB, TRI) &&
552 if ((FromRegB && ToRegB && !regsAreCompatible(FromRegB, ToRegB, TRI)) &&
553553 ((!FromRegC && !ToRegC) ||
554554 regsAreCompatible(FromRegB, ToRegC, TRI) ||
555555 regsAreCompatible(FromRegC, ToRegB, TRI)))
632632 TwoAddressInstructionPass::ConvertInstTo3Addr(MachineBasicBlock::iterator &mi,
633633 MachineBasicBlock::iterator &nmi,
634634 MachineFunction::iterator &mbbi,
635 unsigned RegB, unsigned Dist) {
635 unsigned RegA, unsigned RegB,
636 unsigned Dist) {
636637 MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV);
637638 if (NewMI) {
638639 DEBUG(dbgs() << "2addr: CONVERTING 2-ADDR: " << *mi);
652653 mi = NewMI;
653654 nmi = llvm::next(mi);
654655 }
656
657 // Update source and destination register maps.
658 SrcRegMap.erase(RegA);
659 DstRegMap.erase(RegB);
655660 return true;
656661 }
657662
886891 // three-address instruction. Check if it is profitable.
887892 if (!regBKilled || isProfitableToConv3Addr(regA)) {
888893 // Try to convert it.
889 if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) {
894 if (ConvertInstTo3Addr(mi, nmi, mbbi, regA, regB, Dist)) {
890895 ++NumConvertedTo3Addr;
891896 return true; // Done with this instruction.
892897 }
44 ;; allocator turns the shift into an LEA. This also occurs for ADD.
55
66 ; Check that the shift gets turned into an LEA.
7 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
8 ; RUN: not grep {mov E.X, E.X}
7 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
98
10 @G = external global i32 ; [#uses=3]
9 @G = external global i32
1110
12 define i32 @test1(i32 %X, i32 %Y) {
13 %Z = add i32 %X, %Y ; [#uses=1]
14 volatile store i32 %Y, i32* @G
11 define i32 @test1(i32 %X) nounwind {
12 ; CHECK: test1:
13 ; CHECK-NOT: mov
14 ; CHECK: leal 1(%rdi)
15 %Z = add i32 %X, 1
1516 volatile store i32 %Z, i32* @G
1617 ret i32 %X
1718 }
1819
19 define i32 @test2(i32 %X) {
20 %Z = add i32 %X, 1 ; [#uses=1]
21 volatile store i32 %Z, i32* @G
22 ret i32 %X
20 ; rdar://8977508
21 ; The second add should not be transformed to leal nor should it be
22 ; commutted (which would require inserting a copy).
23 define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {
24 entry:
25 ; CHECK: test2:
26 ; CHECK: leal
27 ; CHECK-NOT: leal
28 ; CHECK-NOT: mov
29 ; CHECK-NEXT: addl
30 ; CHECK-NEXT: ret
31 %add = add i32 %b, %a
32 %add3 = add i32 %add, %c
33 %add5 = add i32 %add3, %d
34 ret i32 %add5
2335 }