llvm.org GIT mirror llvm / 4d44152
[LFTR] Use recomputed BE count This was discussed as part of D62880. The basic thought is that computing BE taken count after widening should produce (on average) an equally good backedge taken count as the one before widening. Since there's only one test in the suite which is impacted by this change, and it's essentially equivelent codegen, that seems to be a reasonable assertion. This change was separated from r362971 so that if this turns out to be problematic, the triggering piece is obvious and easily revertable. For the nestedIV example from elim-extend.ll, we end up with the following BE counts: BEFORE: (-2 + (-1 * %innercount) + %limit) AFTER: (-1 + (sext i32 (-1 + %limit) to i64) + (-1 * (sext i32 %innercount to i64))<nsw>) Note that before is an i32 type, and the after is an i64. Truncating the i64 produces the i32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362975 91177308-0d34-0410-b5e6-96231b3b80d8 Philip Reames 4 months ago
2 changed file(s) with 11 addition(s) and 19 deletion(s). Raw diff Collapse all Expand all
26342634 if (!needsLFTR(L, ExitingBB))
26352635 continue;
26362636
2637 // Note: This block of code is here strictly to seperate an change into
2638 // two parts: one NFC, one not. What's happening here is that SCEV is
2639 // returning a more expensive expression for the BackedgeTakenCount for
2640 // the loop after widening in rare circumstances. In review, we decided
2641 // to accept that small difference - since it has minimal test suite
2642 // impact - but for ease of attribution, the functional diff will be it's
2643 // own change.
2644 const SCEV *BETakenCount = L->getExitingBlock() ?
2645 BackedgeTakenCount : SE->getExitCount(L, ExitingBB);
2637 const SCEV *BETakenCount = SE->getExitCount(L, ExitingBB);
26462638 if (isa(BETakenCount))
26472639 continue;
26482640
111111 ; CHECK-LABEL: @nestedIV(
112112 ; CHECK-NEXT: entry:
113113 ; CHECK-NEXT: [[LIMITDEC:%.*]] = add i32 [[LIMIT:%.*]], -1
114 ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[LIMIT]] to i64
114 ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[LIMITDEC]] to i64
115 ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[LIMIT]] to i64
115116 ; CHECK-NEXT: br label [[OUTERLOOP:%.*]]
116117 ; CHECK: outerloop:
117118 ; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT2:%.*]], [[OUTERMERGE:%.*]] ], [ 0, [[ENTRY:%.*]] ]
118119 ; CHECK-NEXT: [[INNERCOUNT:%.*]] = phi i32 [ [[INNERCOUNT_MERGE:%.*]], [[OUTERMERGE]] ], [ 0, [[ENTRY]] ]
119 ; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV1]], -1
120 ; CHECK-NEXT: [[ADR1:%.*]] = getelementptr i8, i8* [[ADDRESS:%.*]], i64 [[TMP1]]
120 ; CHECK-NEXT: [[TMP2:%.*]] = add nsw i64 [[INDVARS_IV1]], -1
121 ; CHECK-NEXT: [[ADR1:%.*]] = getelementptr i8, i8* [[ADDRESS:%.*]], i64 [[TMP2]]
121122 ; CHECK-NEXT: store i8 0, i8* [[ADR1]]
122123 ; CHECK-NEXT: br label [[INNERPREHEADER:%.*]]
123124 ; CHECK: innerpreheader:
124125 ; CHECK-NEXT: [[INNERPRECMP:%.*]] = icmp sgt i32 [[LIMITDEC]], [[INNERCOUNT]]
125126 ; CHECK-NEXT: br i1 [[INNERPRECMP]], label [[INNERLOOP_PREHEADER:%.*]], label [[OUTERMERGE]]
126127 ; CHECK: innerloop.preheader:
127 ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[INNERCOUNT]] to i64
128 ; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[INNERCOUNT]] to i64
128129 ; CHECK-NEXT: br label [[INNERLOOP:%.*]]
129130 ; CHECK: innerloop:
130 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP2]], [[INNERLOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[INNERLOOP]] ]
131 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP3]], [[INNERLOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[INNERLOOP]] ]
131132 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
132133 ; CHECK-NEXT: [[ADR2:%.*]] = getelementptr i8, i8* [[ADDRESS]], i64 [[INDVARS_IV]]
133134 ; CHECK-NEXT: store i8 0, i8* [[ADR2]]
134135 ; CHECK-NEXT: [[ADR3:%.*]] = getelementptr i8, i8* [[ADDRESS]], i64 [[INDVARS_IV_NEXT]]
135136 ; CHECK-NEXT: store i8 0, i8* [[ADR3]]
136 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = sext i32 [[LIMITDEC]] to i64
137 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
137 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[TMP0]]
138138 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[INNERLOOP]], label [[INNEREXIT:%.*]]
139139 ; CHECK: innerexit:
140140 ; CHECK-NEXT: [[INNERCOUNT_LCSSA_WIDE:%.*]] = phi i64 [ [[INDVARS_IV_NEXT]], [[INNERLOOP]] ]
141 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INNERCOUNT_LCSSA_WIDE]] to i32
141 ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[INNERCOUNT_LCSSA_WIDE]] to i32
142142 ; CHECK-NEXT: br label [[OUTERMERGE]]
143143 ; CHECK: outermerge:
144 ; CHECK-NEXT: [[INNERCOUNT_MERGE]] = phi i32 [ [[TMP3]], [[INNEREXIT]] ], [ [[INNERCOUNT]], [[INNERPREHEADER]] ]
144 ; CHECK-NEXT: [[INNERCOUNT_MERGE]] = phi i32 [ [[TMP4]], [[INNEREXIT]] ], [ [[INNERCOUNT]], [[INNERPREHEADER]] ]
145145 ; CHECK-NEXT: [[ADR4:%.*]] = getelementptr i8, i8* [[ADDRESS]], i64 [[INDVARS_IV1]]
146146 ; CHECK-NEXT: store i8 0, i8* [[ADR4]]
147147 ; CHECK-NEXT: [[OFS5:%.*]] = sext i32 [[INNERCOUNT_MERGE]] to i64
148148 ; CHECK-NEXT: [[ADR5:%.*]] = getelementptr i8, i8* [[ADDRESS]], i64 [[OFS5]]
149149 ; CHECK-NEXT: store i8 0, i8* [[ADR5]]
150150 ; CHECK-NEXT: [[INDVARS_IV_NEXT2]] = add nuw nsw i64 [[INDVARS_IV1]], 1
151 ; CHECK-NEXT: [[TMP47:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT2]], [[TMP0]]
151 ; CHECK-NEXT: [[TMP47:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT2]], [[TMP1]]
152152 ; CHECK-NEXT: br i1 [[TMP47]], label [[OUTERLOOP]], label [[RETURN:%.*]]
153153 ; CHECK: return:
154154 ; CHECK-NEXT: ret void