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Lift alignment restrictions for load/store folding on VINSERTF128/VEXTRACTF128. Fixes PR17268. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190916 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 6 years ago
4 changed file(s) with 12 addition(s) and 13 deletion(s). Raw diff Collapse all Expand all
77157715 (VINSERTF128rr VR256:$src1, VR128:$src2,
77167716 (INSERT_get_vinsert128_imm VR256:$ins))>;
77177717
7718 def : Pat<(vinsert128_insert:$ins (v8f32 VR256:$src1), (memopv4f32 addr:$src2),
7718 def : Pat<(vinsert128_insert:$ins (v8f32 VR256:$src1), (loadv4f32 addr:$src2),
77197719 (iPTR imm)),
77207720 (VINSERTF128rm VR256:$src1, addr:$src2,
77217721 (INSERT_get_vinsert128_imm VR256:$ins))>;
7722 def : Pat<(vinsert128_insert:$ins (v4f64 VR256:$src1), (memopv2f64 addr:$src2),
7722 def : Pat<(vinsert128_insert:$ins (v4f64 VR256:$src1), (loadv2f64 addr:$src2),
77237723 (iPTR imm)),
77247724 (VINSERTF128rm VR256:$src1, addr:$src2,
77257725 (INSERT_get_vinsert128_imm VR256:$ins))>;
77437743 (VINSERTF128rr VR256:$src1, VR128:$src2,
77447744 (INSERT_get_vinsert128_imm VR256:$ins))>;
77457745
7746 def : Pat<(vinsert128_insert:$ins (v4i64 VR256:$src1), (memopv2i64 addr:$src2),
7746 def : Pat<(vinsert128_insert:$ins (v4i64 VR256:$src1), (loadv2i64 addr:$src2),
77477747 (iPTR imm)),
77487748 (VINSERTF128rm VR256:$src1, addr:$src2,
77497749 (INSERT_get_vinsert128_imm VR256:$ins))>;
77507750 def : Pat<(vinsert128_insert:$ins (v8i32 VR256:$src1),
7751 (bc_v4i32 (memopv2i64 addr:$src2)),
7751 (bc_v4i32 (loadv2i64 addr:$src2)),
77527752 (iPTR imm)),
77537753 (VINSERTF128rm VR256:$src1, addr:$src2,
77547754 (INSERT_get_vinsert128_imm VR256:$ins))>;
77557755 def : Pat<(vinsert128_insert:$ins (v32i8 VR256:$src1),
7756 (bc_v16i8 (memopv2i64 addr:$src2)),
7756 (bc_v16i8 (loadv2i64 addr:$src2)),
77577757 (iPTR imm)),
77587758 (VINSERTF128rm VR256:$src1, addr:$src2,
77597759 (INSERT_get_vinsert128_imm VR256:$ins))>;
77607760 def : Pat<(vinsert128_insert:$ins (v16i16 VR256:$src1),
7761 (bc_v8i16 (memopv2i64 addr:$src2)),
7761 (bc_v8i16 (loadv2i64 addr:$src2)),
77627762 (iPTR imm)),
77637763 (VINSERTF128rm VR256:$src1, addr:$src2,
77647764 (INSERT_get_vinsert128_imm VR256:$ins))>;
77907790 (v4f64 VR256:$src1),
77917791 (EXTRACT_get_vextract128_imm VR128:$ext)))>;
77927792
7793 def : Pat<(alignedstore (v4f32 (vextract128_extract:$ext (v8f32 VR256:$src1),
7794 (iPTR imm))), addr:$dst),
7793 def : Pat<(store (v4f32 (vextract128_extract:$ext (v8f32 VR256:$src1),
7794 (iPTR imm))), addr:$dst),
77957795 (VEXTRACTF128mr addr:$dst, VR256:$src1,
77967796 (EXTRACT_get_vextract128_imm VR128:$ext))>;
7797 def : Pat<(alignedstore (v2f64 (vextract128_extract:$ext (v4f64 VR256:$src1),
7798 (iPTR imm))), addr:$dst),
7797 def : Pat<(store (v2f64 (vextract128_extract:$ext (v4f64 VR256:$src1),
7798 (iPTR imm))), addr:$dst),
77997799 (VEXTRACTF128mr addr:$dst, VR256:$src1,
78007800 (EXTRACT_get_vextract128_imm VR128:$ext))>;
78017801 }
5050 "number "));
5151 namespace {
5252
53 static const unsigned MinVecRegSize = 128;
53 static const unsigned MinVecRegSize = 256;
5454
5555 static const unsigned RecursionMaxDepth = 12;
5656
248248 ; rdar://12684358
249249 ; Make sure loads happen before stores.
250250 ; CHECK: swap8doubles
251 ; CHECK: vmovups {{[0-9]*}}(%rdi), %xmm{{[0-9]+}}
252 ; CHECK: vmovups {{[0-9]*}}(%rdi), %xmm{{[0-9]+}}
253251 ; CHECK: vmovups {{[0-9]*}}(%rdi), %xmm{{[0-9]+}}
254252 ; CHECK: vmovups {{[0-9]*}}(%rdi), %xmm{{[0-9]+}}
255253 ; CHECK: vmovaps {{[0-9]*}}(%rsi), %ymm{{[0-9]+}}
461461 DisableLoopUnrolling : OptLevel == 0;
462462
463463 Builder.LoopVectorize = OptLevel > 1 && SizeLevel < 2;
464 Builder.SLPVectorize = true;
464465
465466 Builder.populateFunctionPassManager(FPM);
466467 Builder.populateModulePassManager(MPM);