llvm.org GIT mirror llvm / 4a97170
Remove the MachineMove class. It was just a less powerful and more confusing version of MCCFIInstruction. A side effect is that, since MCCFIInstruction uses dwarf register numbers, calls to getDwarfRegNum are pushed out, which should allow further simplifications. I left the MachineModuleInfo::addFrameMove interface unchanged since this patch was already fairly big. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181680 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 7 years ago
38 changed file(s) with 170 addition(s) and 178 deletion(s). Raw diff Collapse all Expand all
3737 class MachineConstantPoolValue;
3838 class MachineJumpTableInfo;
3939 class MachineModuleInfo;
40 class MachineMove;
4140 class MCAsmInfo;
41 class MCCFIInstruction;
4242 class MCContext;
4343 class MCSection;
4444 class MCStreamer;
416416 // Dwarf Lowering Routines
417417 //===------------------------------------------------------------------===//
418418
419 /// EmitCFIFrameMove - Emit frame instruction to describe the layout of the
420 /// frame.
421 void EmitCFIFrameMove(const MachineMove &Move) const;
419 /// \brief Emit frame instruction to describe the layout of the frame.
420 void emitCFIInstruction(const MCCFIInstruction &Inst) const;
422421
423422 //===------------------------------------------------------------------===//
424423 // Inline Asm Support
105105 /// want.
106106 MachineModuleInfoImpl *ObjFileMMI;
107107
108 /// FrameMoves - List of moves done by a function's prolog. Used to construct
109 /// frame maps by debug and exception handling consumers.
110 std::vector FrameMoves;
108 /// List of moves done by a function's prolog. Used to construct frame maps
109 /// by debug and exception handling consumers.
110 std::vector FrameInstructions;
111111
112112 /// CompactUnwindEncoding - If the target supports it, this is the compact
113113 /// unwind encoding. It replaces a function's CIE and FDE.
230230 UsesVAFloatArgument = b;
231231 }
232232
233 /// getFrameMoves - Returns a reference to a list of moves done in the current
233 /// \brief Returns a reference to a list of cfi instructions in the current
234234 /// function's prologue. Used to construct frame maps for debug and exception
235235 /// handling comsumers.
236 const std::vectorachineMove> &getFrameMoves() { return FrameMoves; }
236 const std::vectorCCFIInstruction> &getFrameInstructions() {
237 return FrameInstructions;
238 }
237239
238240 void addFrameMove(MCSymbol *Label, const MachineLocation &Dst,
239 const MachineLocation &Src) {
240 FrameMoves.push_back(MachineMove(Label, Dst, Src));
241 }
241 const MachineLocation &Src);
242242
243243 /// getCompactUnwindEncoding - Returns the compact unwind encoding for a
244244 /// function if the target supports the encoding. This encoding replaces a
1616 #define LLVM_MC_MCASMINFO_H
1717
1818 #include "llvm/MC/MCDirectives.h"
19 #include "llvm/MC/MCDwarf.h"
1920 #include "llvm/MC/MachineLocation.h"
2021 #include
2122 #include
331332
332333 //===--- Prologue State ----------------------------------------------===//
333334
334 std::vectorachineMove> InitialFrameState;
335 std::vectorCCFIInstruction> InitialFrameState;
335336
336337 public:
337338 explicit MCAsmInfo();
566567 return DwarfRegNumForCFI;
567568 }
568569
569 void addInitialFrameState(MCSymbol *label, const MachineLocation &D,
570 const MachineLocation &S) {
571 InitialFrameState.push_back(MachineMove(label, D, S));
572 }
573 const std::vector &getInitialFrameState() const {
570 void addInitialFrameState(const MCCFIInstruction &Inst) {
571 InitialFrameState.push_back(Inst);
572 }
573
574 const std::vector &getInitialFrameState() const {
574575 return InitialFrameState;
575576 }
576577 };
99 // frame. Locations will be one of two forms; a register or an address formed
1010 // from a base address plus an offset. Register indirection can be specified by
1111 // explicitly passing an offset to the constructor.
12 //
13 // The MachineMove class is used to represent abstract move operations in the
14 // prolog/epilog of a compiled function. A collection of these objects can be
15 // used by a debug consumer to track the location of values when unwinding stack
16 // frames.
1712 //===----------------------------------------------------------------------===//
1813
1914
7368 void dump();
7469 #endif
7570 };
76
77 /// MachineMove - This class represents the save or restore of a callee saved
78 /// register that exception or debug info needs to know about.
79 class MachineMove {
80 private:
81 /// Label - Symbol for post-instruction address when result of move takes
82 /// effect.
83 MCSymbol *Label;
84
85 // Move to & from location.
86 MachineLocation Destination, Source;
87 public:
88 MachineMove() : Label(0) {}
89
90 MachineMove(MCSymbol *label, const MachineLocation &D,
91 const MachineLocation &S)
92 : Label(label), Destination(D), Source(S) {}
93
94 // Accessors
95 MCSymbol *getLabel() const { return Label; }
96 const MachineLocation &getDestination() const { return Destination; }
97 const MachineLocation &getSource() const { return Source; }
98 };
99
10071 } // End llvm namespace
10172
10273 #endif
6969
7070 typedef unsigned (*TripleMatchQualityFnTy)(const std::string &TT);
7171
72 typedef MCAsmInfo *(*MCAsmInfoCtorFnTy)(StringRef TT);
72 typedef MCAsmInfo *(*MCAsmInfoCtorFnTy)(const MCRegisterInfo &MRI,
73 StringRef TT);
7374 typedef MCCodeGenInfo *(*MCCodeGenInfoCtorFnTy)(StringRef TT,
7475 Reloc::Model RM,
7576 CodeModel::Model CM,
264265 /// feature set; it should always be provided. Generally this should be
265266 /// either the target triple from the module, or the target triple of the
266267 /// host if that does not exist.
267 MCAsmInfo *createMCAsmInfo(StringRef Triple) const {
268 MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI,
269 StringRef Triple) const {
268270 if (!MCAsmInfoCtorFn)
269271 return 0;
270 return MCAsmInfoCtorFn(Triple);
272 return MCAsmInfoCtorFn(MRI, Triple);
271273 }
272274
273275 /// createMCCodeGenInfo - Create a MCCodeGenInfo implementation.
802804 TargetRegistry::RegisterMCAsmInfo(T, &Allocator);
803805 }
804806 private:
805 static MCAsmInfo *Allocator(StringRef TT) {
807 static MCAsmInfo *Allocator(const MCRegisterInfo &MRI, StringRef TT) {
806808 return new MCAsmInfoImpl(TT);
807809 }
808810
291291 Reloc::Model RM, CodeModel::Model CM,
292292 CodeGenOpt::Level OL);
293293
294 void initAsmInfo();
294295 public:
295296 /// \brief Register analysis passes for this target with a pass manager.
296297 ///
635635 OutStreamer.EmitCompactUnwindEncoding(MMI->getCompactUnwindEncoding());
636636
637637 MachineModuleInfo &MMI = MF->getMMI();
638 const std::vector &Moves = MMI.getFrameMoves();
638 std::vector Instructions = MMI.getFrameInstructions();
639639 bool FoundOne = false;
640640 (void)FoundOne;
641 for (std::vector::const_iterator I = Moves.begin(),
642 E = Moves.end();
643 I != E; ++I) {
641 for (std::vector::iterator I = Instructions.begin(),
642 E = Instructions.end(); I != E; ++I) {
644643 if (I->getLabel() == Label) {
645 EmitCFIFrameMove(*I);
644 emitCFIInstruction(*I);
646645 FoundOne = true;
647646 }
648647 }
168168 // Dwarf Lowering Routines
169169 //===----------------------------------------------------------------------===//
170170
171 /// EmitCFIFrameMove - Emit a frame instruction.
172 void AsmPrinter::EmitCFIFrameMove(const MachineMove &Move) const {
173 const TargetRegisterInfo *RI = TM.getRegisterInfo();
174
175 const MachineLocation &Dst = Move.getDestination();
176 const MachineLocation &Src = Move.getSource();
177
178 // If advancing cfa.
179 if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
180 if (Src.getReg() == MachineLocation::VirtualFP) {
181 OutStreamer.EmitCFIDefCfaOffset(-Src.getOffset());
182 } else {
183 // Reg + Offset
184 OutStreamer.EmitCFIDefCfa(RI->getDwarfRegNum(Src.getReg(), true),
185 Src.getOffset());
186 }
187 } else if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
188 assert(Dst.isReg() && "Machine move not supported yet.");
189 OutStreamer.EmitCFIDefCfaRegister(RI->getDwarfRegNum(Dst.getReg(), true));
190 } else {
191 assert(!Dst.isReg() && "Machine move not supported yet.");
192 OutStreamer.EmitCFIOffset(RI->getDwarfRegNum(Src.getReg(), true),
193 Dst.getOffset());
171 void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
172 switch (Inst.getOperation()) {
173 default:
174 llvm_unreachable("Unexpected instruction");
175 case MCCFIInstruction::OpDefCfaOffset:
176 OutStreamer.EmitCFIDefCfaOffset(Inst.getOffset());
177 break;
178 case MCCFIInstruction::OpDefCfa:
179 OutStreamer.EmitCFIDefCfa(Inst.getRegister(), Inst.getOffset());
180 break;
181 case MCCFIInstruction::OpDefCfaRegister:
182 OutStreamer.EmitCFIDefCfaRegister(Inst.getRegister());
183 break;
184 case MCCFIInstruction::OpOffset:
185 OutStreamer.EmitCFIOffset(Inst.getRegister(), Inst.getOffset());
186 break;
194187 }
195188 }
2222 template class SmallVectorImpl;
2323 struct LandingPadInfo;
2424 class MachineModuleInfo;
25 class MachineMove;
2625 class MachineInstr;
2726 class MachineFunction;
2827 class MCAsmInfo;
6161 llvm_unreachable("Invalid verbose asm state");
6262 }
6363
64 void LLVMTargetMachine::initAsmInfo() {
65 AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
66 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
67 // and if the old one gets included then MCAsmInfo will be NULL and
68 // we'll crash later.
69 // Provide the user with a useful error message about what's wrong.
70 assert(AsmInfo && "MCAsmInfo not initialized."
71 "Make sure you include the correct TargetSelect.h"
72 "and that InitializeAllTargetMCs() is being invoked!");
73 }
74
6475 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
6576 StringRef CPU, StringRef FS,
6677 TargetOptions Options,
6879 CodeGenOpt::Level OL)
6980 : TargetMachine(T, Triple, CPU, FS, Options) {
7081 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
71 AsmInfo = T.createMCAsmInfo(Triple);
72 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
73 // and if the old one gets included then MCAsmInfo will be NULL and
74 // we'll crash later.
75 // Provide the user with a useful error message about what's wrong.
76 assert(AsmInfo && "MCAsmInfo not initialized."
77 "Make sure you include the correct TargetSelect.h"
78 "and that InitializeAllTargetMCs() is being invoked!");
7982 }
8083
8184 void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
267267 MachineModuleInfo::~MachineModuleInfo() {
268268 }
269269
270 static MCCFIInstruction convertMoveToCFI(const MCRegisterInfo &MRI,
271 MCSymbol *Label,
272 const MachineLocation &Dst,
273 const MachineLocation &Src) {
274 // If advancing cfa.
275 if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
276 if (Src.getReg() == MachineLocation::VirtualFP)
277 return MCCFIInstruction::createDefCfaOffset(Label, Src.getOffset());
278 // Reg + Offset
279 return MCCFIInstruction::createDefCfa(
280 Label, MRI.getDwarfRegNum(Src.getReg(), true), -Src.getOffset());
281 }
282
283 if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
284 assert(Dst.isReg() && "Machine move not supported yet.");
285 return MCCFIInstruction::createDefCfaRegister(
286 Label, MRI.getDwarfRegNum(Dst.getReg(), true));
287 }
288
289 assert(!Dst.isReg() && "Machine move not supported yet.");
290 return MCCFIInstruction::createOffset(
291 Label, MRI.getDwarfRegNum(Src.getReg(), true), Dst.getOffset());
292 }
293
294
295 void MachineModuleInfo::addFrameMove(MCSymbol *Label,
296 const MachineLocation &Dst,
297 const MachineLocation &Src) {
298 MCCFIInstruction I =
299 convertMoveToCFI(Context.getRegisterInfo(), Label, Dst, Src);
300 FrameInstructions.push_back(I);
301 }
302
270303 bool MachineModuleInfo::doInitialization(Module &M) {
271304
272305 ObjFileMMI = 0;
302335 ///
303336 void MachineModuleInfo::EndFunction() {
304337 // Clean up frame info.
305 FrameMoves.clear();
338 FrameInstructions.clear();
306339
307340 // Clean up exception info.
308341 LandingPads.clear();
4141 const Target *TheTarget = TargetRegistry::lookupTarget(Triple, Error);
4242 assert(TheTarget && "Unable to create target!");
4343
44 const MCRegisterInfo *MRI = TheTarget->createMCRegInfo(Triple);
45 if (!MRI)
46 return 0;
47
4448 // Get the assembler info needed to setup the MCContext.
45 const MCAsmInfo *MAI = TheTarget->createMCAsmInfo(Triple);
49 const MCAsmInfo *MAI = TheTarget->createMCAsmInfo(*MRI, Triple);
4650 if (!MAI)
4751 return 0;
4852
4953 const MCInstrInfo *MII = TheTarget->createMCInstrInfo();
5054 if (!MII)
51 return 0;
52
53 const MCRegisterInfo *MRI = TheTarget->createMCRegInfo(Triple);
54 if (!MRI)
5555 return 0;
5656
5757 // Package up features to be passed to target/subtarget
870870 streamer);
871871 unsigned size = getSizeForEncoding(streamer, symbolEncoding);
872872 streamer.EmitValue(v, size);
873 }
874
875 static const MachineLocation TranslateMachineLocation(
876 const MCRegisterInfo &MRI,
877 const MachineLocation &Loc) {
878 unsigned Reg = Loc.getReg() == MachineLocation::VirtualFP ?
879 MachineLocation::VirtualFP :
880 unsigned(MRI.getDwarfRegNum(Loc.getReg(), true));
881 const MachineLocation &NewLoc = Loc.isReg() ?
882 MachineLocation(Reg) : MachineLocation(Reg, Loc.getOffset());
883 return NewLoc;
884873 }
885874
886875 namespace {
13151304 // Initial Instructions
13161305
13171306 const MCAsmInfo &MAI = context.getAsmInfo();
1318 const std::vector &Moves = MAI.getInitialFrameState();
1319 std::vector Instructions;
1320
1321 for (int i = 0, n = Moves.size(); i != n; ++i) {
1322 MCSymbol *Label = Moves[i].getLabel();
1323 const MachineLocation &Dst =
1324 TranslateMachineLocation(MRI, Moves[i].getDestination());
1325 const MachineLocation &Src =
1326 TranslateMachineLocation(MRI, Moves[i].getSource());
1327
1328 if (Dst.isReg()) {
1329 assert(Dst.getReg() == MachineLocation::VirtualFP);
1330 assert(!Src.isReg());
1331 MCCFIInstruction Inst =
1332 MCCFIInstruction::createDefCfa(Label, Src.getReg(), -Src.getOffset());
1333 Instructions.push_back(Inst);
1334 } else {
1335 assert(Src.isReg());
1336 unsigned Reg = Src.getReg();
1337 int Offset = Dst.getOffset();
1338 MCCFIInstruction Inst =
1339 MCCFIInstruction::createOffset(Label, Reg, Offset);
1340 Instructions.push_back(Inst);
1341 }
1342 }
1343
1307 const std::vector &Instructions =
1308 MAI.getInitialFrameState();
13441309 EmitCFIInstructions(streamer, Instructions, NULL);
13451310
13461311 // Padding
3737 TLInfo(*this),
3838 TSInfo(*this),
3939 FrameLowering(Subtarget) {
40 initAsmInfo();
4041 }
4142
4243 namespace {
5656 return X;
5757 }
5858
59 static MCAsmInfo *createAArch64MCAsmInfo(StringRef TT) {
59 static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
60 StringRef TT) {
6061 Triple TheTriple(TT);
6162
6263 MCAsmInfo *MAI = new AArch64ELFMCAsmInfo();
63 MachineLocation Dst(MachineLocation::VirtualFP);
64 MachineLocation Src(AArch64::XSP, 0);
65 MAI->addInitialFrameState(0, Dst, Src);
64 unsigned Reg = MRI.getDwarfRegNum(AArch64::XSP, true);
65 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
66 MAI->addInitialFrameState(Inst);
6667
6768 return MAI;
6869 }
8484 TLInfo(*this),
8585 TSInfo(*this),
8686 FrameLowering(Subtarget) {
87 initAsmInfo();
8788 if (!Subtarget.hasARMOps())
8889 report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not "
8990 "support ARM mode execution!");
116117 FrameLowering(Subtarget.hasThumb2()
117118 ? new ARMFrameLowering(Subtarget)
118119 : (ARMFrameLowering*)new Thumb1FrameLowering(Subtarget)) {
120 initAsmInfo();
119121 }
120122
121123 namespace {
158158 return X;
159159 }
160160
161 static MCAsmInfo *createARMMCAsmInfo(StringRef TT) {
161 static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
162162 Triple TheTriple(TT);
163163
164164 if (TheTriple.isOSDarwin())
7878 FrameLowering(Subtarget),
7979 InstrItins(&Subtarget.getInstrItineraryData()) {
8080 setMCUseCFI(false);
81 initAsmInfo();
8182 }
8283
8384 // addPassesForOptimizations - Allow the backend (target) to add Target
5353 return X;
5454 }
5555
56 static MCAsmInfo *createHexagonMCAsmInfo(StringRef TT) {
56 static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
57 StringRef TT) {
5758 MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
5859
5960 // VirtualFP = (R30 + #0).
60 MachineLocation Dst(MachineLocation::VirtualFP);
61 MachineLocation Src(Hexagon::R30, 0);
62 MAI->addInitialFrameState(0, Dst, Src);
61 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(
62 0, Hexagon::R30, 0);
63 MAI->addInitialFrameState(Inst);
6364
6465 return MAI;
6566 }
4242 FrameLowering(Subtarget),
4343 TLInfo(*this), TSInfo(*this),
4444 InstrItins(Subtarget.getInstrItineraryData()) {
45 initAsmInfo();
4546 }
4647
4748 namespace {
5252 return X;
5353 }
5454
55 static MCAsmInfo *createMCAsmInfo(StringRef TT) {
55 static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
5656 Triple TheTriple(TT);
5757 switch (TheTriple.getOS()) {
5858 default:
3535 // FIXME: Check DataLayout string.
3636 DL("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"),
3737 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
38 FrameLowering(Subtarget) { }
38 FrameLowering(Subtarget) {
39 initAsmInfo();
40 }
3941
4042 namespace {
4143 /// MSP430 Code Generator Pass Configuration Options.
9292 return X;
9393 }
9494
95 static MCAsmInfo *createMipsMCAsmInfo(StringRef TT) {
95 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
9696 MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
9797
98 MachineLocation Dst(MachineLocation::VirtualFP);
99 MachineLocation Src(Mips::SP, 0);
100 MAI->addInitialFrameState(0, Dst, Src);
98 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
99 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0);
100 MAI->addInitialFrameState(Inst);
101101
102102 return MAI;
103103 }
7171 FrameLowering(MipsFrameLowering::create(*this, Subtarget)),
7272 TLInfo(MipsTargetLowering::create(*this)),
7373 TSInfo(*this), JITInfo() {
74 initAsmInfo();
7475 }
7576
7677
7171 Subtarget(TT, CPU, FS, is64bit), DL(Subtarget.getDataLayout()),
7272 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
7373 FrameLowering(
74 *this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {}
74 *this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {
75 initAsmInfo();
76 }
7577
7678 void NVPTXTargetMachine32::anchor() {}
7779
5757 return X;
5858 }
5959
60 static MCAsmInfo *createPPCMCAsmInfo(StringRef TT) {
60 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
6161 Triple TheTriple(TT);
6262 bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
6363
6868 MAI = new PPCLinuxMCAsmInfo(isPPC64);
6969
7070 // Initial state of the frame pointer is R1.
71 MachineLocation Dst(MachineLocation::VirtualFP);
72 MachineLocation Src(isPPC64? PPC::X1 : PPC::R1, 0);
73 MAI->addInitialFrameState(0, Dst, Src);
71 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
72 MCCFIInstruction Inst =
73 MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0);
74 MAI->addInitialFrameState(Inst);
7475
7576 return MAI;
7677 }
4747 // The binutils for the BG/P are too old for CFI.
4848 if (Subtarget.isBGP())
4949 setMCUseCFI(false);
50 initAsmInfo();
5051 }
5152
5253 void PPC32TargetMachine::anchor() { }
6969 InstrInfo = new SIInstrInfo(*this);
7070 TLInfo = new SITargetLowering(*this);
7171 }
72 initAsmInfo();
7273 }
7374
7475 AMDGPUTargetMachine::~AMDGPUTargetMachine() {
3636 InstrInfo(Subtarget),
3737 TLInfo(*this), TSInfo(*this),
3838 FrameLowering(Subtarget) {
39 initAsmInfo();
3940 }
4041
4142 namespace {
2626
2727 using namespace llvm;
2828
29 static MCAsmInfo *createSystemZMCAsmInfo(StringRef TT) {
29 static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
30 StringRef TT) {
3031 MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
31 MachineLocation FPDst(MachineLocation::VirtualFP);
32 MachineLocation FPSrc(SystemZ::R15D, -SystemZMC::CFAOffsetFromInitialSP);
33 MAI->addInitialFrameState(0, FPDst, FPSrc);
32 MCCFIInstruction Inst =
33 MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(SystemZ::R15D, true),
34 SystemZMC::CFAOffsetFromInitialSP);
35 MAI->addInitialFrameState(Inst);
3436 return MAI;
3537 }
3638
3232 "-f32:32-f64:64-f128:64-a0:8:16-n32:64"),
3333 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
3434 FrameLowering(*this, Subtarget) {
35 initAsmInfo();
3536 }
3637
3738 namespace {
262262 return X;
263263 }
264264
265 static MCAsmInfo *createX86MCAsmInfo(StringRef TT) {
265 static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
266266 Triple TheTriple(TT);
267267 bool is64Bit = TheTriple.getArch() == Triple::x86_64;
268268
289289 int stackGrowth = is64Bit ? -8 : -4;
290290
291291 // Initial state of the frame pointer is esp+stackGrowth.
292 MachineLocation Dst(MachineLocation::VirtualFP);
293 MachineLocation Src(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
294 MAI->addInitialFrameState(0, Dst, Src);
292 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP;
293 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(
294 0, MRI.getDwarfRegNum(StackPtr, true), -stackGrowth);
295 MAI->addInitialFrameState(Inst);
295296
296297 // Add return address to move list
297 MachineLocation CSDst(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
298 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP);
299 MAI->addInitialFrameState(0, CSDst, CSSrc);
298 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP;
299 MCCFIInstruction Inst2 = MCCFIInstruction::createOffset(
300 0, MRI.getDwarfRegNum(InstPtr, true), stackGrowth);
301 MAI->addInitialFrameState(Inst2);
300302
301303 return MAI;
302304 }
4848 TLInfo(*this),
4949 TSInfo(*this),
5050 JITInfo(*this) {
51 initAsmInfo();
5152 }
5253
5354 void X86_64TargetMachine::anchor() { }
6869 TLInfo(*this),
6970 TSInfo(*this),
7071 JITInfo(*this) {
72 initAsmInfo();
7173 }
7274
7375 /// X86TargetMachine ctor - Create an X86 target.
5050 return X;
5151 }
5252
53 static MCAsmInfo *createXCoreMCAsmInfo(StringRef TT) {
53 static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI,
54 StringRef TT) {
5455 MCAsmInfo *MAI = new XCoreMCAsmInfo(TT);
5556
5657 // Initial state of the frame pointer is SP.
57 MachineLocation Dst(MachineLocation::VirtualFP);
58 MachineLocation Src(XCore::SP, 0);
59 MAI->addInitialFrameState(0, Dst, Src);
58 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, XCore::SP, 0);
59 MAI->addInitialFrameState(Inst);
6060
6161 return MAI;
6262 }
3232 FrameLowering(Subtarget),
3333 TLInfo(*this),
3434 TSInfo(*this) {
35 initAsmInfo();
3536 }
3637
3738 namespace {
378378 // it later.
379379 SrcMgr.setIncludeDirs(IncludeDirs);
380380
381 llvm::OwningPtr MAI(TheTarget->createMCAsmInfo(TripleName));
382 assert(MAI && "Unable to create target asm info!");
383
384381 llvm::OwningPtr MRI(TheTarget->createMCRegInfo(TripleName));
385382 assert(MRI && "Unable to create target register info!");
383
384 llvm::OwningPtr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
385 assert(MAI && "Unable to create target asm info!");
386386
387387 // FIXME: This is not pretty. MCContext has a ptr to MCObjectFileInfo and
388388 // MCObjectFileInfo needs a MCContext reference in order to initialize itself.
250250 InstrAnalysis(TheTarget->createMCInstrAnalysis(InstrInfo.get()));
251251
252252 // Set up disassembler.
253 OwningPtrAsmInfo> AsmInfo(TheTarget->createMCAsmInfo(TripleName));
253 OwningPtrRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
254 OwningPtr AsmInfo(
255 TheTarget->createMCAsmInfo(*MRI, TripleName));
254256 OwningPtr
255257 STI(TheTarget->createMCSubtargetInfo(TripleName, "", ""));
256258 OwningPtr DisAsm(TheTarget->createMCDisassembler(*STI));
257 OwningPtr MRI(TheTarget->createMCRegInfo(TripleName));
258259 int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
259260 OwningPtr
260261 IP(TheTarget->createMCInstPrinter(AsmPrinterVariant, *AsmInfo, *InstrInfo,
271271 if (Symbols.empty())
272272 Symbols.push_back(std::make_pair(0, name));
273273
274 OwningPtr MRI(TheTarget->createMCRegInfo(TripleName));
275 if (!MRI) {
276 errs() << "error: no register info for target " << TripleName << "\n";
277 return;
278 }
279
274280 // Set up disassembler.
275 OwningPtr AsmInfo(TheTarget->createMCAsmInfo(TripleName));
281 OwningPtr AsmInfo(
282 TheTarget->createMCAsmInfo(*MRI, TripleName));
276283
277284 if (!AsmInfo) {
278285 errs() << "error: no assembly info for target " << TripleName << "\n";
291298 TheTarget->createMCDisassembler(*STI));
292299 if (!DisAsm) {
293300 errs() << "error: no disassembler for target " << TripleName << "\n";
294 return;
295 }
296
297 OwningPtr MRI(TheTarget->createMCRegInfo(TripleName));
298 if (!MRI) {
299 errs() << "error: no register info for target " << TripleName << "\n";
300301 return;
301302 }
302303