llvm.org GIT mirror llvm / 4a8ac8d
Add support for the VIA PadLock instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8 Joerg Sonnenberger 9 years ago
12 changed file(s) with 165 addition(s) and 14 deletion(s). Raw diff Collapse all Expand all
7474 case THREEBYTE_3A:
7575 decision = &THREEBYTE3A_SYM;
7676 break;
77 case THREEBYTE_A6:
78 decision = &THREEBYTEA6_SYM;
79 break;
80 case THREEBYTE_A7:
81 decision = &THREEBYTEA7_SYM;
82 break;
7783 }
7884
7985 return decision->opcodeDecisions[insnContext].modRMDecisions[opcode].
113119 break;
114120 case THREEBYTE_3A:
115121 dec = &THREEBYTE3A_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
122 break;
123 case THREEBYTE_A6:
124 dec = &THREEBYTEA6_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
125 break;
126 case THREEBYTE_A7:
127 dec = &THREEBYTEA7_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
116128 break;
117129 }
118130
579591 return -1;
580592
581593 insn->opcodeType = THREEBYTE_3A;
594 } else if (current == 0xa6) {
595 dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
596
597 insn->threeByteEscape = current;
598
599 if (consumeByte(insn, ¤t))
600 return -1;
601
602 insn->opcodeType = THREEBYTE_A6;
603 } else if (current == 0xa7) {
604 dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
605
606 insn->threeByteEscape = current;
607
608 if (consumeByte(insn, ¤t))
609 return -1;
610
611 insn->opcodeType = THREEBYTE_A7;
582612 } else {
583613 dbgprintf(insn, "Didn't find a three-byte escape prefix");
584614
2929 #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
3030 #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
3131 #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
32 #define THREEBYTEA6_SYM x86DisassemblerThreeByteA6Opcodes
33 #define THREEBYTEA7_SYM x86DisassemblerThreeByteA7Opcodes
3234
3335 #define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers"
3436 #define CONTEXTS_STR "x86DisassemblerContexts"
3638 #define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes"
3739 #define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes"
3840 #define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
41 #define THREEBYTEA6_STR "x86DisassemblerThreeByteA6Opcodes"
42 #define THREEBYTEA7_STR "x86DisassemblerThreeByteA7Opcodes"
3943
4044 /*
4145 * Attributes of an instruction that must be known before the opcode can be
118122 ONEBYTE = 0,
119123 TWOBYTE = 1,
120124 THREEBYTE_38 = 2,
121 THREEBYTE_3A = 3
125 THREEBYTE_3A = 3,
126 THREEBYTE_A6 = 4,
127 THREEBYTE_A7 = 5
122128 } OpcodeType;
123129
124130 /*
651651 case X86II::TB: // Two-byte opcode prefix
652652 case X86II::T8: // 0F 38
653653 case X86II::TA: // 0F 3A
654 case X86II::A6: // 0F A6
655 case X86II::A7: // 0F A7
654656 Need0FPrefix = true;
655657 break;
656658 case X86II::TF: // F2 0F 38
693695 break;
694696 case X86II::TA: // 0F 3A
695697 MCE.emitByte(0x3A);
698 break;
699 case X86II::A6: // 0F A6
700 MCE.emitByte(0xA6);
701 break;
702 case X86II::A7: // 0F A7
703 MCE.emitByte(0xA7);
696704 break;
697705 }
698706
104104 class XS { bits<5> Prefix = 12; }
105105 class T8 { bits<5> Prefix = 13; }
106106 class TA { bits<5> Prefix = 14; }
107 class TF { bits<5> Prefix = 15; }
107 class A6 { bits<5> Prefix = 15; }
108 class A7 { bits<5> Prefix = 16; }
109 class TF { bits<5> Prefix = 17; }
108110 class VEX { bit hasVEXPrefix = 1; }
109111 class VEX_W { bit hasVEX_WPrefix = 1; }
110112 class VEX_4V : VEX { bit hasVEX_4VPrefix = 1; }
367367 // floating point operations performed in the SSE registers.
368368 XD = 11 << Op0Shift, XS = 12 << Op0Shift,
369369
370 // T8, TA - Prefix after the 0x0F prefix.
370 // T8, TA, A6, A7 - Prefix after the 0x0F prefix.
371371 T8 = 13 << Op0Shift, TA = 14 << Op0Shift,
372 A6 = 15 << Op0Shift, A7 = 16 << Op0Shift,
372373
373374 // TF - Prefix before and after 0x0F
374 TF = 15 << Op0Shift,
375 TF = 17 << Op0Shift,
375376
376377 //===------------------------------------------------------------------===//
377378 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode.
397397
398398 let Uses = [RDX, RAX, RCX] in
399399 def XSETBV : I<0x01, MRM_D1, (outs), (ins), "xsetbv", []>, TB;
400
401 //===----------------------------------------------------------------------===//
402 // VIA PadLock crypto instructions
403 let Defs = [RAX, RDI], Uses = [RDX, RDI] in
404 def XSTORE : I<0xc0, RawFrm, (outs), (ins), "xstore", []>, A7;
405
406 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
407 def XCRYPTECB : I<0xc8, RawFrm, (outs), (ins), "xcryptecb", []>, A7;
408 def XCRYPTCBC : I<0xd0, RawFrm, (outs), (ins), "xcryptcbc", []>, A7;
409 def XCRYPTCTR : I<0xd8, RawFrm, (outs), (ins), "xcryptctr", []>, A7;
410 def XCRYPTCFB : I<0xe0, RawFrm, (outs), (ins), "xcryptcfb", []>, A7;
411 def XCRYPTOFB : I<0xe8, RawFrm, (outs), (ins), "xcryptofb", []>, A7;
412 }
413
414 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
415 def XSHA1 : I<0xc8, RawFrm, (outs), (ins), "xsha1", []>, A6;
416 def XSHA256 : I<0xd0, RawFrm, (outs), (ins), "xsha256", []>, A6;
417 }
418 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
419 def MONTMUL : I<0xc0, RawFrm, (outs), (ins), "montmul", []>, A6;
469469 case X86II::XD: // F2 0F
470470 VEX_PP = 0x3;
471471 break;
472 case X86II::A6: // Bypass: Not used by VEX
473 case X86II::A7: // Bypass: Not used by VEX
472474 case X86II::TB: // Bypass: Not used by VEX
473475 case 0:
474476 break; // No prefix!
741743 case X86II::TB: // Two-byte opcode prefix
742744 case X86II::T8: // 0F 38
743745 case X86II::TA: // 0F 3A
746 case X86II::A6: // 0F A6
747 case X86II::A7: // 0F A7
744748 Need0FPrefix = true;
745749 break;
746750 case X86II::TF: // F2 0F 38
784788 break;
785789 case X86II::TA: // 0F 3A
786790 EmitByte(0x3A, CurByte, OS);
791 break;
792 case X86II::A6: // 0F A6
793 EmitByte(0xA6, CurByte, OS);
794 break;
795 case X86II::A7: // 0F A7
796 EmitByte(0xA7, CurByte, OS);
787797 break;
788798 }
789799 }
0 // RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s
1
2 xstore
3 // CHECK: xstore
4 // CHECK: encoding: [0x0f,0xa7,0xc0]
5
6 rep xcryptecb
7 // CHECK: rep
8 // CHECK: encoding: [0xf3]
9 // CHECK: xcryptecb
10 // CHECK: encoding: [0x0f,0xa7,0xc8]
11
12 rep xcryptcbc
13 // CHECK: rep
14 // CHECK: encoding: [0xf3]
15 // CHECK: xcryptcbc
16 // CHECK: encoding: [0x0f,0xa7,0xd0]
17
18 rep xcryptctr
19 // CHECK: rep
20 // CHECK: encoding: [0xf3]
21 // CHECK: xcryptctr
22 // CHECK: encoding: [0x0f,0xa7,0xd8]
23
24 rep xcryptcfb
25 // CHECK: rep
26 // CHECK: encoding: [0xf3]
27 // CHECK: xcryptcfb
28 // CHECK: encoding: [0x0f,0xa7,0xe0]
29
30 rep xcryptofb
31 // CHECK: rep
32 // CHECK: encoding: [0xf3]
33 // CHECK: xcryptofb
34 // CHECK: encoding: [0x0f,0xa7,0xe8]
35
36 rep xsha1
37 // CHECK: rep
38 // CHECK: encoding: [0xf3]
39 // CHECK: xsha1
40 // CHECK: encoding: [0x0f,0xa6,0xc8]
41
42 rep xsha256
43 // CHECK: rep
44 // CHECK: encoding: [0xf3]
45 // CHECK: xsha256
46 // CHECK: encoding: [0x0f,0xa6,0xd0]
47
48 rep montmul
49 // CHECK: rep
50 // CHECK: encoding: [0xf3]
51 // CHECK: montmul
52 // CHECK: encoding: [0x0f,0xa6,0xc0]
3939 /// all cases as a 64-bit instruction with only OPSIZE set. (The XS prefix
4040 /// may have effects on its execution, but does not change the instruction
4141 /// returned.) This allows considerable space savings in other tables.
42 /// - Four tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and
43 /// THREEBYTE3A_SYM) contain the hierarchy that the decoder traverses while
44 /// decoding an instruction. At the lowest level of this hierarchy are
45 /// instruction UIDs, 16-bit integers that can be used to uniquely identify
46 /// the instruction and correspond exactly to its position in the list of
47 /// CodeGenInstructions for the target.
42 /// - Six tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
43 /// THREEBYTEA6_SYM, and THREEBYTEA7_SYM contain the hierarchy that the
44 /// decoder traverses while decoding an instruction. At the lowest level of
45 /// this hierarchy are instruction UIDs, 16-bit integers that can be used to
46 /// uniquely identify the instruction and correspond exactly to its position
47 /// in the list of CodeGenInstructions for the target.
4848 /// - One table (INSTRUCTIONS_SYM) contains information about the operands of
4949 /// each instruction and how to decode them.
5050 ///
565565 emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
566566 emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
567567 emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
568 emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
569 emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
568570 }
569571
570572 void DisassemblerTables::emit(raw_ostream &o) const {
3838 /// [1] two-byte opcodes of the form 0f __
3939 /// [2] three-byte opcodes of the form 0f 38 __
4040 /// [3] three-byte opcodes of the form 0f 3a __
41 ContextDecision* Tables[4];
41 /// [4] three-byte opcodes of the form 0f a6 __
42 /// [5] three-byte opcodes of the form 0f a7 __
43 ContextDecision* Tables[6];
4244
4345 /// The instruction information table
4446 std::vector InstructionSpecifiers;
140142 /// }
141143 /// }
142144 ///
143 /// NAME is the name of the ContextDecision (typically one of the four names
144 /// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and THREEBYTE3A_SYM from
145 /// NAME is the name of the ContextDecision (typically one of the four names
146 /// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
147 /// THREEBYTEA6_SYM, and THREEBYTEA7_SYM from
145148 /// X86DisassemblerDecoderCommon.h).
146149 /// IC is one of the contexts in InstructionContext. There is an opcode
147150 /// decision for each possible context.
6767 DC = 7, DD = 8, DE = 9, DF = 10,
6868 XD = 11, XS = 12,
6969 T8 = 13, P_TA = 14,
70 P_0F_AE = 16, P_0F_01 = 17
70 A6 = 15, A7 = 16
7171 };
7272 }
7373
789789 break;
790790 case X86Local::P_TA:
791791 opcodeType = THREEBYTE_3A;
792 if (needsModRMForDecode(Form))
793 filter = new ModFilter(isRegFormat(Form));
794 else
795 filter = new DumbFilter();
796 opcodeToSet = Opcode;
797 break;
798 case X86Local::A6:
799 opcodeType = THREEBYTE_A6;
800 if (needsModRMForDecode(Form))
801 filter = new ModFilter(isRegFormat(Form));
802 else
803 filter = new DumbFilter();
804 opcodeToSet = Opcode;
805 break;
806 case X86Local::A7:
807 opcodeType = THREEBYTE_A7;
792808 if (needsModRMForDecode(Form))
793809 filter = new ModFilter(isRegFormat(Form));
794810 else