llvm.org GIT mirror llvm / 4980b76
[globalisel][tablegen] Import rules containing intrinsic_wo_chain. Summary: As of this patch, 1018 out of 3938 rules are currently imported. Depends on D32275 Reviewers: qcolombet, kristof.beyls, rovka, t.p.northover, ab, aditya_nandakumar Reviewed By: qcolombet Subscribers: dberris, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D32278 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303259 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 3 years ago
3 changed file(s) with 58 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
6161 def : GINodeEquiv;
6262 def : GINodeEquiv;
6363 def : GINodeEquiv;
64 def : GINodeEquiv;
6465 def : GINodeEquiv;
6566
6667 // Specifies the GlobalISel equivalents for SelectionDAG's ComplexPattern.
55
66 def MyTargetISA : InstrInfo;
77 def MyTarget : Target { let InstructionSet = MyTargetISA; }
8
9 let TargetPrefix = "mytarget" in {
10 def int_mytarget_nop : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
11 }
812
913 def R0 : Register<"r0"> { let Namespace = "MyTarget"; }
1014 def GPR32 : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
125129
126130 def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),
127131 [(set GPR32:$dst, (add GPR32:$src1, GPR32:$src2))]>;
132
133 //===- Test a simple pattern with an intrinsic. ---------------------------===//
134 //
135
136 // CHECK-LABEL: if ([&]() {
137 // CHECK-NEXT: MachineInstr &MI0 = I;
138 // CHECK-NEXT: if (MI0.getNumOperands() < 3)
139 // CHECK-NEXT: return false;
140 // CHECK-NEXT: if ((MI0.getOpcode() == TargetOpcode::G_INTRINSIC) &&
141 // CHECK-NEXT: ((/* dst */ (MRI.getType(MI0.getOperand(0).getReg()) == (LLT::scalar(32))) &&
142 // CHECK-NEXT: ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(MI0.getOperand(0).getReg(), MRI, TRI))))) &&
143 // CHECK-NEXT: ((/* Operand 1 */ (isOperandImmEqual(MI0.getOperand(1), [[ID:[0-9]+]], MRI)))) &&
144 // CHECK-NEXT: ((/* src1 */ (MRI.getType(MI0.getOperand(2).getReg()) == (LLT::scalar(32))) &&
145 // CHECK-NEXT: ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(MI0.getOperand(2).getReg(), MRI, TRI)))))) {
146 // CHECK-NEXT: // (intrinsic_wo_chain:i32 [[ID]]:iPTR, GPR32:i32:$src1) => (MOV:i32 GPR32:i32:$src1)
147 // CHECK-NEXT: MachineInstrBuilder MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(MyTarget::MOV));
148 // CHECK-NEXT: MIB.add(MI0.getOperand(0)/*dst*/);
149 // CHECK-NEXT: MIB.add(MI0.getOperand(2)/*src1*/);
150 // CHECK-NEXT: for (const auto *FromMI : {&MI0, })
151 // CHECK-NEXT: for (const auto &MMO : FromMI->memoperands())
152 // CHECK-NEXT: MIB.addMemOperand(MMO);
153 // CHECK-NEXT: I.eraseFromParent();
154 // CHECK-NEXT: MachineInstr &NewI = *MIB;
155 // CHECK-NEXT: constrainSelectedInstRegOperands(NewI, TII, TRI, RBI);
156 // CHECK-NEXT: return true;
157 // CHECK-NEXT: }
158 // CHECK-NEXT: return false;
159 // CHECK-NEXT: }()) { return true; }
160
161 def MOV : I<(outs GPR32:$dst), (ins GPR32:$src1),
162 [(set GPR32:$dst, (int_mytarget_nop GPR32:$src1))]>;
128163
129164 //===- Test a nested instruction match. -----------------------------------===//
130165
13241324
13251325 // Match the used operands (i.e. the children of the operator).
13261326 for (unsigned i = 0, e = Src->getNumChildren(); i != e; ++i) {
1327 if (auto Error = importChildMatcher(InsnMatcher, Src->getChild(i), OpIdx++,
1328 TempOpIdx))
1327 TreePatternNode *SrcChild = Src->getChild(i);
1328
1329 // For G_INTRINSIC, the operand immediately following the defs is an
1330 // intrinsic ID.
1331 if (SrcGI.TheDef->getName() == "G_INTRINSIC" && i == 0) {
1332 if (!SrcChild->isLeaf())
1333 return failedImport("Expected IntInit containing intrinsic ID");
1334
1335 if (IntInit *SrcChildIntInit =
1336 dyn_cast(SrcChild->getLeafValue())) {
1337 OperandMatcher &OM =
1338 InsnMatcher.addOperand(OpIdx++, SrcChild->getName(), TempOpIdx);
1339 OM.addPredicate(SrcChildIntInit->getValue());
1340 continue;
1341 }
1342
1343 return failedImport("Expected IntInit containing instrinsic ID)");
1344 }
1345
1346 if (auto Error =
1347 importChildMatcher(InsnMatcher, SrcChild, OpIdx++, TempOpIdx))
13291348 return std::move(Error);
13301349 }
13311350
13601379
13611380 auto OpTyOrNone = MVTToLLT(ChildTypes.front().getConcrete());
13621381 if (!OpTyOrNone)
1363 return failedImport("Src operand has an unsupported type");
1382 return failedImport("Src operand has an unsupported type (" + to_string(*SrcChild) + ")");
13641383 OM.addPredicate(*OpTyOrNone);
13651384
13661385 // Check for nested instructions.