llvm.org GIT mirror llvm / 49123fd
Finish up the first draft of the release notes. improvements are welcome, please commit any changes directly to SVN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128992 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 9 years ago
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x86 has an experimental feature which provides

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x86 has an feature which provides

25352535 the ability to perform loads and stores to different address spaces
25362536 via the x86 segment registers. A segment override prefix byte on an
25372537 instruction causes the instruction's memory access to go to the specified
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Written by the LLVM Team

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578580 it run faster:

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  • The pre-register-allocation (preRA) instruction scheduler models register
  • 584584 pressure much more accurately in some cases. This allows the adoption of more
    585 aggressive scheduling heuristics.
    585 aggressive scheduling heuristics without causing spills to be generated.
    586586
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    588 LiveDebugVariables is a new pass that keeps track of debugging information for
    589 user variables that are kept in registers in optimized builds.
    590
    591
    592 Scheduler now models operand latency and pipeline forwarding.
    593
    594 Major regalloc rewrite, not on by default for 2.9 and not advised to use it.
    595 * New basic register allocator that can be used as a safe fallback when
    596 debugging. Enable with -regalloc=basic.
    597 * New infrastructure for live range splitting. SplitKit can break a live
    598 interval into smaller pieces while preserving SSA form, and SpillPlacement
    599 can help find the best split points. This is a work in progress so the API
    600 is changing quickly.
    601 * The inline spiller has learned to clean up after live range splitting. It
    602 can hoist spills out of loops, and it can eliminate redundant spills.
    603 Rematerialization works with live range splitting.
    604 * New greedy register allocator using live range splitting. This will be the
    605 default register allocator in the next LLVM release, but it is not turned on
    606 by default in 2.9.
    607
    608
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    588
  • LiveDebugVariables is a new pass that keeps track of debugging information
  • 589 for user variables that are promoted to registers in optimized builds.
    590
    591
  • The scheduler now models operand latency and pipeline forwarding.
  • 592
    593
  • A major register allocator infrastructure rewrite is underway. It is not on
  • 594 by default for 2.9 and you are not advised to use it, but it has made
    595 substantial progress in the 2.9 timeframe:
    596
    597
  • A new -regalloc=basic "basic" register allocator can be used as a simple
  • 598 fallback when debugging. It uses the new infrastructure.
    599
  • New infrastructure is in place for live range splitting. "SplitKit" can
  • 600 break a live interval into smaller pieces while preserving SSA form, and
    601 SpillPlacement can help find the best split points. This is a work in
    602 progress so the API is changing quickly.
    603
  • The inline spiller has learned to clean up after live range splitting. It
  • 604 can hoist spills out of loops, and it can eliminate redundant spills.
    605
  • Rematerialization works with live range splitting.
  • 606
  • The new "greedy" register allocator using live range splitting. This will
  • 607 be the default register allocator in the next LLVM release, but it is not
    608 turned on by default in 2.9.
    609
    610
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  • 624 X86: Reimplemented all of MMX to introduce a new LLVM IR x86_mmx type. Now
    625 random types like <2 x i32> are not iseld to mmx without emms. The
    626 -disable-mmx flag is gone now.
    624
  • LLVM 2.9 includes a complete reimplementation of the MMX instruction set.
  • 625 The reimplementation uses a new LLVM IR
    626 href="LangRef.html#t_x86mmx">x86_mmx type to ensure that MMX operations
    627 are only generated from source that uses MMX builtin operations. With
    628 this, random types like <2 x i32> are not turned into to MMX operations
    629 (which can be catastrophic without proper "emms" insertion). Because the X86
    630 code generator always generates reliable code, the -disable-mmx flag is now
    631 removed.
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  • 630 X86 support for FS/GS relative loads and stores using address space 256/257 are
    631 reliable now.
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  • 635 X86: Much better codegen for several cases using adc/sbb instead of cmovs for
    636 conditional increment and other idioms.
    637
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  • 640 The X86 backend has adopted a new preRA scheduling
    641 mode, "list-ilp", to shorten the height of instruction schedules
    642 without inducing register spills.
    643
    644
    645 MC assembler support for 3dNow! and 3DNowA instructions.
    646
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  • Several bugs have been fixed for Windows x64 code generator.
  • 634
  • X86 support for FS/GS relative loads and stores using
  • 635 href="CodeGenerator.html#x86_memory">address space 256/257 work reliably
    636 now.
    637
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  • LLVM 2.9 generates much better code in several cases by using adc/sbb to
  • 639 avoid generation of conditional move instructions for conditional increment
    640 and other idioms.
    641
    642
  • The X86 backend has adopted a new preRA scheduling mode, "list-ilp", to
  • 643 shorten the height of instruction schedules without inducing register spills.
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    646
  • The MC assembler support for 3dNow! and 3DNowA instructions.
  • 647
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  • Several bugs have been fixed for Windows x64 code generator.
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  • ARM Fast ISel
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  • ARM: New code placement pass.
  • 664
  • ARM: Improved code generation for Cortex-A8 and Cortex-A9 CPUs.
  • 665
  • ARM: __builtin_prefetch turns into prefetch instructions.
  • 666
  • Countless ARM microoptimizations.
  • 663
  • The ARM backend now has a fast instruction selector, which dramatically
  • 664 improves -O0 compile times.
    665
  • The ARM backend has new tuning for Cortex-A8 and Cortex-A9 CPUs.
  • 666
  • The __builtin_prefetch builtin (and llvm.prefetch intrinsic) is compiled
  • 667 into prefetch instructions instead of being discarded.
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  • The ARM backend preRA scheduler now models machine resources at cycle
  • 669670 granularity. This allows the scheduler to both accurately model
    670671 instruction latency and avoid overcommitting functional units.
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  • Countless ARM microoptimizations have landed in LLVM 2.9.
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    683 PPC: Switched to MCInstPrinter, and MCCodeEmitter. Ready to implement support
    684 for directly writing out mach-o object files, but noone seems interested.
    685
    686 MicroBlaze: major updates for aggressive delay slot filler, MC-based assembly
    687 printing, assembly instruction parsing, ELF .o file emission, and MC
    688 instruction disassembler.
    689
    690 SPARC: Many improvements, including using the Y registers for multiplications
    691 and addition of a simple delay slot filler.
    684
  • MicroBlaze: major updates for aggressive delay slot filler, MC-based
  • 685 assembly printing, assembly instruction parsing, ELF .o file emission, and MC
    686 instruction disassembler have landed.
    687
    688
  • SPARC: Many improvements, including using the Y registers for
  • 689 multiplications and addition of a simple delay slot filler.
    690
    691
  • PowerPC: The backend has been largely MC'ized and is ready to support
  • 692 directly writing out mach-o object files. Noone seems interested in finishing
    693 this final step though.
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    705707 from the previous release.

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    708 last release for llvm-gcc
    709
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  • 711 New naming rules in coding standards: CodingStandards.html#ll_naming
    712
    713
    714
    715
    716 - DIBuilder provides simpler interface for front ends like Clang to encode debug info in LLVM IR.
    717 - This interface hides implementation details (e.g. DIDerivedType, existence of compile unit etc..) that any front end should not know about.
    718 For example, DIFactory DebugFactory;
    719 Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type,
    720 findRegion(TYPE_CONTEXT(type)),
    721 StringRef(),
    722 getOrCreateFile(main_input_filename),
    723 0 /*line no*/,
    724 NodeSizeInBits(type),
    725 NodeAlignInBits(type),
    726 0 /*offset */,
    727 0 /* flags */,
    728 MainTy);
    729 can be replaced by
    730 DbgTy = DBuilder.createQualifiedType(DW_TAG_volatile_type, MainTy);
    731 DIFactory is gone now.
    732
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  • This is the last release to support the llvm-gcc frontend.
  • 711
    712
  • LLVM has a new naming
  • 713 convention standard, though the codebase hasn't fully adopted it yet.
    714
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  • The new DIBuilder class provides a simpler interface for front ends to
  • 716 encode debug info in LLVM IR, and has replaced DIFactory.
    717
    718
  • LLVM IR and other tools always work on normalized target triples (which have
  • 719 been run through Triple::normalize).
    720
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  • The target triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32
  • 722 instead.
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  • The PointerTracking pass has been removed from mainline, and moved to The
  • 725 ClamAV project (its only client).
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    738 LoopIndexSplit pass was removed, unmaintained.
    739 LiveValues, SimplifyHalfPowrLibCalls, and GEPSplitter were removed.
    740 Removed the PartialSpecialization pass, it was unmaintained and buggy.
    741
    742 DIFactory removed, use DIBuilder instead.
    743
    744 Triple::normalize is new, llvm triples are always stored in normalized form internally.
    745
    746 Triple x86_64--mingw64 is obsoleted. Use x86_64--mingw32 instead.
    747
    748 PointerTracking has been removed from mainline, moved to ClamAV.
    749
    727
  • The LoopIndexSplit, LiveValues, SimplifyHalfPowrLibCalls, GEPSplitter, and
  • 728 PartialSpecialization passes were removed. They were unmaintained,
    729 buggy, or decided to be a bad idea.
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    762742 LLVM API changes are:

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    766 include/llvm/System merged into include/llvm/Support.
    767
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    769 APInt API changes, see PR5207.
    770
    771 MVT::Flag renamed to MVT::Glue
    772
    773
    774 error_code + libsystem + PathV2 changes
    775 The system_error header from C++0x was added.
    776 * Use if (error_code ec = function()) to check for error conditions
    777 from functions which return it.
    778 * error_code::message returns a human readable description of the error.
    779
    780 PathV1 has been deprecated in favor of PathV2 (sorry I didn't finish
    781 this before the release).
    782 * No Path class, use a r-value convertible to a twine instead.
    783 * Assumes all paths are UTF-8.
    784
    785
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  • include/llvm/System merged into include/llvm/Support.
  • 746
  • The llvm::APInt API was significantly
  • 747 cleaned up.
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    749
  • In the code generator, MVT::Flag was renamed to MVT::Glue to more accurately
  • 750 describe its behavior.
    751
    752
  • The system_error header from C++0x was added, and is now pervasively used to
  • 753 capture and handle i/o and other errors in LLVM.
    754
    755
  • The old sys::Path API has been deprecated in favor of the new PathV2 API,
  • 756 which is more efficient and flexible.
    786757
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  • The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, PTX, SystemZ
  • 820791 and XCore backends are experimental.
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  • llc "-filetype=obj" is experimental on all targets
  • 822 other than darwin-i386 and darwin-x86_64. FIXME: Not true on ELF anymore?
    793 other than darwin and ELF X86 systems.
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    LLVM 2.9 will be the last release of llvm-gcc.

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    llvm-gcc is generally very stable for the C family of languages. The only

    965938 major language feature of GCC not supported by llvm-gcc is the
    966939 __builtin_apply family of builtins. However, some extensions