llvm.org GIT mirror llvm / 48ed4ab
Rename AnalyzeBranch* to analyzeBranch*. Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect. Reviewers: tstellarAMD, mcrosier Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai Differential Revision: https://reviews.llvm.org/D22409 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275564 91177308-0d34-0410-b5e6-96231b3b80d8 Jacques Pienaar 4 years ago
54 changed file(s) with 134 addition(s) and 133 deletion(s). Raw diff Collapse all Expand all
465465 ///
466466 /// The CFG information in MBB.Predecessors and MBB.Successors must be valid
467467 /// before calling this function.
468 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
468 virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
469469 MachineBasicBlock *&FBB,
470470 SmallVectorImpl &Cond,
471471 bool AllowModify = false) const {
511511 /// If AllowModify is true, then this routine is allowed to modify the basic
512512 /// block (e.g. delete instructions after the unconditional branch).
513513 ///
514 virtual bool AnalyzeBranchPredicate(MachineBasicBlock &MBB,
514 virtual bool analyzeBranchPredicate(MachineBasicBlock &MBB,
515515 MachineBranchPredicate &MBP,
516516 bool AllowModify = false) const {
517517 return true;
221221 for (MachineBasicBlock &MBB : MF) {
222222 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
223223 SmallVector Cond;
224 if (!TII->AnalyzeBranch(MBB, TBB, FBB, Cond, true))
224 if (!TII->analyzeBranch(MBB, TBB, FBB, Cond, true))
225225 MadeChange |= MBB.CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
226226 MadeChange |= OptimizeImpDefsBlock(&MBB);
227227 }
507507 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
508508 SmallVector Cond;
509509 DebugLoc dl; // FIXME: this is nowhere
510 if (I != MF->end() &&
511 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
510 if (I != MF->end() && !TII->analyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
512511 MachineBasicBlock *NextBB = &*I;
513512 if (TBB == NextBB && !Cond.empty() && !FBB) {
514513 if (!TII->ReverseBranchCondition(Cond)) {
10281027
10291028 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
10301029 SmallVector Cond;
1031 if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {
1030 if (!TII->analyzeBranch(*PBB, TBB, FBB, Cond, true)) {
10321031 // Failing case: IBB is the target of a cbr, and we cannot reverse the
10331032 // branch.
10341033 SmallVector NewCond(Cond);
12771276 MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;
12781277 SmallVector PriorCond;
12791278 bool PriorUnAnalyzable =
1280 TII->AnalyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1279 TII->analyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
12811280 if (!PriorUnAnalyzable) {
12821281 // If the CFG for the prior block has extra edges, remove them.
12831282 MadeChange |= PrevBB.CorrectExtraCFGEdges(PriorTBB, PriorFBB,
14141413 // Analyze the branch in the current block.
14151414 MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr;
14161415 SmallVector CurCond;
1417 bool CurUnAnalyzable= TII->AnalyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1416 bool CurUnAnalyzable =
1417 TII->analyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
14181418 if (!CurUnAnalyzable) {
14191419 // If the CFG for the prior block has extra edges, remove them.
14201420 MadeChange |= MBB->CorrectExtraCFGEdges(CurTBB, CurFBB, !CurCond.empty());
14981498 // change this to an unconditional branch (and fix the CFG).
14991499 MachineBasicBlock *NewCurTBB = nullptr, *NewCurFBB = nullptr;
15001500 SmallVector NewCurCond;
1501 bool NewCurUnAnalyzable = TII->AnalyzeBranch(*PMBB, NewCurTBB,
1502 NewCurFBB, NewCurCond, true);
1501 bool NewCurUnAnalyzable = TII->analyzeBranch(
1502 *PMBB, NewCurTBB, NewCurFBB, NewCurCond, true);
15031503 if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
15041504 DebugLoc pdl = getBranchDebugLoc(*PMBB);
15051505 TII->RemoveBranch(*PMBB);
15451545 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
15461546 SmallVector PredCond;
15471547 if (PredBB != MBB && !PredBB->canFallThrough() &&
1548 !TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true)
1549 && (!CurFallsThru || !CurTBB || !CurFBB)
1550 && (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
1548 !TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true) &&
1549 (!CurFallsThru || !CurTBB || !CurFBB) &&
1550 (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
15511551 // If the current block doesn't fall through, just move it.
15521552 // If the current block can fall through and does not end with a
15531553 // conditional branch, we need to append an unconditional jump to
16031603 // Now check to see if the current block is sitting between PrevBB and
16041604 // a block to which it could fall through.
16051605 if (FallThrough != MF.end() &&
1606 !TII->AnalyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1606 !TII->analyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
16071607 PrevBB.isSuccessor(&*FallThrough)) {
16081608 MBB->moveAfter(&MF.back());
16091609 MadeChange = true;
17621762 bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
17631763 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
17641764 SmallVector Cond;
1765 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1765 if (TII->analyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
17661766 return false;
17671767
17681768 if (!FBB) FBB = findFalseBlock(MBB, TBB);
385385
386386 // The branch we're looking to eliminate must be analyzable.
387387 Cond.clear();
388 if (TII->AnalyzeBranch(*Head, TBB, FBB, Cond)) {
388 if (TII->analyzeBranch(*Head, TBB, FBB, Cond)) {
389389 DEBUG(dbgs() << "Branch not analyzable.\n");
390390 return false;
391391 }
8686
8787 /// BBInfo - One per MachineBasicBlock, this is used to cache the result
8888 /// if-conversion feasibility analysis. This includes results from
89 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
89 /// TargetInstrInfo::analyzeBranch() (i.e. TBB, FBB, and Cond), and its
9090 /// classification, and common tail block of its successors (if it's a
9191 /// diamond shape), its size, whether it's predicable, and whether any
9292 /// instruction can clobber the 'would-be' predicate.
9595 /// IsBeingAnalyzed - True if BB is currently being analyzed.
9696 /// IsAnalyzed - True if BB has been analyzed (info is still valid).
9797 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
98 /// IsBrAnalyzable - True if AnalyzeBranch() returns false.
98 /// IsBrAnalyzable - True if analyzeBranch() returns false.
9999 /// HasFallThrough - True if BB may fallthrough to the following BB.
100100 /// IsUnpredicable - True if BB is known to be unpredicable.
101101 /// ClobbersPred - True if BB could modify predicates (e.g. has
104104 /// ExtraCost - Extra cost for multi-cycle instructions.
105105 /// ExtraCost2 - Some instructions are slower when predicated
106106 /// BB - Corresponding MachineBasicBlock.
107 /// TrueBB / FalseBB- See AnalyzeBranch().
107 /// TrueBB / FalseBB- See analyzeBranch().
108108 /// BrCond - Conditions for end of block conditional branches.
109109 /// Predicate - Predicate used in the BB.
110110 struct BBInfo {
654654 BBI.TrueBB = BBI.FalseBB = nullptr;
655655 BBI.BrCond.clear();
656656 BBI.IsBrAnalyzable =
657 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
657 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
658658 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr;
659659
660660 if (BBI.BrCond.size()) {
10401040 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
10411041 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
10421042 SmallVector Cond;
1043 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
1043 if (!TII->analyzeBranch(*BBI.BB, TBB, FBB, Cond))
10441044 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
10451045 }
10461046
331331
332332 MachineBranchPredicate MBP;
333333
334 if (TII->AnalyzeBranchPredicate(MBB, MBP, true))
334 if (TII->analyzeBranchPredicate(MBB, MBP, true))
335335 return false;
336336
337337 // Is the predicate comparing an integer to zero?
409409 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
410410 SmallVector Cond;
411411 DebugLoc DL; // FIXME: this is nowhere
412 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
412 bool B = TII->analyzeBranch(*this, TBB, FBB, Cond);
413413 (void) B;
414414 assert(!B && "UpdateTerminators requires analyzable predecessors!");
415415 if (Cond.empty()) {
687687 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
688688 SmallVector Cond;
689689 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
690 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
690 if (TII->analyzeBranch(*this, TBB, FBB, Cond)) {
691691 // If we couldn't analyze the branch, examine the last instruction.
692692 // If the block doesn't end in a known control barrier, assume fallthrough
693693 // is possible. The isPredicated check is needed because this code can be
972972 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
973973 SmallVector Cond;
974974 // AnalyzeBanch should modify this, since we did not allow modification.
975 if (TII->AnalyzeBranch(*const_cast(this), TBB, FBB, Cond,
975 if (TII->analyzeBranch(*const_cast(this), TBB, FBB, Cond,
976976 /*AllowModify*/ false))
977977 return false;
978978
14171417 for (;;) {
14181418 Cond.clear();
14191419 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; // For AnalyzeBranch.
1420 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond) || !FI->canFallThrough())
1420 if (!TII->analyzeBranch(*BB, TBB, FBB, Cond) || !FI->canFallThrough())
14211421 break;
14221422
14231423 MachineFunction::iterator NextFI = std::next(FI);
15051505 // before layout, and no longer fall-through it after layout; or
15061506 // o. just opposite.
15071507 //
1508 // AnalyzeBranch() may return erroneous value for FBB when these two
1508 // analyzeBranch() may return erroneous value for FBB when these two
15091509 // situations take place. For the first scenario FBB is mistakenly set NULL;
15101510 // for the 2nd scenario, the FBB, which is expected to be NULL, is
15111511 // mistakenly pointing to "*BI".
15161516 // PrevBB->updateTerminator();
15171517 // Cond.clear();
15181518 // TBB = FBB = nullptr;
1519 // if (TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond)) {
1519 // if (TII->analyzeBranch(*PrevBB, TBB, FBB, Cond)) {
15201520 // // FIXME: This should never take place.
15211521 // TBB = FBB = nullptr;
15221522 // }
15231523 // }
1524 if (!TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond))
1524 if (!TII->analyzeBranch(*PrevBB, TBB, FBB, Cond))
15251525 PrevBB->updateTerminator();
15261526 }
15271527
15281528 // Fixup the last block.
15291529 Cond.clear();
15301530 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; // For AnalyzeBranch.
1531 if (!TII->AnalyzeBranch(F->back(), TBB, FBB, Cond))
1531 if (!TII->analyzeBranch(F->back(), TBB, FBB, Cond))
15321532 F->back().updateTerminator();
15331533
15341534 BlockWorkList.clear();
15481548 for (MachineBasicBlock *ChainBB : FunctionChain) {
15491549 Cond.clear();
15501550 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; // For AnalyzeBranch.
1551 if (!TII->AnalyzeBranch(*ChainBB, TBB, FBB, Cond, /*AllowModify*/ true)) {
1551 if (!TII->analyzeBranch(*ChainBB, TBB, FBB, Cond, /*AllowModify*/ true)) {
15521552 // If PrevBB has a two-way branch, try to re-order the branches
15531553 // such that we branch to the successor with higher probability first.
15541554 if (TBB && !Cond.empty() && FBB &&
763763 if (BB->pred_size() == 1) {
764764 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
765765 SmallVector Cond;
766 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
766 if (!TII->analyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
767767 InitRegPressure(*BB->pred_begin());
768768 }
769769
703703 return false;
704704
705705 MachineBranchPredicate MBP;
706 if (TII->AnalyzeBranchPredicate(*PredMBB, MBP, false))
706 if (TII->analyzeBranchPredicate(*PredMBB, MBP, false))
707707 return false;
708708
709709 return MBP.LHS.isReg() && MBP.RHS.isImm() && MBP.RHS.getImm() == 0 &&
621621 // Call AnalyzeBranch. If it succeeds, there several more conditions to check.
622622 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
623623 SmallVector Cond;
624 if (!TII->AnalyzeBranch(*const_cast(MBB),
625 TBB, FBB, Cond)) {
624 if (!TII->analyzeBranch(*const_cast(MBB), TBB, FBB,
625 Cond)) {
626626 // Ok, AnalyzeBranch thinks it knows what's going on with this block. Let's
627627 // check whether its answers match up with reality.
628628 if (!TBB && !FBB) {
630630
631631 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
632632 SmallVector PredCond;
633 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
633 if (TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
634634 return false;
635635
636636 if (!PredCond.empty())
661661
662662 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
663663 SmallVector PredCond;
664 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
664 if (TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
665665 continue;
666666
667667 Changed = true;
749749
750750 MachineBasicBlock *PredTBB, *PredFBB;
751751 SmallVector PredCond;
752 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
752 if (TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
753753 continue;
754754 if (!PredCond.empty())
755755 continue;
787787 appendCopies(PredBB, CopyInfos, Copies);
788788
789789 // Simplify
790 TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true);
790 TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true);
791791
792792 NumTailDupAdded += TailBB->size() - 1; // subtract one for removed branch
793793
813813 // This has to check PrevBB->succ_size() because EH edges are ignored by
814814 // AnalyzeBranch.
815815 if (PrevBB->succ_size() == 1 &&
816 !TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true) &&
816 !TII->analyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true) &&
817817 PriorCond.empty() && !PriorTBB && TailBB->pred_size() == 1 &&
818818 !TailBB->hasAddressTaken()) {
819819 DEBUG(dbgs() << "\nMerging into block: " << *PrevBB
136136
137137 MachineBasicBlock *PrevBB = &*std::prev(MBBI);
138138 for (MachineBasicBlock *S : MBB->predecessors())
139 if (S == PrevBB && !TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond) &&
140 !TBB && !FBB)
139 if (S == PrevBB && !TII->analyzeBranch(*PrevBB, TBB, FBB, Cond) && !TBB &&
140 !FBB)
141141 return S;
142142
143143 return nullptr;
414414 // Analyze the branch so we know how to update the successor lists.
415415 MachineBasicBlock *TBB, *FBB;
416416 SmallVector Cond;
417 TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, false);
417 TII->analyzeBranch(*MBB, TBB, FBB, Cond, false);
418418
419419 MachineBasicBlock *NewBB = splitBlockBeforeInstr(MI);
420420 // No need for the branch to the next block. We're adding an unconditional
336336
337337 SmallVector HeadCond;
338338 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
339 if (TII->AnalyzeBranch(*HBB, TBB, FBB, HeadCond)) {
339 if (TII->analyzeBranch(*HBB, TBB, FBB, HeadCond)) {
340340 continue;
341341 }
342342
347347
348348 SmallVector TrueCond;
349349 MachineBasicBlock *TBB_TBB = nullptr, *TBB_FBB = nullptr;
350 if (TII->AnalyzeBranch(*TBB, TBB_TBB, TBB_FBB, TrueCond)) {
350 if (TII->analyzeBranch(*TBB, TBB_TBB, TBB_FBB, TrueCond)) {
351351 continue;
352352 }
353353
492492 // The branch we're looking to eliminate must be analyzable.
493493 HeadCond.clear();
494494 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
495 if (TII->AnalyzeBranch(*Head, TBB, FBB, HeadCond)) {
495 if (TII->analyzeBranch(*Head, TBB, FBB, HeadCond)) {
496496 DEBUG(dbgs() << "Head branch not analyzable.\n");
497497 ++NumHeadBranchRejs;
498498 return false;
520520
521521 CmpBBCond.clear();
522522 TBB = FBB = nullptr;
523 if (TII->AnalyzeBranch(*CmpBB, TBB, FBB, CmpBBCond)) {
523 if (TII->analyzeBranch(*CmpBB, TBB, FBB, CmpBBCond)) {
524524 DEBUG(dbgs() << "CmpBB branch not analyzable.\n");
525525 ++NumCmpBranchRejs;
526526 return false;
9292 }
9393
9494 // Branch analysis.
95 bool AArch64InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
96 MachineBasicBlock *&TBB,
97 MachineBasicBlock *&FBB,
98 SmallVectorImpl &Cond,
99 bool AllowModify) const {
95 bool AArch64InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
96 MachineBasicBlock *&TBB,
97 MachineBasicBlock *&FBB,
98 SmallVectorImpl &Cond,
99 bool AllowModify) const {
100100 // If the block has no terminators, it just falls into the block after it.
101101 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
102102 if (I == MBB.end())
140140 MachineBasicBlock::iterator InsertPt, int FrameIndex,
141141 LiveIntervals *LIS = nullptr) const override;
142142
143 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
143 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
144144 MachineBasicBlock *&FBB,
145145 SmallVectorImpl &Cond,
146146 bool AllowModify = false) const override;
682682 Opcode == AMDGPU::BRANCH_COND_f32;
683683 }
684684
685 bool
686 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
687 MachineBasicBlock *&TBB,
688 MachineBasicBlock *&FBB,
689 SmallVectorImpl &Cond,
690 bool AllowModify) const {
685 bool R600InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
686 MachineBasicBlock *&TBB,
687 MachineBasicBlock *&FBB,
688 SmallVectorImpl &Cond,
689 bool AllowModify) const {
691690 // Most of the following comes from the ARM implementation of AnalyzeBranch
692691
693692 // If the block has no terminators, it just falls into the block after it.
159159 bool ReverseBranchCondition(
160160 SmallVectorImpl &Cond) const override;
161161
162 bool AnalyzeBranch(MachineBasicBlock &MBB,
163 MachineBasicBlock *&TBB,
162 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
164163 MachineBasicBlock *&FBB,
165164 SmallVectorImpl &Cond,
166165 bool AllowModify) const override;
11031103 }
11041104 }
11051105
1106 bool SIInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
1107 MachineBasicBlock *&TBB,
1106 bool SIInstrInfo::analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
11081107 MachineBasicBlock *&FBB,
11091108 SmallVectorImpl &Cond,
11101109 bool AllowModify) const {
148148 bool findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1,
149149 unsigned &SrcOpIdx2) const override;
150150
151 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
151 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
152152 MachineBasicBlock *&FBB,
153153 SmallVectorImpl &Cond,
154154 bool AllowModify) const override;
289289 }
290290
291291 // Branch analysis.
292 bool
293 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
294 MachineBasicBlock *&FBB,
295 SmallVectorImpl &Cond,
296 bool AllowModify) const {
292 bool ARMBaseInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
293 MachineBasicBlock *&TBB,
294 MachineBasicBlock *&FBB,
295 SmallVectorImpl &Cond,
296 bool AllowModify) const {
297297 TBB = nullptr;
298298 FBB = nullptr;
299299
119119 const ScheduleDAG *DAG) const override;
120120
121121 // Branch analysis.
122 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
122 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
123123 MachineBasicBlock *&FBB,
124124 SmallVectorImpl &Cond,
125125 bool AllowModify = false) const override;
674674 // have an unconditional branch for whatever reason.
675675 MachineBasicBlock *TBB, *FBB;
676676 SmallVector Cond;
677 bool TooDifficult = TII->AnalyzeBranch(*MBB, TBB, FBB, Cond);
677 bool TooDifficult = TII->analyzeBranch(*MBB, TBB, FBB, Cond);
678678 return TooDifficult || FBB == nullptr;
679679 }
680680
22712271 MachineFunction::iterator OldPrior = std::prev(BBi);
22722272
22732273 // If the block terminator isn't analyzable, don't try to move the block
2274 bool B = TII->AnalyzeBranch(*BB, TBB, FBB, Cond);
2274 bool B = TII->analyzeBranch(*BB, TBB, FBB, Cond);
22752275
22762276 // If the block ends in an unconditional branch, move it. The prior block
22772277 // has to have an analyzable terminator for us to move this one. Be paranoid
22782278 // and make sure we're not trying to move the entry block of the function.
22792279 if (!B && Cond.empty() && BB != &MF->front() &&
2280 !TII->AnalyzeBranch(*OldPrior, TBB, FBB, CondPrior)) {
2280 !TII->analyzeBranch(*OldPrior, TBB, FBB, CondPrior)) {
22812281 BB->moveAfter(JTBB);
22822282 OldPrior->updateTerminator();
22832283 BB->updateTerminator();
237237 }
238238 }
239239
240 bool AVRInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
240 bool AVRInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
241241 MachineBasicBlock *&TBB,
242242 MachineBasicBlock *&FBB,
243243 SmallVectorImpl &Cond,
8989 int &FrameIndex) const override;
9090
9191 // Branch analysis.
92 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
92 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
9393 MachineBasicBlock *&FBB,
9494 SmallVectorImpl &Cond,
9595 bool AllowModify = false) const override;
7474 llvm_unreachable("Can't load this register from stack slot");
7575 }
7676
77 bool BPFInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
77 bool BPFInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
7878 MachineBasicBlock *&TBB,
7979 MachineBasicBlock *&FBB,
8080 SmallVectorImpl &Cond,
4343 MachineBasicBlock::iterator MBBI, unsigned DestReg,
4444 int FrameIndex, const TargetRegisterClass *RC,
4545 const TargetRegisterInfo *TRI) const override;
46 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
46 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
4747 MachineBasicBlock *&FBB,
4848 SmallVectorImpl &Cond,
4949 bool AllowModify) const override;
147147 SmallVector Cond;
148148
149149 // Try to analyze this branch.
150 if (HII->AnalyzeBranch(B, TBB, FBB, Cond, false)) {
150 if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) {
151151 // Could not analyze it. See if this is something we can recognize.
152152 // If it is a NVJ, it should always have its target in
153153 // a fixed location.
435435
436436 SmallVector Cond;
437437 MachineBasicBlock *TB = nullptr, *FB = nullptr;
438 bool NotAnalyzed = TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false);
438 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false);
439439 if (NotAnalyzed)
440440 return false;
441441
582582
583583 SmallVector Cond;
584584 MachineBasicBlock *TB = nullptr, *FB = nullptr;
585 bool NotAnalyzed = TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false);
585 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false);
586586 if (NotAnalyzed)
587587 return nullptr;
588588
594594 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) {
595595 MachineBasicBlock *LTB = 0, *LFB = 0;
596596 SmallVector LCond;
597 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, LTB, LFB, LCond, false);
597 bool NotAnalyzed = TII->analyzeBranch(*Latch, LTB, LFB, LCond, false);
598598 if (NotAnalyzed)
599599 return nullptr;
600600 if (TB == Latch)
11851185 MachineBasicBlock *TB = 0, *FB = 0;
11861186 SmallVector Cond;
11871187
1188 if (TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false))
1188 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false))
11891189 return false;
11901190
11911191 if (L->contains(TB))
14241424
14251425 MachineBasicBlock *TBB = 0, *FBB = 0;
14261426 SmallVector Cond;
1427 if (TII->AnalyzeBranch(*MI->getParent(), TBB, FBB, Cond, false))
1427 if (TII->analyzeBranch(*MI->getParent(), TBB, FBB, Cond, false))
14281428 continue;
14291429
14301430 Comparison::Kind Cmp = getComparisonKind(MI->getOpcode(), 0, 0, 0);
16201620 MachineBasicBlock *TB = nullptr, *FB = nullptr;
16211621 SmallVector Cond;
16221622 // AnalyzeBranch returns true if it fails to analyze branch.
1623 bool NotAnalyzed = TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false);
1623 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false);
16241624 if (NotAnalyzed || Cond.empty())
16251625 return false;
16261626
16271627 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) {
16281628 MachineBasicBlock *LTB = 0, *LFB = 0;
16291629 SmallVector LCond;
1630 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, LTB, LFB, LCond, false);
1630 bool NotAnalyzed = TII->analyzeBranch(*Latch, LTB, LFB, LCond, false);
16311631 if (NotAnalyzed)
16321632 return false;
16331633
18381838 SmallVector Tmp1;
18391839 MachineBasicBlock *TB = nullptr, *FB = nullptr;
18401840
1841 if (TII->AnalyzeBranch(*ExitingBlock, TB, FB, Tmp1, false))
1841 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false))
18421842 return nullptr;
18431843
18441844 for (MBBVector::iterator I = Preds.begin(), E = Preds.end(); I != E; ++I) {
18451845 MachineBasicBlock *PB = *I;
1846 bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp1, false);
1846 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp1, false);
18471847 if (NotAnalyzed)
18481848 return nullptr;
18491849 }
19291929 MachineBasicBlock *PB = *I;
19301930 if (PB != Latch) {
19311931 Tmp2.clear();
1932 bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp2, false);
1932 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp2, false);
19331933 (void)NotAnalyzed; // suppress compiler warning
19341934 assert (!NotAnalyzed && "Should be analyzable!");
19351935 if (TB != Header && (Tmp2.empty() || FB != Header))
19411941 // It can happen that the latch block will fall through into the header.
19421942 // Insert an unconditional branch to the header.
19431943 TB = FB = nullptr;
1944 bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false);
1944 bool LatchNotAnalyzed = TII->analyzeBranch(*Latch, TB, FB, Tmp2, false);
19451945 (void)LatchNotAnalyzed; // suppress compiler warning
19461946 assert (!LatchNotAnalyzed && "Should be analyzable!");
19471947 if (!TB && !FB)
369369 /// Cond[1] = R
370370 /// Cond[2] = Imm
371371 ///
372 bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
372 bool HexagonInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
373373 MachineBasicBlock *&TBB,
374374 MachineBasicBlock *&FBB,
375375 SmallVectorImpl &Cond,
586586 SmallVector Cond;
587587 auto Term = MBB.getFirstTerminator();
588588 if (Term != MBB.end() && isPredicated(*Term) &&
589 !AnalyzeBranch(MBB, NewTBB, NewFBB, Cond, false)) {
589 !analyzeBranch(MBB, NewTBB, NewFBB, Cond, false)) {
590590 MachineBasicBlock *NextBB = &*++MBB.getIterator();
591591 if (NewTBB == NextBB) {
592592 ReverseBranchCondition(Cond);
7878 /// If AllowModify is true, then this routine is allowed to modify the basic
7979 /// block (e.g. delete instructions after the unconditional branch).
8080 ///
81 bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
82 MachineBasicBlock *&FBB,
83 SmallVectorImpl &Cond,
84 bool AllowModify) const override;
81 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
82 MachineBasicBlock *&FBB,
83 SmallVectorImpl &Cond,
84 bool AllowModify) const override;
8585
8686 /// Remove the branching code at the end of the specific MBB.
8787 /// This is only invoked in cases where AnalyzeBranch returns success. It
438438 MachineBasicBlock *TB = 0, *FB = 0;
439439 MachineBasicBlock *TmpLB = const_cast(LB);
440440 SmallVector Cond;
441 bool BadLB = TII->AnalyzeBranch(*TmpLB, TB, FB, Cond, false);
441 bool BadLB = TII->analyzeBranch(*TmpLB, TB, FB, Cond, false);
442442 // Only analyzable conditional branches. HII::AnalyzeBranch will put
443443 // the branch opcode as the first element of Cond, and the predicate
444444 // operand as the second.
561561 // - condition is populated with machine operands needed to generate the branch
562562 // to insert in InsertBranch;
563563 // Returns: false if branch could successfully be analyzed.
564 bool LanaiInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
564 bool LanaiInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
565565 MachineBasicBlock *&TrueBlock,
566566 MachineBasicBlock *&FalseBlock,
567567 SmallVectorImpl &Condition,
8080 ArrayRef>
8181 getSerializableDirectMachineOperandTargetFlags() const override;
8282
83 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TrueBlock,
83 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TrueBlock,
8484 MachineBasicBlock *&FalseBlock,
8585 SmallVectorImpl &Condition,
8686 bool AllowModify) const override;
169169 return !isPredicated(MI);
170170 }
171171
172 bool MSP430InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
172 bool MSP430InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
173173 MachineBasicBlock *&TBB,
174174 MachineBasicBlock *&FBB,
175175 SmallVectorImpl &Cond,
7373 bool
7474 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
7575 bool isUnpredicatedTerminator(const MachineInstr &MI) const override;
76 bool AnalyzeBranch(MachineBasicBlock &MBB,
77 MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
76 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
77 MachineBasicBlock *&FBB,
7878 SmallVectorImpl &Cond,
7979 bool AllowModify) const override;
8080
814814 SmallVector Cond;
815815
816816 MipsInstrInfo::BranchType R =
817 TII->AnalyzeBranch(MBB, TrueBB, FalseBB, Cond, false, BranchInstrs);
817 TII->analyzeBranch(MBB, TrueBB, FalseBB, Cond, false, BranchInstrs);
818818
819819 if ((R == MipsInstrInfo::BT_None) || (R == MipsInstrInfo::BT_NoBranch))
820820 return std::make_pair(R, nullptr);
8282 Cond.push_back(Inst->getOperand(i));
8383 }
8484
85 bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
85 bool MipsInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
8686 MachineBasicBlock *&TBB,
8787 MachineBasicBlock *&FBB,
8888 SmallVectorImpl &Cond,
8989 bool AllowModify) const {
9090 SmallVector BranchInstrs;
91 BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
91 BranchType BT = analyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
9292
9393 return (BT == BT_None) || (BT == BT_Indirect);
9494 }
175175 return false;
176176 }
177177
178 MipsInstrInfo::BranchType MipsInstrInfo::AnalyzeBranch(
178 MipsInstrInfo::BranchType MipsInstrInfo::analyzeBranch(
179179 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
180180 SmallVectorImpl &Cond, bool AllowModify,
181181 SmallVectorImpl &BranchInstrs) const {
4949 static const MipsInstrInfo *create(MipsSubtarget &STI);
5050
5151 /// Branch Analysis
52 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
52 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
5353 MachineBasicBlock *&FBB,
5454 SmallVectorImpl &Cond,
5555 bool AllowModify) const override;
6363 bool
6464 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
6565
66 BranchType AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
66 BranchType analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
6767 MachineBasicBlock *&FBB,
6868 SmallVectorImpl &Cond,
6969 bool AllowModify,
70 SmallVectorImpl*> &BranchInstrs) const;
70 SmallVectorImpl *> &BranchInstrs) const;
7171
7272 /// Determine the opcode of a non-delay slot form for a branch if one exists.
7373 unsigned getEquivalentCompactForm(const MachineBasicBlock::iterator I) const;
145145 /// Note that RemoveBranch and InsertBranch must be implemented to support
146146 /// cases where this method returns success.
147147 ///
148 bool NVPTXInstrInfo::AnalyzeBranch(
149 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
150 SmallVectorImpl &Cond, bool AllowModify) const {
148 bool NVPTXInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
149 MachineBasicBlock *&TBB,
150 MachineBasicBlock *&FBB,
151 SmallVectorImpl &Cond,
152 bool AllowModify) const {
151153 // If the block has no terminators, it just falls into the block after it.
152154 MachineBasicBlock::iterator I = MBB.end();
153155 if (I == MBB.begin() || !isUnpredicatedTerminator(*--I))
5858
5959 virtual bool CanTailMerge(const MachineInstr *MI) const;
6060 // Branch analysis.
61 bool AnalyzeBranch(
62 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
63 SmallVectorImpl &Cond, bool AllowModify) const override;
61 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
62 MachineBasicBlock *&FBB,
63 SmallVectorImpl &Cond,
64 bool AllowModify) const override;
6465 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
6566 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
6667 MachineBasicBlock *FBB, ArrayRef Cond,
443443 // Branch analysis.
444444 // Note: If the condition register is set to CTR or CTR8 then this is a
445445 // BDNZ (imm == 1) or BDZ (imm == 0) branch.
446 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
446 bool PPCInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
447 MachineBasicBlock *&TBB,
447448 MachineBasicBlock *&FBB,
448449 SmallVectorImpl &Cond,
449450 bool AllowModify) const {
163163
164164
165165 // Branch analysis.
166 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
166 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
167167 MachineBasicBlock *&FBB,
168168 SmallVectorImpl &Cond,
169169 bool AllowModify) const override;
156156 Target = LastInst->getOperand(0).getMBB();
157157 }
158158
159 bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
159 bool SparcInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
160160 MachineBasicBlock *&TBB,
161161 MachineBasicBlock *&FBB,
162162 SmallVectorImpl &Cond,
6464 unsigned isStoreToStackSlot(const MachineInstr &MI,
6565 int &FrameIndex) const override;
6666
67 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
67 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
6868 MachineBasicBlock *&FBB,
6969 SmallVectorImpl &Cond,
70 bool AllowModify = false) const override ;
70 bool AllowModify = false) const override;
7171
7272 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
7373
270270 return true;
271271 }
272272
273 bool SystemZInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
273 bool SystemZInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
274274 MachineBasicBlock *&TBB,
275275 MachineBasicBlock *&FBB,
276276 SmallVectorImpl &Cond,
159159 int &FrameIndex) const override;
160160 bool isStackSlotCopy(const MachineInstr &MI, int &DestFrameIndex,
161161 int &SrcFrameIndex) const override;
162 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
162 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
163163 MachineBasicBlock *&FBB,
164164 SmallVectorImpl &Cond,
165165 bool AllowModify) const override;
9191 }
9292
9393 // Branch analysis.
94 bool WebAssemblyInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
94 bool WebAssemblyInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
9595 MachineBasicBlock *&TBB,
9696 MachineBasicBlock *&FBB,
9797 SmallVectorImpl &Cond,
4343 unsigned OpIdx1,
4444 unsigned OpIdx2) const override;
4545
46 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
46 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
4747 MachineBasicBlock *&FBB,
4848 SmallVectorImpl &Cond,
4949 bool AllowModify = false) const override;
41164116 return false;
41174117 }
41184118
4119 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
4119 bool X86InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
41204120 MachineBasicBlock *&TBB,
41214121 MachineBasicBlock *&FBB,
41224122 SmallVectorImpl &Cond,
41254125 return AnalyzeBranchImpl(MBB, TBB, FBB, Cond, CondBranches, AllowModify);
41264126 }
41274127
4128 bool X86InstrInfo::AnalyzeBranchPredicate(MachineBasicBlock &MBB,
4128 bool X86InstrInfo::analyzeBranchPredicate(MachineBasicBlock &MBB,
41294129 MachineBranchPredicate &MBP,
41304130 bool AllowModify) const {
41314131 using namespace std::placeholders;
303303
304304 // Branch analysis.
305305 bool isUnpredicatedTerminator(const MachineInstr &MI) const override;
306 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
306 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
307307 MachineBasicBlock *&FBB,
308308 SmallVectorImpl &Cond,
309309 bool AllowModify) const override;
311311 bool getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg,
312312 int64_t &Offset,
313313 const TargetRegisterInfo *TRI) const override;
314 bool AnalyzeBranchPredicate(MachineBasicBlock &MBB,
314 bool analyzeBranchPredicate(MachineBasicBlock &MBB,
315315 TargetInstrInfo::MachineBranchPredicate &MBP,
316316 bool AllowModify = false) const override;
317317
186186 /// Note that RemoveBranch and InsertBranch must be implemented to support
187187 /// cases where this method returns success.
188188 ///
189 bool
190 XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
191 MachineBasicBlock *&FBB,
192 SmallVectorImpl &Cond,
193 bool AllowModify) const {
189 bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
190 MachineBasicBlock *&TBB,
191 MachineBasicBlock *&FBB,
192 SmallVectorImpl &Cond,
193 bool AllowModify) const {
194194 // If the block has no terminators, it just falls into the block after it.
195195 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
196196 if (I == MBB.end())
4949 unsigned isStoreToStackSlot(const MachineInstr &MI,
5050 int &FrameIndex) const override;
5151
52 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
52 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
5353 MachineBasicBlock *&FBB,
5454 SmallVectorImpl &Cond,
5555 bool AllowModify) const override;