llvm.org GIT mirror llvm / 4861fd5
Add a test for Neon VTRN instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78528 91177308-0d34-0410-b5e6-96231b3b80d8 Bob Wilson 10 years ago
1 changed file(s) with 117 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
1
2 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
3 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
4 %struct.__builtin_neon_v2si2 = type { <2 x i32>, <2 x i32> }
5 %struct.__builtin_neon_v2sf2 = type { <2 x float>, <2 x float> }
6
7 %struct.__builtin_neon_v16qi2 = type { <16 x i8>, <16 x i8> }
8 %struct.__builtin_neon_v8hi2 = type { <8 x i16>, <8 x i16> }
9 %struct.__builtin_neon_v4si2 = type { <4 x i32>, <4 x i32> }
10 %struct.__builtin_neon_v4sf2 = type { <4 x float>, <4 x float> }
11
12 define <8 x i8> @vtrni8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
13 ;CHECK: vtrni8:
14 ;CHECK: vtrn.8
15 %tmp1 = load <8 x i8>* %A
16 %tmp2 = load <8 x i8>* %B
17 %tmp3 = call %struct.__builtin_neon_v8qi2 @llvm.arm.neon.vtrni.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
18 %tmp4 = extractvalue %struct.__builtin_neon_v8qi2 %tmp3, 0
19 %tmp5 = extractvalue %struct.__builtin_neon_v8qi2 %tmp3, 1
20 %tmp6 = add <8 x i8> %tmp4, %tmp5
21 ret <8 x i8> %tmp6
22 }
23
24 define <4 x i16> @vtrni16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
25 ;CHECK: vtrni16:
26 ;CHECK: vtrn.16
27 %tmp1 = load <4 x i16>* %A
28 %tmp2 = load <4 x i16>* %B
29 %tmp3 = call %struct.__builtin_neon_v4hi2 @llvm.arm.neon.vtrni.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
30 %tmp4 = extractvalue %struct.__builtin_neon_v4hi2 %tmp3, 0
31 %tmp5 = extractvalue %struct.__builtin_neon_v4hi2 %tmp3, 1
32 %tmp6 = add <4 x i16> %tmp4, %tmp5
33 ret <4 x i16> %tmp6
34 }
35
36 define <2 x i32> @vtrni32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
37 ;CHECK: vtrni32:
38 ;CHECK: vtrn.32
39 %tmp1 = load <2 x i32>* %A
40 %tmp2 = load <2 x i32>* %B
41 %tmp3 = call %struct.__builtin_neon_v2si2 @llvm.arm.neon.vtrni.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
42 %tmp4 = extractvalue %struct.__builtin_neon_v2si2 %tmp3, 0
43 %tmp5 = extractvalue %struct.__builtin_neon_v2si2 %tmp3, 1
44 %tmp6 = add <2 x i32> %tmp4, %tmp5
45 ret <2 x i32> %tmp6
46 }
47
48 define <2 x float> @vtrnf(<2 x float>* %A, <2 x float>* %B) nounwind {
49 ;CHECK: vtrnf:
50 ;CHECK: vtrn.32
51 %tmp1 = load <2 x float>* %A
52 %tmp2 = load <2 x float>* %B
53 %tmp3 = call %struct.__builtin_neon_v2sf2 @llvm.arm.neon.vtrnf.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
54 %tmp4 = extractvalue %struct.__builtin_neon_v2sf2 %tmp3, 0
55 %tmp5 = extractvalue %struct.__builtin_neon_v2sf2 %tmp3, 1
56 %tmp6 = add <2 x float> %tmp4, %tmp5
57 ret <2 x float> %tmp6
58 }
59
60 define <16 x i8> @vtrnQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
61 ;CHECK: vtrnQi8:
62 ;CHECK: vtrn.8
63 %tmp1 = load <16 x i8>* %A
64 %tmp2 = load <16 x i8>* %B
65 %tmp3 = call %struct.__builtin_neon_v16qi2 @llvm.arm.neon.vtrni.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
66 %tmp4 = extractvalue %struct.__builtin_neon_v16qi2 %tmp3, 0
67 %tmp5 = extractvalue %struct.__builtin_neon_v16qi2 %tmp3, 1
68 %tmp6 = add <16 x i8> %tmp4, %tmp5
69 ret <16 x i8> %tmp6
70 }
71
72 define <8 x i16> @vtrnQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
73 ;CHECK: vtrnQi16:
74 ;CHECK: vtrn.16
75 %tmp1 = load <8 x i16>* %A
76 %tmp2 = load <8 x i16>* %B
77 %tmp3 = call %struct.__builtin_neon_v8hi2 @llvm.arm.neon.vtrni.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
78 %tmp4 = extractvalue %struct.__builtin_neon_v8hi2 %tmp3, 0
79 %tmp5 = extractvalue %struct.__builtin_neon_v8hi2 %tmp3, 1
80 %tmp6 = add <8 x i16> %tmp4, %tmp5
81 ret <8 x i16> %tmp6
82 }
83
84 define <4 x i32> @vtrnQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
85 ;CHECK: vtrnQi32:
86 ;CHECK: vtrn.32
87 %tmp1 = load <4 x i32>* %A
88 %tmp2 = load <4 x i32>* %B
89 %tmp3 = call %struct.__builtin_neon_v4si2 @llvm.arm.neon.vtrni.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
90 %tmp4 = extractvalue %struct.__builtin_neon_v4si2 %tmp3, 0
91 %tmp5 = extractvalue %struct.__builtin_neon_v4si2 %tmp3, 1
92 %tmp6 = add <4 x i32> %tmp4, %tmp5
93 ret <4 x i32> %tmp6
94 }
95
96 define <4 x float> @vtrnQf(<4 x float>* %A, <4 x float>* %B) nounwind {
97 ;CHECK: vtrnQf:
98 ;CHECK: vtrn.32
99 %tmp1 = load <4 x float>* %A
100 %tmp2 = load <4 x float>* %B
101 %tmp3 = call %struct.__builtin_neon_v4sf2 @llvm.arm.neon.vtrnf.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
102 %tmp4 = extractvalue %struct.__builtin_neon_v4sf2 %tmp3, 0
103 %tmp5 = extractvalue %struct.__builtin_neon_v4sf2 %tmp3, 1
104 %tmp6 = add <4 x float> %tmp4, %tmp5
105 ret <4 x float> %tmp6
106 }
107
108 declare %struct.__builtin_neon_v8qi2 @llvm.arm.neon.vtrni.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
109 declare %struct.__builtin_neon_v4hi2 @llvm.arm.neon.vtrni.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
110 declare %struct.__builtin_neon_v2si2 @llvm.arm.neon.vtrni.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
111 declare %struct.__builtin_neon_v2sf2 @llvm.arm.neon.vtrnf.v2f32(<2 x float>, <2 x float>) nounwind readnone
112
113 declare %struct.__builtin_neon_v16qi2 @llvm.arm.neon.vtrni.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
114 declare %struct.__builtin_neon_v8hi2 @llvm.arm.neon.vtrni.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
115 declare %struct.__builtin_neon_v4si2 @llvm.arm.neon.vtrni.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
116 declare %struct.__builtin_neon_v4sf2 @llvm.arm.neon.vtrnf.v4f32(<4 x float>, <4 x float>) nounwind readnone