llvm.org GIT mirror llvm / 481eaf3
AMDGPU: Fix parsing of 32-bit literals with sign bit set git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251132 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 4 years ago
4 changed file(s) with 31 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
986986 int64_t IntVal;
987987 if (getParser().parseAbsoluteExpression(IntVal))
988988 return MatchOperand_ParseFail;
989 APInt IntVal32(32, IntVal);
990 if (IntVal32.getSExtValue() != IntVal) {
989 if (!isInt<32>(IntVal) && !isUInt<32>(IntVal)) {
991990 Error(S, "invalid immediate: only 32-bit values are legal");
992991 return MatchOperand_ParseFail;
993992 }
994993
995 IntVal = IntVal32.getSExtValue();
996994 if (Negate)
997995 IntVal *= -1;
998996 Operands.push_back(AMDGPUOperand::CreateImm(IntVal, S));
282282 O << "4.0";
283283 else if (Imm == DoubleToBits(-4.0))
284284 O << "-4.0";
285 else
286 llvm_unreachable("64-bit literal constants not supported");
285 else {
286 assert(isUInt<32>(Imm));
287
288 // In rare situations, we will have a 32-bit literal in a 64-bit
289 // operand. This is technically allowed for the encoding of s_mov_b64.
290 O << formatHex(static_cast(Imm));
291 }
287292 }
288293
289294 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
3232 s_mov_b64 s[0:1], 0xfffffffff
3333 // CHECK: error: invalid immediate: only 32-bit values are legal
3434
35 s_mov_b64 s[0:1], 0xfffffffff
36 // CHECK: error: invalid immediate: only 32-bit values are legal
37
38 s_mov_b64 s[0:1], 0xfffffffff
39 // CHECK: error: invalid immediate: only 32-bit values are legal
40
41 s_mov_b64 s[0:1], 0x0000000200000000
42 // CHECK: error: invalid immediate: only 32-bit values are legal
43
3544 // Out of range register
3645 s_mov_b32 s
99 s_mov_b32 s1, 100
1010 // CHECK: s_mov_b32 s1, 0x64 ; encoding: [0xff,0x03,0x81,0xbe,0x64,0x00,0x00,0x00]
1111
12 // Literal constant sign bit
13 s_mov_b32 s1, 0x80000000
14 // CHECK: s_mov_b32 s1, 0x80000000 ; encoding: [0xff,0x03,0x81,0xbe,0x00,0x00,0x00,0x80]
15
16 // Negative 32-bit constant
17 s_mov_b32 s0, 0xfe5163ab
18 // CHECK: s_mov_b32 s0, 0xfe5163ab ; encoding: [0xff,0x03,0x80,0xbe,0xab,0x63,0x51,0xfe]
19
1220 s_mov_b64 s[2:3], s[4:5]
1321 // CHECK: s_mov_b64 s[2:3], s[4:5] ; encoding: [0x04,0x04,0x82,0xbe]
1422
1523 s_mov_b64 s[2:3], 0xffffffffffffffff
1624 // CHECK: s_mov_b64 s[2:3], -1 ; encoding: [0xc1,0x04,0x82,0xbe]
25
26 s_mov_b64 s[2:3], 0xffffffff
27 // CHECK: s_mov_b64 s[2:3], 0xffffffff ; encoding: [0xff,0x04,0x82,0xbe,0xff,0xff,0xff,0xff]
28
29 s_mov_b64 s[0:1], 0x80000000
30 // CHECK: s_mov_b64 s[0:1], 0x80000000 ; encoding: [0xff,0x04,0x80,0xbe,0x00,0x00,0x00,0x80]
1731
1832 s_cmov_b32 s1, 200
1933 // CHECK: s_cmov_b32 s1, 0xc8 ; encoding: [0xff,0x05,0x81,0xbe,0xc8,0x00,0x00,0x00]