llvm.org GIT mirror llvm / 47f3513
Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier. This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136009 91177308-0d34-0410-b5e6-96231b3b80d8 Eli Friedman 9 years ago
18 changed file(s) with 392 addition(s) and 32 deletion(s). Raw diff Collapse all Expand all
169169
  • 'alloca' Instruction
  • 170170
  • 'load' Instruction
  • 171171
  • 'store' Instruction
  • 172
  • 'fence' Instruction
  • 172173
  • 'getelementptr' Instruction
  • 173174
    174175
    45514552
    45524553
    45534554
    4555
    4556 Instruction
    4557
    4558
    4559
    4560
    Syntax:
    4561
    
                      
                    
    4562 fence [singlethread] <ordering> ; yields {void}
    4563
    4564
    4565
    Overview:
    4566

    The 'fence' instruction is used to introduce happens-before edges

    4567 between operations.

    4568
    4569
    Arguments:

    'fence' instructions take an

    4570 href="#ordering">ordering argument which defines what
    4571 synchronizes-with edges they add. They can only be given
    4572 acquire, release, acq_rel, and
    4573 seq_cst orderings.

    4574
    4575
    Semantics:
    4576

    A fence A which has (at least) release ordering

    4577 semantics synchronizes with a fence B with (at least)
    4578 acquire ordering semantics if and only if there exist atomic
    4579 operations X and Y, both operating on some atomic object
    4580 M, such that A is sequenced before X,
    4581 X modifies M (either directly or through some side effect
    4582 of a sequence headed by X), Y is sequenced before
    4583 B, and Y observes M. This provides a
    4584 happens-before dependency between A and B. Rather
    4585 than an explicit fence, one (but not both) of the atomic operations
    4586 X or Y might provide a release or
    4587 acquire (resp.) ordering constraint and still
    4588 synchronize-with the explicit fence and establish the
    4589 happens-before edge.

    4590
    4591

    A fence which has seq_cst ordering, in addition to

    4592 having both acquire and release semantics specified
    4593 above, participates in the global program order of other seq_cst
    4594 operations and/or fences.

    4595
    4596

    The optional "singlethread" argument

    4597 specifies that the fence only synchronizes with other fences in the same
    4598 thread. (This is useful for interacting with signal handlers.)

    4599
    4600

    FIXME: This instruction is a work in progress; until it is finished, use

    4601 llvm.memory.barrier.
    4602
    4603
    Example:
    4604
    
                      
                    
    4605 fence acquire ; yields {void}
    4606 fence singlethread seq_cst ; yields {void}
    4607
    4608
    4609
    4610
    4611
    45544612

    45554613 'getelementptr' Instruction
    45564614
    217217 PEO_EXACT = 0
    218218 };
    219219
    220 /// Encoded AtomicOrdering values.
    221 enum AtomicOrderingCodes {
    222 ORDERING_NOTATOMIC = 0,
    223 ORDERING_UNORDERED = 1,
    224 ORDERING_MONOTONIC = 2,
    225 ORDERING_ACQUIRE = 3,
    226 ORDERING_RELEASE = 4,
    227 ORDERING_ACQREL = 5,
    228 ORDERING_SEQCST = 6
    229 };
    230
    231 /// Encoded SynchronizationScope values.
    232 enum AtomicSynchScopeCodes {
    233 SYNCHSCOPE_SINGLETHREAD = 0,
    234 SYNCHSCOPE_CROSSTHREAD = 1
    235 };
    236
    220237 // The function body block (FUNCTION_BLOCK_ID) describes function bodies. It
    221238 // can contain a constant block (CONSTANTS_BLOCK_ID).
    222239 enum FunctionCodes {
    265282
    266283 FUNC_CODE_INST_CALL = 34, // CALL: [attr, fnty, fnid, args...]
    267284
    268 FUNC_CODE_DEBUG_LOC = 35 // DEBUG_LOC: [Line,Col,ScopeVal, IAVal]
    285 FUNC_CODE_DEBUG_LOC = 35, // DEBUG_LOC: [Line,Col,ScopeVal, IAVal]
    286 FUNC_CODE_INST_FENCE = 36 // FENCE: [ordering, synchscope]
    269287 };
    270288 } // End bitc namespace
    271289 } // End llvm namespace
    132132 HANDLE_MEMORY_INST(27, Load , LoadInst ) // Memory manipulation instrs
    133133 HANDLE_MEMORY_INST(28, Store , StoreInst )
    134134 HANDLE_MEMORY_INST(29, GetElementPtr, GetElementPtrInst)
    135 LAST_MEMORY_INST(29)
    135 HANDLE_MEMORY_INST(30, Fence , FenceInst )
    136 LAST_MEMORY_INST(32)
    136137
    137138 // Cast operators ...
    138139 // NOTE: The order matters here because CastInst::isEliminableCastPair
    139140 // NOTE: (see Instructions.cpp) encodes a table based on this ordering.
    140 FIRST_CAST_INST(30)
    141 HANDLE_CAST_INST(30, Trunc , TruncInst ) // Truncate integers
    142 HANDLE_CAST_INST(31, ZExt , ZExtInst ) // Zero extend integers
    143 HANDLE_CAST_INST(32, SExt , SExtInst ) // Sign extend integers
    144 HANDLE_CAST_INST(33, FPToUI , FPToUIInst ) // floating point -> UInt
    145 HANDLE_CAST_INST(34, FPToSI , FPToSIInst ) // floating point -> SInt
    146 HANDLE_CAST_INST(35, UIToFP , UIToFPInst ) // UInt -> floating point
    147 HANDLE_CAST_INST(36, SIToFP , SIToFPInst ) // SInt -> floating point
    148 HANDLE_CAST_INST(37, FPTrunc , FPTruncInst ) // Truncate floating point
    149 HANDLE_CAST_INST(38, FPExt , FPExtInst ) // Extend floating point
    150 HANDLE_CAST_INST(39, PtrToInt, PtrToIntInst) // Pointer -> Integer
    151 HANDLE_CAST_INST(40, IntToPtr, IntToPtrInst) // Integer -> Pointer
    152 HANDLE_CAST_INST(41, BitCast , BitCastInst ) // Type cast
    153 LAST_CAST_INST(41)
    141 FIRST_CAST_INST(33)
    142 HANDLE_CAST_INST(33, Trunc , TruncInst ) // Truncate integers
    143 HANDLE_CAST_INST(34, ZExt , ZExtInst ) // Zero extend integers
    144 HANDLE_CAST_INST(35, SExt , SExtInst ) // Sign extend integers
    145 HANDLE_CAST_INST(36, FPToUI , FPToUIInst ) // floating point -> UInt
    146 HANDLE_CAST_INST(37, FPToSI , FPToSIInst ) // floating point -> SInt
    147 HANDLE_CAST_INST(38, UIToFP , UIToFPInst ) // UInt -> floating point
    148 HANDLE_CAST_INST(39, SIToFP , SIToFPInst ) // SInt -> floating point
    149 HANDLE_CAST_INST(40, FPTrunc , FPTruncInst ) // Truncate floating point
    150 HANDLE_CAST_INST(41, FPExt , FPExtInst ) // Extend floating point
    151 HANDLE_CAST_INST(42, PtrToInt, PtrToIntInst) // Pointer -> Integer
    152 HANDLE_CAST_INST(43, IntToPtr, IntToPtrInst) // Integer -> Pointer
    153 HANDLE_CAST_INST(44, BitCast , BitCastInst ) // Type cast
    154 LAST_CAST_INST(44)
    154155
    155156 // Other operators...
    156 FIRST_OTHER_INST(42)
    157 HANDLE_OTHER_INST(42, ICmp , ICmpInst ) // Integer comparison instruction
    158 HANDLE_OTHER_INST(43, FCmp , FCmpInst ) // Floating point comparison instr.
    159 HANDLE_OTHER_INST(44, PHI , PHINode ) // PHI node instruction
    160 HANDLE_OTHER_INST(45, Call , CallInst ) // Call a function
    161 HANDLE_OTHER_INST(46, Select , SelectInst ) // select instruction
    162 HANDLE_OTHER_INST(47, UserOp1, Instruction) // May be used internally in a pass
    163 HANDLE_OTHER_INST(48, UserOp2, Instruction) // Internal to passes only
    164 HANDLE_OTHER_INST(49, VAArg , VAArgInst ) // vaarg instruction
    165 HANDLE_OTHER_INST(50, ExtractElement, ExtractElementInst)// extract from vector
    166 HANDLE_OTHER_INST(51, InsertElement, InsertElementInst) // insert into vector
    167 HANDLE_OTHER_INST(52, ShuffleVector, ShuffleVectorInst) // shuffle two vectors.
    168 HANDLE_OTHER_INST(53, ExtractValue, ExtractValueInst)// extract from aggregate
    169 HANDLE_OTHER_INST(54, InsertValue, InsertValueInst) // insert into aggregate
    157 FIRST_OTHER_INST(45)
    158 HANDLE_OTHER_INST(45, ICmp , ICmpInst ) // Integer comparison instruction
    159 HANDLE_OTHER_INST(46, FCmp , FCmpInst ) // Floating point comparison instr.
    160 HANDLE_OTHER_INST(47, PHI , PHINode ) // PHI node instruction
    161 HANDLE_OTHER_INST(48, Call , CallInst ) // Call a function
    162 HANDLE_OTHER_INST(49, Select , SelectInst ) // select instruction
    163 HANDLE_OTHER_INST(50, UserOp1, Instruction) // May be used internally in a pass
    164 HANDLE_OTHER_INST(51, UserOp2, Instruction) // Internal to passes only
    165 HANDLE_OTHER_INST(52, VAArg , VAArgInst ) // vaarg instruction
    166 HANDLE_OTHER_INST(53, ExtractElement, ExtractElementInst)// extract from vector
    167 HANDLE_OTHER_INST(54, InsertElement, InsertElementInst) // insert into vector
    168 HANDLE_OTHER_INST(55, ShuffleVector, ShuffleVectorInst) // shuffle two vectors.
    169 HANDLE_OTHER_INST(56, ExtractValue, ExtractValueInst)// extract from aggregate
    170 HANDLE_OTHER_INST(57, InsertValue, InsertValueInst) // insert into aggregate
    170171
    171 LAST_OTHER_INST(54)
    172 LAST_OTHER_INST(57)
    172173
    173174 #undef FIRST_TERM_INST
    174175 #undef HANDLE_TERM_INST
    2121 #include "llvm/CallingConv.h"
    2222 #include "llvm/ADT/ArrayRef.h"
    2323 #include "llvm/ADT/SmallVector.h"
    24 #include "llvm/Support/ErrorHandling.h"
    2425 #include
    2526
    2627 namespace llvm {
    2930 class ConstantRange;
    3031 class APInt;
    3132 class LLVMContext;
    33
    34 enum AtomicOrdering {
    35 NotAtomic = 0,
    36 Unordered = 1,
    37 Monotonic = 2,
    38 // Consume = 3, // Not specified yet.
    39 Acquire = 4,
    40 Release = 5,
    41 AcquireRelease = 6,
    42 SequentiallyConsistent = 7
    43 };
    44
    45 enum SynchronizationScope {
    46 SingleThread = 0,
    47 CrossThread = 1
    48 };
    3249
    3350 //===----------------------------------------------------------------------===//
    3451 // AllocaInst Class
    266283 };
    267284
    268285 DEFINE_TRANSPARENT_OPERAND_ACCESSORS(StoreInst, Value)
    286
    287 //===----------------------------------------------------------------------===//
    288 // FenceInst Class
    289 //===----------------------------------------------------------------------===//
    290
    291 /// FenceInst - an instruction for ordering other memory operations
    292 ///
    293 class FenceInst : public Instruction {
    294 void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
    295 void Init(AtomicOrdering Ordering, SynchronizationScope SynchScope);
    296 protected:
    297 virtual FenceInst *clone_impl() const;
    298 public:
    299 // allocate space for exactly zero operands
    300 void *operator new(size_t s) {
    301 return User::operator new(s, 0);
    302 }
    303
    304 // Ordering may only be Acquire, Release, AcquireRelease, or
    305 // SequentiallyConsistent.
    306 FenceInst(LLVMContext &C, AtomicOrdering Ordering,
    307 SynchronizationScope SynchScope = CrossThread,
    308 Instruction *InsertBefore = 0);
    309 FenceInst(LLVMContext &C, AtomicOrdering Ordering,
    310 SynchronizationScope SynchScope,
    311 BasicBlock *InsertAtEnd);
    312
    313 /// Returns the ordering effect of this fence.
    314 AtomicOrdering getOrdering() const {
    315 return AtomicOrdering(getSubclassDataFromInstruction() >> 1);
    316 }
    317
    318 /// Set the ordering constraint on this fence. May only be Acquire, Release,
    319 /// AcquireRelease, or SequentiallyConsistent.
    320 void setOrdering(AtomicOrdering Ordering) {
    321 switch (Ordering) {
    322 case Acquire:
    323 case Release:
    324 case AcquireRelease:
    325 case SequentiallyConsistent:
    326 setInstructionSubclassData((getSubclassDataFromInstruction() & 1) |
    327 (Ordering << 1));
    328 return;
    329 default:
    330 llvm_unreachable("FenceInst ordering must be Acquire, Release,"
    331 " AcquireRelease, or SequentiallyConsistent");
    332 }
    333 }
    334
    335 SynchronizationScope getSynchScope() const {
    336 return SynchronizationScope(getSubclassDataFromInstruction() & 1);
    337 }
    338
    339 /// Specify whether this fence orders other operations with respect to all
    340 /// concurrently executing threads, or only with respect to signal handlers
    341 /// executing in the same thread.
    342 void setSynchScope(SynchronizationScope xthread) {
    343 setInstructionSubclassData((getSubclassDataFromInstruction() & ~1) |
    344 xthread);
    345 }
    346
    347 // Methods for support type inquiry through isa, cast, and dyn_cast:
    348 static inline bool classof(const FenceInst *) { return true; }
    349 static inline bool classof(const Instruction *I) {
    350 return I->getOpcode() == Instruction::Fence;
    351 }
    352 static inline bool classof(const Value *V) {
    353 return isa(V) && classof(cast(V));
    354 }
    355 private:
    356 // Shadow Instruction::setInstructionSubclassData with a private forwarding
    357 // method so that subclasses cannot accidentally use it.
    358 void setInstructionSubclassData(unsigned short D) {
    359 Instruction::setInstructionSubclassData(D);
    360 }
    361 };
    269362
    270363 //===----------------------------------------------------------------------===//
    271364 // GetElementPtrInst Class
    761761 StoreInst *CreateStore(Value *Val, Value *Ptr, bool isVolatile = false) {
    762762 return Insert(new StoreInst(Val, Ptr, isVolatile));
    763763 }
    764 FenceInst *CreateFence(AtomicOrdering Ordering,
    765 SynchronizationScope SynchScope = CrossThread) {
    766 return Insert(new FenceInst(Context, Ordering, SynchScope));
    767 }
    764768 Value *CreateGEP(Value *Ptr, ArrayRef IdxList,
    765769 const Twine &Name = "") {
    766770 if (Constant *PC = dyn_cast(Ptr)) {
    168168 RetTy visitAllocaInst(AllocaInst &I) { DELEGATE(Instruction); }
    169169 RetTy visitLoadInst(LoadInst &I) { DELEGATE(Instruction); }
    170170 RetTy visitStoreInst(StoreInst &I) { DELEGATE(Instruction); }
    171 RetTy visitFenceInst(FenceInst &I) { DELEGATE(Instruction); }
    171172 RetTy visitGetElementPtrInst(GetElementPtrInst &I){ DELEGATE(Instruction); }
    172173 RetTy visitPHINode(PHINode &I) { DELEGATE(Instruction); }
    173174 RetTy visitTruncInst(TruncInst &I) { DELEGATE(CastInst); }
    505505 KEYWORD(deplibs);
    506506 KEYWORD(datalayout);
    507507 KEYWORD(volatile);
    508 KEYWORD(atomic);
    509 KEYWORD(unordered);
    510 KEYWORD(monotonic);
    511 KEYWORD(acquire);
    512 KEYWORD(release);
    513 KEYWORD(acq_rel);
    514 KEYWORD(seq_cst);
    515 KEYWORD(singlethread);
    516
    508517 KEYWORD(nuw);
    509518 KEYWORD(nsw);
    510519 KEYWORD(exact);
    629638 INSTKEYWORD(alloca, Alloca);
    630639 INSTKEYWORD(load, Load);
    631640 INSTKEYWORD(store, Store);
    641 INSTKEYWORD(fence, Fence);
    632642 INSTKEYWORD(getelementptr, GetElementPtr);
    633643
    634644 INSTKEYWORD(extractelement, ExtractElement);
    11411141 if (ParseOptionalAlignment(Alignment)) return true;
    11421142 }
    11431143
    1144 return false;
    1145 }
    1146
    1147 /// ParseScopeAndOrdering
    1148 /// if isAtomic: ::= 'singlethread'? AtomicOrdering
    1149 /// else: ::=
    1150 ///
    1151 /// This sets Scope and Ordering to the parsed values.
    1152 bool LLParser::ParseScopeAndOrdering(bool isAtomic, SynchronizationScope &Scope,
    1153 AtomicOrdering &Ordering) {
    1154 if (!isAtomic)
    1155 return false;
    1156
    1157 Scope = CrossThread;
    1158 if (EatIfPresent(lltok::kw_singlethread))
    1159 Scope = SingleThread;
    1160 switch (Lex.getKind()) {
    1161 default: return TokError("Expected ordering on atomic instruction");
    1162 case lltok::kw_unordered: Ordering = Unordered; break;
    1163 case lltok::kw_monotonic: Ordering = Monotonic; break;
    1164 case lltok::kw_acquire: Ordering = Acquire; break;
    1165 case lltok::kw_release: Ordering = Release; break;
    1166 case lltok::kw_acq_rel: Ordering = AcquireRelease; break;
    1167 case lltok::kw_seq_cst: Ordering = SequentiallyConsistent; break;
    1168 }
    1169 Lex.Lex();
    11441170 return false;
    11451171 }
    11461172
    29232949 case lltok::kw_alloca: return ParseAlloc(Inst, PFS);
    29242950 case lltok::kw_load: return ParseLoad(Inst, PFS, false);
    29252951 case lltok::kw_store: return ParseStore(Inst, PFS, false);
    2952 case lltok::kw_fence: return ParseFence(Inst, PFS);
    29262953 case lltok::kw_volatile:
    29272954 if (EatIfPresent(lltok::kw_load))
    29282955 return ParseLoad(Inst, PFS, true);
    36323659 return AteExtraComma ? InstExtraComma : InstNormal;
    36333660 }
    36343661
    3662 /// ParseFence
    3663 /// ::= 'fence' 'singlethread'? AtomicOrdering
    3664 int LLParser::ParseFence(Instruction *&Inst, PerFunctionState &PFS) {
    3665 AtomicOrdering Ordering = NotAtomic;
    3666 SynchronizationScope Scope = CrossThread;
    3667 if (ParseScopeAndOrdering(true /*Always atomic*/, Scope, Ordering))
    3668 return true;
    3669
    3670 if (Ordering == Unordered)
    3671 return TokError("fence cannot be unordered");
    3672 if (Ordering == Monotonic)
    3673 return TokError("fence cannot be monotonic");
    3674
    3675 Inst = new FenceInst(Context, Ordering, Scope);
    3676 return InstNormal;
    3677 }
    3678
    36353679 /// ParseGetElementPtr
    36363680 /// ::= 'getelementptr' 'inbounds'? TypeAndValue (',' TypeAndValue)*
    36373681 int LLParser::ParseGetElementPtr(Instruction *&Inst, PerFunctionState &PFS) {
    1414 #define LLVM_ASMPARSER_LLPARSER_H
    1515
    1616 #include "LLLexer.h"
    17 #include "llvm/Instructions.h"
    1718 #include "llvm/Module.h"
    1819 #include "llvm/Type.h"
    1920 #include "llvm/ADT/DenseMap.h"
    177178 bool ParseOptionalVisibility(unsigned &Visibility);
    178179 bool ParseOptionalCallingConv(CallingConv::ID &CC);
    179180 bool ParseOptionalAlignment(unsigned &Alignment);
    181 bool ParseScopeAndOrdering(bool isAtomic, SynchronizationScope &Scope,
    182 AtomicOrdering &Ordering);
    180183 bool ParseOptionalStackAlignment(unsigned &Alignment);
    181184 bool ParseOptionalCommaAlign(unsigned &Alignment, bool &AteExtraComma);
    182185 bool ParseIndexList(SmallVectorImpl &Indices,bool &AteExtraComma);
    359362 int ParseAlloc(Instruction *&I, PerFunctionState &PFS);
    360363 int ParseLoad(Instruction *&I, PerFunctionState &PFS, bool isVolatile);
    361364 int ParseStore(Instruction *&I, PerFunctionState &PFS, bool isVolatile);
    365 int ParseFence(Instruction *&I, PerFunctionState &PFS);
    362366 int ParseGetElementPtr(Instruction *&I, PerFunctionState &PFS);
    363367 int ParseExtractValue(Instruction *&I, PerFunctionState &PFS);
    364368 int ParseInsertValue(Instruction *&I, PerFunctionState &PFS);
    5252 kw_deplibs,
    5353 kw_datalayout,
    5454 kw_volatile,
    55 kw_atomic,
    56 kw_unordered, kw_monotonic, kw_acquire, kw_release, kw_acq_rel, kw_seq_cst,
    57 kw_singlethread,
    5558 kw_nuw,
    5659 kw_nsw,
    5760 kw_exact,
    120123 kw_ret, kw_br, kw_switch, kw_indirectbr, kw_invoke, kw_unwind,
    121124 kw_unreachable,
    122125
    123 kw_alloca, kw_load, kw_store, kw_getelementptr,
    126 kw_alloca, kw_load, kw_store, kw_fence, kw_getelementptr,
    124127
    125128 kw_extractelement, kw_insertelement, kw_shufflevector,
    126129 kw_extractvalue, kw_insertvalue, kw_blockaddress,
    127127 case bitc::BINOP_AND: return Instruction::And;
    128128 case bitc::BINOP_OR: return Instruction::Or;
    129129 case bitc::BINOP_XOR: return Instruction::Xor;
    130 }
    131 }
    132
    133 static AtomicOrdering GetDecodedOrdering(unsigned Val) {
    134 switch (Val) {
    135 case bitc::ORDERING_NOTATOMIC: return NotAtomic;
    136 case bitc::ORDERING_UNORDERED: return Unordered;
    137 case bitc::ORDERING_MONOTONIC: return Monotonic;
    138 case bitc::ORDERING_ACQUIRE: return Acquire;
    139 case bitc::ORDERING_RELEASE: return Release;
    140 case bitc::ORDERING_ACQREL: return AcquireRelease;
    141 default: // Map unknown orderings to sequentially-consistent.
    142 case bitc::ORDERING_SEQCST: return SequentiallyConsistent;
    143 }
    144 }
    145
    146 static SynchronizationScope GetDecodedSynchScope(unsigned Val) {
    147 switch (Val) {
    148 case bitc::SYNCHSCOPE_SINGLETHREAD: return SingleThread;
    149 default: // Map unknown scopes to cross-thread.
    150 case bitc::SYNCHSCOPE_CROSSTHREAD: return CrossThread;
    130151 }
    131152 }
    132153
    25332554 InstructionList.push_back(I);
    25342555 break;
    25352556 }
    2557 case bitc::FUNC_CODE_INST_FENCE: { // FENCE:[ordering, synchscope]
    2558 if (2 != Record.size())
    2559 return Error("Invalid FENCE record");
    2560 AtomicOrdering Ordering = GetDecodedOrdering(Record[0]);
    2561 if (Ordering == NotAtomic || Ordering == Unordered ||
    2562 Ordering == Monotonic)
    2563 return Error("Invalid FENCE record");
    2564 SynchronizationScope SynchScope = GetDecodedSynchScope(Record[1]);
    2565 I = new FenceInst(Context, Ordering, SynchScope);
    2566 InstructionList.push_back(I);
    2567 break;
    2568 }
    25362569 case bitc::FUNC_CODE_INST_CALL: {
    25372570 // CALL: [paramattrs, cc, fnty, fnid, arg0, arg1...]
    25382571 if (Record.size() < 3)
    9797 case Instruction::And: return bitc::BINOP_AND;
    9898 case Instruction::Or: return bitc::BINOP_OR;
    9999 case Instruction::Xor: return bitc::BINOP_XOR;
    100 }
    101 }
    102
    103 static unsigned GetEncodedOrdering(AtomicOrdering Ordering) {
    104 switch (Ordering) {
    105 default: llvm_unreachable("Unknown atomic ordering");
    106 case NotAtomic: return bitc::ORDERING_NOTATOMIC;
    107 case Unordered: return bitc::ORDERING_UNORDERED;
    108 case Monotonic: return bitc::ORDERING_MONOTONIC;
    109 case Acquire: return bitc::ORDERING_ACQUIRE;
    110 case Release: return bitc::ORDERING_RELEASE;
    111 case AcquireRelease: return bitc::ORDERING_ACQREL;
    112 case SequentiallyConsistent: return bitc::ORDERING_SEQCST;
    113 }
    114 }
    115
    116 static unsigned GetEncodedSynchScope(SynchronizationScope SynchScope) {
    117 switch (SynchScope) {
    118 default: llvm_unreachable("Unknown synchronization scope");
    119 case SingleThread: return bitc::SYNCHSCOPE_SINGLETHREAD;
    120 case CrossThread: return bitc::SYNCHSCOPE_CROSSTHREAD;
    100121 }
    101122 }
    102123
    11461167 Vals.push_back(Log2_32(cast(I).getAlignment())+1);
    11471168 Vals.push_back(cast(I).isVolatile());
    11481169 break;
    1170 case Instruction::Fence:
    1171 Code = bitc::FUNC_CODE_INST_FENCE;
    1172 Vals.push_back(GetEncodedOrdering(cast(I).getOrdering()));
    1173 Vals.push_back(GetEncodedSynchScope(cast(I).getSynchScope()));
    1174 break;
    11491175 case Instruction::Call: {
    11501176 const CallInst &CI = cast(I);
    11511177 PointerType *PTy = cast(CI.getCalledValue()->getType());
    32083208 ++SDNodeOrder;
    32093209 AssignOrderingToNode(StoreNode.getNode());
    32103210 DAG.setRoot(StoreNode);
    3211 }
    3212
    3213 void SelectionDAGBuilder::visitFence(const FenceInst &I) {
    3214 llvm_unreachable("Not implemented yet");
    32113215 }
    32123216
    32133217 /// visitTargetIntrinsic - Lower a call of a target intrinsic to an INTRINSIC
    503503 void visitAlloca(const AllocaInst &I);
    504504 void visitLoad(const LoadInst &I);
    505505 void visitStore(const StoreInst &I);
    506 void visitFence(const FenceInst &I);
    506507 void visitPHI(const PHINode &I);
    507508 void visitCall(const CallInst &I);
    508509 bool visitMemCmpCall(const CallInst &I);
    10971097
    10981098 void writeOperand(const Value *Op, bool PrintType);
    10991099 void writeParamOperand(const Value *Operand, Attributes Attrs);
    1100 void writeAtomic(AtomicOrdering Ordering, SynchronizationScope SynchScope);
    11001101
    11011102 void writeAllMDNodes();
    11021103
    11251126 Out << ' ';
    11261127 }
    11271128 WriteAsOperandInternal(Out, Operand, &TypePrinter, &Machine, TheModule);
    1129 }
    1130
    1131 void AssemblyWriter::writeAtomic(AtomicOrdering Ordering,
    1132 SynchronizationScope SynchScope) {
    1133 if (Ordering == NotAtomic)
    1134 return;
    1135
    1136 switch (SynchScope) {
    1137 default: Out << " "; break;
    1138 case SingleThread: Out << " singlethread"; break;
    1139 case CrossThread: break;
    1140 }
    1141
    1142 switch (Ordering) {
    1143 default: Out << " "; break;
    1144 case Unordered: Out << " unordered"; break;
    1145 case Monotonic: Out << " monotonic"; break;
    1146 case Acquire: Out << " acquire"; break;
    1147 case Release: Out << " release"; break;
    1148 case AcquireRelease: Out << " acq_rel"; break;
    1149 case SequentiallyConsistent: Out << " seq_cst"; break;
    1150 }
    11281151 }
    11291152
    11301153 void AssemblyWriter::writeParamOperand(const Value *Operand,
    18821905 Out << ", align " << cast(I).getAlignment();
    18831906 } else if (isa(I) && cast(I).getAlignment()) {
    18841907 Out << ", align " << cast(I).getAlignment();
    1908 } else if (const FenceInst *FI = dyn_cast(&I)) {
    1909 writeAtomic(FI->getOrdering(), FI->getSynchScope());
    18851910 }
    18861911
    18871912 // Print Metadata info.
    126126 case Alloca: return "alloca";
    127127 case Load: return "load";
    128128 case Store: return "store";
    129 case Fence: return "fence";
    129130 case GetElementPtr: return "getelementptr";
    130131
    131132 // Convert instructions...
    992992 setInstructionSubclassData((getSubclassDataFromInstruction() & 1) |
    993993 ((Log2_32(Align)+1) << 1));
    994994 assert(getAlignment() == Align && "Alignment representation error!");
    995 }
    996
    997 //===----------------------------------------------------------------------===//
    998 // FenceInst Implementation
    999 //===----------------------------------------------------------------------===//
    1000
    1001 FenceInst::FenceInst(LLVMContext &C, AtomicOrdering Ordering,
    1002 SynchronizationScope SynchScope,
    1003 Instruction *InsertBefore)
    1004 : Instruction(Type::getVoidTy(C), Fence, 0, 0, InsertBefore) {
    1005 setOrdering(Ordering);
    1006 setSynchScope(SynchScope);
    1007 }
    1008
    1009 FenceInst::FenceInst(LLVMContext &C, AtomicOrdering Ordering,
    1010 SynchronizationScope SynchScope,
    1011 BasicBlock *InsertAtEnd)
    1012 : Instruction(Type::getVoidTy(C), Fence, 0, 0, InsertAtEnd) {
    1013 setOrdering(Ordering);
    1014 setSynchScope(SynchScope);
    9951015 }
    9961016
    9971017 //===----------------------------------------------------------------------===//
    30173037 isVolatile(), getAlignment());
    30183038 }
    30193039
    3040 FenceInst *FenceInst::clone_impl() const {
    3041 return new FenceInst(getContext(), getOrdering(), getSynchScope());
    3042 }
    3043
    30203044 TruncInst *TruncInst::clone_impl() const {
    30213045 return new TruncInst(getOperand(0), getType());
    30223046 }
    277277 void visitUserOp1(Instruction &I);
    278278 void visitUserOp2(Instruction &I) { visitUserOp1(I); }
    279279 void visitIntrinsicFunctionCall(Intrinsic::ID ID, CallInst &CI);
    280 void visitFenceInst(FenceInst &FI);
    280281 void visitAllocaInst(AllocaInst &AI);
    281282 void visitExtractValueInst(ExtractValueInst &EVI);
    282283 void visitInsertValueInst(InsertValueInst &IVI);
    13141315 visitInstruction(AI);
    13151316 }
    13161317
    1318 void Verifier::visitFenceInst(FenceInst &FI) {
    1319 const AtomicOrdering Ordering = FI.getOrdering();
    1320 Assert1(Ordering == Acquire || Ordering == Release ||
    1321 Ordering == AcquireRelease || Ordering == SequentiallyConsistent,
    1322 "fence instructions may only have "
    1323 " acquire, release, acq_rel, or seq_cst ordering.", &FI);
    1324 visitInstruction(FI);
    1325 }
    1326
    13171327 void Verifier::visitExtractValueInst(ExtractValueInst &EVI) {
    13181328 Assert1(ExtractValueInst::getIndexedType(EVI.getAggregateOperand()->getType(),
    13191329 EVI.getIndices()) ==