llvm.org GIT mirror llvm / 479af7c
Make AArch64FastISel::EmitIntExt explicitly check its source and destination types This is a follow up to r212492. There should be no functional difference, but this patch makes it clear that SrcVT must be an i1/i8/16/i32 and DestVT must be an i8/i16/i32/i64. rdar://17516686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212633 91177308-0d34-0410-b5e6-96231b3b80d8 Louis Gerbarg 6 years ago
1 changed file(s) with 8 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
17501750 bool isZExt) {
17511751 assert(DestVT != MVT::i1 && "ZeroExt/SignExt an i1?");
17521752
1753 // FastISel does not have plumbing to deal with an MVT::i128, if we see one
1754 // so rather than return one we need to bail out to SelectionDAG.
1755 if (DestVT == MVT::i128)
1753 // FastISel does not have plumbing to deal with extensions where the SrcVT or
1754 // DestVT are odd things, so test to make sure that they are both types we can
1755 // handle (i1/i8/i16/i32 for SrcVT and i8/i16/i32/i64 for DestVT), otherwise
1756 // bail out to SelectionDAG.
1757 if (((DestVT != MVT::i8) && (DestVT != MVT::i16) &&
1758 (DestVT != MVT::i32) && (DestVT != MVT::i64)) ||
1759 ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) &&
1760 (SrcVT != MVT::i16) && (SrcVT != MVT::i32)))
17561761 return 0;
17571762
17581763 unsigned Opc;