llvm.org GIT mirror llvm / 479a2de
[ARM] Fix Tag_ABI_HardFP_use build attribute Fix Tag_ABI_HardFP_use build attribute to handle single precision FP, replace deprecated Tag_ABI_HardFP_use value of 3 with 0 and also add some tests for Tag_ABI_VFP_args. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193856 91177308-0d34-0410-b5e6-96231b3b80d8 Bradley Smith 6 years ago
4 changed file(s) with 102 addition(s) and 39 deletion(s). Raw diff Collapse all Expand all
691691 ATS.emitAttribute(ARMBuildAttrs::ABI_align8_needed, 1);
692692 ATS.emitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1);
693693
694 // ABI_HardFP_use attribute to indicate single precision FP.
695 if (Subtarget->isFPOnlySP())
696 ATS.emitAttribute(ARMBuildAttrs::ABI_HardFP_use,
697 ARMBuildAttrs::HardFPSinglePrecision);
698
694699 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
695 if (Subtarget->isAAPCS_ABI() && TM.Options.FloatABIType == FloatABI::Hard) {
696 ATS.emitAttribute(ARMBuildAttrs::ABI_HardFP_use, 3);
697 ATS.emitAttribute(ARMBuildAttrs::ABI_VFP_args, 1);
698 }
700 if (Subtarget->isAAPCS_ABI() && TM.Options.FloatABIType == FloatABI::Hard)
701 ATS.emitAttribute(ARMBuildAttrs::ABI_VFP_args, ARMBuildAttrs::HardFPAAPCS);
702
699703 // FIXME: Should we signal R9 usage?
700704
701705 if (Subtarget->hasDivide()) {
136136 AllowIEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
137137
138138 // Tag_ABI_HardFP_use, (=27), uleb128
139 HardFPImplied = 0, // FP use should be implied by Tag_FP_arch
139140 HardFPSinglePrecision = 1, // Single-precision only
140 HardFPImplied = 3, // FP use should be implied by Tag_FP_arch
141
142 // Tag_ABI_VFP_args, (=28), uleb128
143 BaseAAPCS = 0,
144 HardFPAAPCS = 1,
141145
142146 // Tag_DIV_use, (=44), uleb128
143147 AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no info exists.
1111 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
1212 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
1313 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
14 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=CORTEX-A9
14 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
15 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
1516 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
1617 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
17 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CORTEX-M4
18 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
19 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
1820 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
1921 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
2022 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
2325 ; V6: .eabi_attribute 8, 1
2426 ; V6: .eabi_attribute 24, 1
2527 ; V6: .eabi_attribute 25, 1
28 ; V6-NOT: .eabi_attribute 27
29 ; V6-NOT: .eabi_attribute 28
2630
2731 ; V6M: .eabi_attribute 6, 12
2832 ; V6M: .eabi_attribute 7, 77
3034 ; V6M: .eabi_attribute 9, 1
3135 ; V6M: .eabi_attribute 24, 1
3236 ; V6M: .eabi_attribute 25, 1
37 ; V6M-NOT: .eabi_attribute 27
38 ; V6M-NOT: .eabi_attribute 28
3339
3440 ; ARM1156T2F-S: .cpu arm1156t2f-s
3541 ; ARM1156T2F-S: .eabi_attribute 6, 8
4147 ; ARM1156T2F-S: .eabi_attribute 23, 3
4248 ; ARM1156T2F-S: .eabi_attribute 24, 1
4349 ; ARM1156T2F-S: .eabi_attribute 25, 1
50 ; ARM1156T2F-S-NOT: .eabi_attribute 27
51 ; ARM1156T2F-S-NOT: .eabi_attribute 28
4452
4553 ; V7M: .eabi_attribute 6, 10
4654 ; V7M: .eabi_attribute 7, 77
4856 ; V7M: .eabi_attribute 9, 2
4957 ; V7M: .eabi_attribute 24, 1
5058 ; V7M: .eabi_attribute 25, 1
59 ; V7M-NOT: .eabi_attribute 27
60 ; V7M-NOT: .eabi_attribute 28
5161 ; V7M: .eabi_attribute 44, 0
5262
5363 ; V7: .syntax unified
5767 ; V7: .eabi_attribute 23, 3
5868 ; V7: .eabi_attribute 24, 1
5969 ; V7: .eabi_attribute 25, 1
70 ; V7-NOT: .eabi_attribute 27
71 ; V7-NOT: .eabi_attribute 28
6072
6173 ; V8: .syntax unified
6274 ; V8: .eabi_attribute 6, 14
8395 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
8496 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
8597
86 ; CORTEX-A9: .cpu cortex-a9
87 ; CORTEX-A9: .eabi_attribute 6, 10
88 ; CORTEX-A9: .eabi_attribute 7, 65
89 ; CORTEX-A9: .eabi_attribute 8, 1
90 ; CORTEX-A9: .eabi_attribute 9, 2
91 ; CORTEX-A9: .fpu neon
92 ; CORTEX-A9: .eabi_attribute 20, 1
93 ; CORTEX-A9: .eabi_attribute 21, 1
94 ; CORTEX-A9: .eabi_attribute 23, 3
95 ; CORTEX-A9: .eabi_attribute 24, 1
96 ; CORTEX-A9: .eabi_attribute 25, 1
98 ; CORTEX-A9-SOFT: .cpu cortex-a9
99 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10
100 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65
101 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1
102 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2
103 ; CORTEX-A9-SOFT: .fpu neon
104 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1
105 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1
106 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3
107 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1
108 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1
109 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27
110 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28
111
112 ; CORTEX-A9-HARD: .cpu cortex-a9
113 ; CORTEX-A9-HARD: .eabi_attribute 6, 10
114 ; CORTEX-A9-HARD: .eabi_attribute 7, 65
115 ; CORTEX-A9-HARD: .eabi_attribute 8, 1
116 ; CORTEX-A9-HARD: .eabi_attribute 9, 2
117 ; CORTEX-A9-HARD: .fpu neon
118 ; CORTEX-A9-HARD: .eabi_attribute 20, 1
119 ; CORTEX-A9-HARD: .eabi_attribute 21, 1
120 ; CORTEX-A9-HARD: .eabi_attribute 23, 3
121 ; CORTEX-A9-HARD: .eabi_attribute 24, 1
122 ; CORTEX-A9-HARD: .eabi_attribute 25, 1
123 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27
124 ; CORTEX-A9-HARD: .eabi_attribute 28, 1
97125
98126 ; CORTEX-A15: .cpu cortex-a15
99127 ; CORTEX-A15: .eabi_attribute 6, 10
107135 ; CORTEX-A15: .eabi_attribute 24, 1
108136 ; CORTEX-A15: .eabi_attribute 25, 1
109137 ; CORTEX-A15: .eabi_attribute 44, 2
138 ; CORTEX-A15-NOT: .eabi_attribute 27
139 ; CORTEX-A15-NOT: .eabi_attribute 28
110140
111141 ; CORTEX-M0: .cpu cortex-m0
112142 ; CORTEX-M0: .eabi_attribute 6, 12
115145 ; CORTEX-M0: .eabi_attribute 9, 1
116146 ; CORTEX-M0: .eabi_attribute 24, 1
117147 ; CORTEX-M0: .eabi_attribute 25, 1
118
119 ; CORTEX-M4: .cpu cortex-m4
120 ; CORTEX-M4: .eabi_attribute 6, 13
121 ; CORTEX-M4: .eabi_attribute 7, 77
122 ; CORTEX-M4: .eabi_attribute 8, 0
123 ; CORTEX-M4: .eabi_attribute 9, 2
124 ; CORTEX-M4: .fpu vfpv4-d16
125 ; CORTEX-M4: .eabi_attribute 20, 1
126 ; CORTEX-M4: .eabi_attribute 21, 1
127 ; CORTEX-M4: .eabi_attribute 23, 3
128 ; CORTEX-M4: .eabi_attribute 24, 1
129 ; CORTEX-M4: .eabi_attribute 25, 1
130 ; CORTEX-M4: .eabi_attribute 44, 0
148 ; CORTEX-M0-NOT: .eabi_attribute 27
149 ; CORTEX-M0-NOT: .eabi_attribute 28
150
151 ; CORTEX-M4-SOFT: .cpu cortex-m4
152 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13
153 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77
154 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0
155 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2
156 ; CORTEX-M4-SOFT: .fpu vfpv4-d16
157 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1
158 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1
159 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3
160 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1
161 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1
162 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1
163 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28
164 ; CORTEX-M4-SOFT: .eabi_attribute 44, 0
165
166 ; CORTEX-M4-HARD: .cpu cortex-m4
167 ; CORTEX-M4-HARD: .eabi_attribute 6, 13
168 ; CORTEX-M4-HARD: .eabi_attribute 7, 77
169 ; CORTEX-M4-HARD: .eabi_attribute 8, 0
170 ; CORTEX-M4-HARD: .eabi_attribute 9, 2
171 ; CORTEX-M4-HARD: .fpu vfpv4-d16
172 ; CORTEX-M4-HARD: .eabi_attribute 20, 1
173 ; CORTEX-M4-HARD: .eabi_attribute 21, 1
174 ; CORTEX-M4-HARD: .eabi_attribute 23, 3
175 ; CORTEX-M4-HARD: .eabi_attribute 24, 1
176 ; CORTEX-M4-HARD: .eabi_attribute 25, 1
177 ; CORTEX-M4-HARD: .eabi_attribute 27, 1
178 ; CORTEX-M4-HARD: .eabi_attribute 28, 1
179 ; CORTEX-M4-HARD: .eabi_attribute 44, 0
131180
132181 ; CORTEX-R5: .cpu cortex-r5
133182 ; CORTEX-R5: .eabi_attribute 6, 10
140189 ; CORTEX-R5: .eabi_attribute 23, 3
141190 ; CORTEX-R5: .eabi_attribute 24, 1
142191 ; CORTEX-R5: .eabi_attribute 25, 1
192 ; CORTEX-R5: .eabi_attribute 27, 1
193 ; CORTEX-R5-NOT: .eabi_attribute 28
143194 ; CORTEX-R5: .eabi_attribute 44, 2
144195
145196 ; CORTEX-A53: .cpu cortex-a53
151202 ; CORTEX-A53: .eabi_attribute 12, 3
152203 ; CORTEX-A53: .eabi_attribute 24, 1
153204 ; CORTEX-A53: .eabi_attribute 25, 1
205 ; CORTEX-A53-NOT: .eabi_attribute 27
206 ; CORTEX-A53-NOT: .eabi_attribute 28
154207 ; CORTEX-A53: .eabi_attribute 44, 2
155208
156209 ; CORTEX-A57: .cpu cortex-a57
162215 ; CORTEX-A57: .eabi_attribute 12, 3
163216 ; CORTEX-A57: .eabi_attribute 24, 1
164217 ; CORTEX-A57: .eabi_attribute 25, 1
218 ; CORTEX-A57-NOT: .eabi_attribute 27
219 ; CORTEX-A57-NOT: .eabi_attribute 28
165220 ; CORTEX-A57: .eabi_attribute 44, 2
166221
167222 define i32 @f(i64 %z) {
227227 ; CORTEX-M4-NEXT: ]
228228 ; CORTEX-M4-NEXT: Address: 0x0
229229 ; CORTEX-M4-NEXT: Offset: 0x38
230 ; CORTEX-M4-NEXT: Size: 49
230 ; CORTEX-M4-NEXT: Size: 51
231231 ; CORTEX-M4-NEXT: Link: 0
232232 ; CORTEX-M4-NEXT: Info: 0
233233 ; CORTEX-M4-NEXT: AddressAlignment: 1
234234 ; CORTEX-M4-NEXT: EntrySize: 0
235235 ; CORTEX-M4-NEXT: SectionData (
236 ; CORTEX-M4-NEXT: 0000: 41300000 00616561 62690001 26000000
236 ; CORTEX-M4-NEXT: 0000: 41320000 00616561 62690001 28000000
237237 ; CORTEX-M4-NEXT: 0010: 05434F52 5445582D 4D340006 0D074D08
238 ; CORTEX-M4-NEXT: 0020: 0009020A 06140115 01170318 0119012C
239 ; CORTEX-M4-NEXT: 0030: 00
238 ; CORTEX-M4-NEXT: 0020: 0009020A 06140115 01170318 0119011B
239 ; CORTEX-M4-NEXT: 0030: 012C00
240240 ; CORTEX-M4-NEXT: )
241241
242242 ; CORTEX-R5: Name: .ARM.attributes
245245 ; CORTEX-R5-NEXT: ]
246246 ; CORTEX-R5-NEXT: Address: 0x0
247247 ; CORTEX-R5-NEXT: Offset: 0x3C
248 ; CORTEX-R5-NEXT: Size: 49
248 ; CORTEX-R5-NEXT: Size: 51
249249 ; CORTEX-R5-NEXT: Link: 0
250250 ; CORTEX-R5-NEXT: Info: 0
251251 ; CORTEX-R5-NEXT: AddressAlignment: 1
252252 ; CORTEX-R5-NEXT: EntrySize: 0
253253 ; CORTEX-R5-NEXT: SectionData (
254 ; CORTEX-R5-NEXT: 0000: 41300000 00616561 62690001 26000000
254 ; CORTEX-R5-NEXT: 0000: 41320000 00616561 62690001 28000000
255255 ; CORTEX-R5-NEXT: 0010: 05434F52 5445582D 52350006 0A075208
256 ; CORTEX-R5-NEXT: 0020: 0109020A 04140115 01170318 0119012C
257 ; CORTEX-R5-NEXT: 0030: 02
256 ; CORTEX-R5-NEXT: 0020: 0109020A 04140115 01170318 0119011B
257 ; CORTEX-R5-NEXT: 0030: 012C02
258258 ; CORTEX-R5-NEXT: )
259259
260260 define i32 @f(i64 %z) {