llvm.org GIT mirror llvm / 4771681
[SystemZ] Add support for TMHH, TMHL, TMLH and TMLL For now just handles simple comparisons of an ANDed value with zero. The CC value provides enough information to do any comparison for a 2-bit mask, and some nonzero comparisons with more populated masks, but that's all future work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189469 91177308-0d34-0410-b5e6-96231b3b80d8 Richard Sandiford 6 years ago
11 changed file(s) with 490 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
5656 const unsigned CCMASK_SRST_NOTFOUND = CCMASK_2;
5757 const unsigned CCMASK_SRST = CCMASK_1 | CCMASK_2;
5858
59 // Condition-code mask assignments for TEST UNDER MASK.
60 const unsigned CCMASK_TM_ALL_0 = CCMASK_0;
61 const unsigned CCMASK_TM_MIXED_MSB_0 = CCMASK_1;
62 const unsigned CCMASK_TM_MIXED_MSB_1 = CCMASK_2;
63 const unsigned CCMASK_TM_ALL_1 = CCMASK_3;
64 const unsigned CCMASK_TM = CCMASK_ANY;
65
5966 // Mask assignments for PFD.
6067 const unsigned PFD_READ = 1;
6168 const unsigned PFD_WRITE = 2;
10711071 // Return true if a comparison described by CCMask, CmpOp0 and CmpOp1
10721072 // is an equality comparison that is better implemented using unsigned
10731073 // rather than signed comparison instructions.
1074 static bool preferUnsignedComparison(SelectionDAG &DAG, SDValue CmpOp0,
1075 SDValue CmpOp1, unsigned CCMask) {
1074 static bool preferUnsignedComparison(SDValue CmpOp0, SDValue CmpOp1,
1075 unsigned CCMask) {
10761076 // The test must be for equality or inequality.
10771077 if (CCMask != SystemZ::CCMASK_CMP_EQ && CCMask != SystemZ::CCMASK_CMP_NE)
10781078 return false;
11751175 return false;
11761176 }
11771177
1178 // See whether the comparison (Opcode CmpOp0, CmpOp1) can be implemented
1179 // as a TEST UNDER MASK instruction when the condition being tested is
1180 // as described by CCValid and CCMask. Update the arguments with the
1181 // TM version if so.
1182 static void adjustForTestUnderMask(unsigned &Opcode, SDValue &CmpOp0,
1183 SDValue &CmpOp1, unsigned &CCValid,
1184 unsigned &CCMask) {
1185 // For now we just handle equality and inequality with zero.
1186 if (CCMask != SystemZ::CCMASK_CMP_EQ &&
1187 (CCMask ^ CCValid) != SystemZ::CCMASK_CMP_EQ)
1188 return;
1189 ConstantSDNode *ConstCmpOp1 = dyn_cast(CmpOp1);
1190 if (!ConstCmpOp1 || ConstCmpOp1->getZExtValue() != 0)
1191 return;
1192
1193 // Check whether the nonconstant input is an AND with a constant mask.
1194 if (CmpOp0.getOpcode() != ISD::AND)
1195 return;
1196 SDValue AndOp0 = CmpOp0.getOperand(0);
1197 SDValue AndOp1 = CmpOp0.getOperand(1);
1198 ConstantSDNode *Mask = dyn_cast(AndOp1.getNode());
1199 if (!Mask)
1200 return;
1201
1202 // Check whether the mask is suitable for TMHH, TMHL, TMLH or TMLL.
1203 uint64_t MaskVal = Mask->getZExtValue();
1204 if (!SystemZ::isImmLL(MaskVal) && !SystemZ::isImmLH(MaskVal) &&
1205 !SystemZ::isImmHL(MaskVal) && !SystemZ::isImmHH(MaskVal))
1206 return;
1207
1208 // Go ahead and make the change.
1209 Opcode = SystemZISD::TM;
1210 CmpOp0 = AndOp0;
1211 CmpOp1 = AndOp1;
1212 CCValid = SystemZ::CCMASK_TM;
1213 CCMask = (CCMask == SystemZ::CCMASK_CMP_EQ ?
1214 SystemZ::CCMASK_TM_ALL_0 :
1215 SystemZ::CCMASK_TM_ALL_0 ^ CCValid);
1216 }
1217
11781218 // Return a target node that compares CmpOp0 with CmpOp1 and stores a
11791219 // 2-bit result in CC. Set CCValid to the CCMASK_* of all possible
11801220 // 2-bit results and CCMask to the subset of those results that are
11811221 // associated with Cond.
1182 static SDValue emitCmp(SelectionDAG &DAG, SDValue CmpOp0, SDValue CmpOp1,
1183 ISD::CondCode Cond, unsigned &CCValid,
1222 static SDValue emitCmp(SelectionDAG &DAG, SDLoc DL, SDValue CmpOp0,
1223 SDValue CmpOp1, ISD::CondCode Cond, unsigned &CCValid,
11841224 unsigned &CCMask) {
11851225 bool IsUnsigned = false;
11861226 CCMask = CCMaskForCondCode(Cond);
11921232 CCMask &= CCValid;
11931233 adjustZeroCmp(DAG, IsUnsigned, CmpOp0, CmpOp1, CCMask);
11941234 adjustSubwordCmp(DAG, IsUnsigned, CmpOp0, CmpOp1, CCMask);
1195 if (preferUnsignedComparison(DAG, CmpOp0, CmpOp1, CCMask))
1235 if (preferUnsignedComparison(CmpOp0, CmpOp1, CCMask))
11961236 IsUnsigned = true;
11971237 }
11981238
12041244 (CCMask & SystemZ::CCMASK_CMP_UO));
12051245 }
12061246
1207 SDLoc DL(CmpOp0);
1208 return DAG.getNode((IsUnsigned ? SystemZISD::UCMP : SystemZISD::CMP),
1209 DL, MVT::Glue, CmpOp0, CmpOp1);
1247 unsigned Opcode = (IsUnsigned ? SystemZISD::UCMP : SystemZISD::CMP);
1248 adjustForTestUnderMask(Opcode, CmpOp0, CmpOp1, CCValid, CCMask);
1249 return DAG.getNode(Opcode, DL, MVT::Glue, CmpOp0, CmpOp1);
12101250 }
12111251
12121252 // Implement a 32-bit *MUL_LOHI operation by extending both operands to
12551295 SDLoc DL(Op);
12561296
12571297 unsigned CCValid, CCMask;
1258 SDValue Flags = emitCmp(DAG, CmpOp0, CmpOp1, CC, CCValid, CCMask);
1298 SDValue Flags = emitCmp(DAG, DL, CmpOp0, CmpOp1, CC, CCValid, CCMask);
12591299 return DAG.getNode(SystemZISD::BR_CCMASK, DL, Op.getValueType(),
12601300 Chain, DAG.getConstant(CCValid, MVT::i32),
12611301 DAG.getConstant(CCMask, MVT::i32), Dest, Flags);
12711311 SDLoc DL(Op);
12721312
12731313 unsigned CCValid, CCMask;
1274 SDValue Flags = emitCmp(DAG, CmpOp0, CmpOp1, CC, CCValid, CCMask);
1314 SDValue Flags = emitCmp(DAG, DL, CmpOp0, CmpOp1, CC, CCValid, CCMask);
12751315
12761316 SmallVector Ops;
12771317 Ops.push_back(TrueOp);
19071947 OPCODE(PCREL_WRAPPER);
19081948 OPCODE(CMP);
19091949 OPCODE(UCMP);
1950 OPCODE(TM);
19101951 OPCODE(BR_CCMASK);
19111952 OPCODE(SELECT_CCMASK);
19121953 OPCODE(ADJDYNALLOC);
4343
4444 // Likewise unsigned integer comparison.
4545 UCMP,
46
47 // Test under mask. The first operand is ANDed with the second operand
48 // and the condition codes are set on the result.
49 TM,
4650
4751 // Branches if a condition is true. Operand 0 is the chain operand;
4852 // operand 1 is the 4-bit condition-code mask, with bit N in
10331033 let mayLoad = 1, Defs = [CC], Uses = [R0W] in
10341034 defm CLST : StringRRE<"clst", 0xB25D, z_strcmp>;
10351035
1036 // Test under mask.
1037 let Defs = [CC] in {
1038 let isCodeGenOnly = 1 in {
1039 def TMLL32 : CompareRI<"tmll", 0xA71, z_tm, GR32, imm32ll16>;
1040 def TMLH32 : CompareRI<"tmlh", 0xA70, z_tm, GR32, imm32lh16>;
1041 }
1042
1043 def TMLL : CompareRI<"tmll", 0xA71, z_tm, GR64, imm64ll16>;
1044 def TMLH : CompareRI<"tmlh", 0xA70, z_tm, GR64, imm64lh16>;
1045 def TMHL : CompareRI<"tmhl", 0xA73, z_tm, GR64, imm64hl16>;
1046 def TMHH : CompareRI<"tmhh", 0xA72, z_tm, GR64, imm64hh16>;
1047 }
1048
10361049 //===----------------------------------------------------------------------===//
10371050 // Prefetch
10381051 //===----------------------------------------------------------------------===//
9595 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
9696 def z_cmp : SDNode<"SystemZISD::CMP", SDT_ZCmp, [SDNPOutGlue]>;
9797 def z_ucmp : SDNode<"SystemZISD::UCMP", SDT_ZCmp, [SDNPOutGlue]>;
98 def z_tm : SDNode<"SystemZISD::TM", SDT_ZCmp, [SDNPOutGlue]>;
9899 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
99100 [SDNPHasChain, SDNPInGlue]>;
100101 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
202202 ; comparisons with zero if the immediate covers the whole register.
203203 define i32 @f11(i32 %a, i32 %b, i32 *%dest) {
204204 ; CHECK-LABEL: f11:
205 ; CHECK: nilf %r2, 100
205 ; CHECK: nilf %r2, 100000001
206206 ; CHECK-NEXT: jl .L{{.*}}
207207 ; CHECK: br %r14
208208 entry:
209 %res = and i32 %a, 100
209 %res = and i32 %a, 100000001
210210 %cmp = icmp ne i32 %res, 0
211211 br i1 %cmp, label %exit, label %store
212212
0 ; Test the use of TEST UNDER MASK for 32-bit operations.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
3
4 @g = global i32 0
5
6 ; Check the lowest useful TMLL value.
7 define void @f1(i32 %a) {
8 ; CHECK-LABEL: f1:
9 ; CHECK: tmll %r2, 1
10 ; CHECK: je {{\.L.*}}
11 ; CHECK: br %r14
12 entry:
13 %and = and i32 %a, 1
14 %cmp = icmp eq i32 %and, 0
15 br i1 %cmp, label %exit, label %store
16
17 store:
18 store i32 1, i32 *@g
19 br label %exit
20
21 exit:
22 ret void
23 }
24
25 ; Check the high end of the TMLL range.
26 define void @f2(i32 %a) {
27 ; CHECK-LABEL: f2:
28 ; CHECK: tmll %r2, 65535
29 ; CHECK: jne {{\.L.*}}
30 ; CHECK: br %r14
31 entry:
32 %and = and i32 %a, 65535
33 %cmp = icmp ne i32 %and, 0
34 br i1 %cmp, label %exit, label %store
35
36 store:
37 store i32 1, i32 *@g
38 br label %exit
39
40 exit:
41 ret void
42 }
43
44 ; Check the lowest useful TMLH value, which is the next value up.
45 define void @f3(i32 %a) {
46 ; CHECK-LABEL: f3:
47 ; CHECK: tmlh %r2, 1
48 ; CHECK: jne {{\.L.*}}
49 ; CHECK: br %r14
50 entry:
51 %and = and i32 %a, 65536
52 %cmp = icmp ne i32 %and, 0
53 br i1 %cmp, label %exit, label %store
54
55 store:
56 store i32 1, i32 *@g
57 br label %exit
58
59 exit:
60 ret void
61 }
62
63 ; Check the next value up again, which cannot use TM.
64 define void @f4(i32 %a) {
65 ; CHECK-LABEL: f4:
66 ; CHECK-NOT: {{tm[lh].}}
67 ; CHECK: br %r14
68 entry:
69 %and = and i32 %a, 4294901759
70 %cmp = icmp eq i32 %and, 0
71 br i1 %cmp, label %exit, label %store
72
73 store:
74 store i32 1, i32 *@g
75 br label %exit
76
77 exit:
78 ret void
79 }
80
81 ; Check the high end of the TMLH range.
82 define void @f5(i32 %a) {
83 ; CHECK-LABEL: f5:
84 ; CHECK: tmlh %r2, 65535
85 ; CHECK: je {{\.L.*}}
86 ; CHECK: br %r14
87 entry:
88 %and = and i32 %a, 4294901760
89 %cmp = icmp eq i32 %and, 0
90 br i1 %cmp, label %exit, label %store
91
92 store:
93 store i32 1, i32 *@g
94 br label %exit
95
96 exit:
97 ret void
98 }
0 ; Test the use of TEST UNDER MASK for 64-bit operations.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
3
4 @g = global i32 0
5
6 ; Check the lowest useful TMLL value.
7 define void @f1(i64 %a) {
8 ; CHECK-LABEL: f1:
9 ; CHECK: tmll %r2, 1
10 ; CHECK: je {{\.L.*}}
11 ; CHECK: br %r14
12 entry:
13 %and = and i64 %a, 1
14 %cmp = icmp eq i64 %and, 0
15 br i1 %cmp, label %exit, label %store
16
17 store:
18 store i32 1, i32 *@g
19 br label %exit
20
21 exit:
22 ret void
23 }
24
25 ; Check the high end of the TMLL range.
26 define void @f2(i64 %a) {
27 ; CHECK-LABEL: f2:
28 ; CHECK: tmll %r2, 65535
29 ; CHECK: jne {{\.L.*}}
30 ; CHECK: br %r14
31 entry:
32 %and = and i64 %a, 65535
33 %cmp = icmp ne i64 %and, 0
34 br i1 %cmp, label %exit, label %store
35
36 store:
37 store i32 1, i32 *@g
38 br label %exit
39
40 exit:
41 ret void
42 }
43
44 ; Check the lowest useful TMLH value, which is the next value up.
45 define void @f3(i64 %a) {
46 ; CHECK-LABEL: f3:
47 ; CHECK: tmlh %r2, 1
48 ; CHECK: jne {{\.L.*}}
49 ; CHECK: br %r14
50 entry:
51 %and = and i64 %a, 65536
52 %cmp = icmp ne i64 %and, 0
53 br i1 %cmp, label %exit, label %store
54
55 store:
56 store i32 1, i32 *@g
57 br label %exit
58
59 exit:
60 ret void
61 }
62
63 ; Check the next value up again, which cannot use TM.
64 define void @f4(i64 %a) {
65 ; CHECK-LABEL: f4:
66 ; CHECK-NOT: {{tm[lh].}}
67 ; CHECK: br %r14
68 entry:
69 %and = and i64 %a, 4294901759
70 %cmp = icmp eq i64 %and, 0
71 br i1 %cmp, label %exit, label %store
72
73 store:
74 store i32 1, i32 *@g
75 br label %exit
76
77 exit:
78 ret void
79 }
80
81 ; Check the high end of the TMLH range.
82 define void @f5(i64 %a) {
83 ; CHECK-LABEL: f5:
84 ; CHECK: tmlh %r2, 65535
85 ; CHECK: je {{\.L.*}}
86 ; CHECK: br %r14
87 entry:
88 %and = and i64 %a, 4294901760
89 %cmp = icmp eq i64 %and, 0
90 br i1 %cmp, label %exit, label %store
91
92 store:
93 store i32 1, i32 *@g
94 br label %exit
95
96 exit:
97 ret void
98 }
99
100 ; Check the lowest useful TMHL value.
101 define void @f6(i64 %a) {
102 ; CHECK-LABEL: f6:
103 ; CHECK: tmhl %r2, 1
104 ; CHECK: je {{\.L.*}}
105 ; CHECK: br %r14
106 entry:
107 %and = and i64 %a, 4294967296
108 %cmp = icmp eq i64 %and, 0
109 br i1 %cmp, label %exit, label %store
110
111 store:
112 store i32 1, i32 *@g
113 br label %exit
114
115 exit:
116 ret void
117 }
118
119 ; Check the next value up again, which cannot use TM.
120 define void @f7(i64 %a) {
121 ; CHECK-LABEL: f7:
122 ; CHECK-NOT: {{tm[lh].}}
123 ; CHECK: br %r14
124 entry:
125 %and = and i64 %a, 4294967297
126 %cmp = icmp ne i64 %and, 0
127 br i1 %cmp, label %exit, label %store
128
129 store:
130 store i32 1, i32 *@g
131 br label %exit
132
133 exit:
134 ret void
135 }
136
137 ; Check the high end of the TMHL range.
138 define void @f8(i64 %a) {
139 ; CHECK-LABEL: f8:
140 ; CHECK: tmhl %r2, 65535
141 ; CHECK: jne {{\.L.*}}
142 ; CHECK: br %r14
143 entry:
144 %and = and i64 %a, 281470681743360
145 %cmp = icmp ne i64 %and, 0
146 br i1 %cmp, label %exit, label %store
147
148 store:
149 store i32 1, i32 *@g
150 br label %exit
151
152 exit:
153 ret void
154 }
155
156 ; Check the lowest useful TMHH value.
157 define void @f9(i64 %a) {
158 ; CHECK-LABEL: f9:
159 ; CHECK: tmhh %r2, 1
160 ; CHECK: jne {{\.L.*}}
161 ; CHECK: br %r14
162 entry:
163 %and = and i64 %a, 281474976710656
164 %cmp = icmp ne i64 %and, 0
165 br i1 %cmp, label %exit, label %store
166
167 store:
168 store i32 1, i32 *@g
169 br label %exit
170
171 exit:
172 ret void
173 }
174
175 ; Check the high end of the TMHH range.
176 define void @f10(i64 %a) {
177 ; CHECK-LABEL: f10:
178 ; CHECK: tmhh %r2, 65535
179 ; CHECK: je {{\.L.*}}
180 ; CHECK: br %r14
181 entry:
182 %and = and i64 %a, 18446462598732840960
183 %cmp = icmp eq i64 %and, 0
184 br i1 %cmp, label %exit, label %store
185
186 store:
187 store i32 1, i32 *@g
188 br label %exit
189
190 exit:
191 ret void
192 }
69636963 # CHECK: sy %r15, 0
69646964 0xe3 0xf0 0x00 0x00 0x00 0x5b
69656965
6966 # CHECK: tmhh %r0, 0
6967 0xa7 0x02 0x00 0x00
6968
6969 # CHECK: tmhh %r0, 32768
6970 0xa7 0x02 0x80 0x00
6971
6972 # CHECK: tmhh %r0, 65535
6973 0xa7 0x02 0xff 0xff
6974
6975 # CHECK: tmhh %r15, 0
6976 0xa7 0xf2 0x00 0x00
6977
6978 # CHECK: tmhl %r0, 0
6979 0xa7 0x03 0x00 0x00
6980
6981 # CHECK: tmhl %r0, 32768
6982 0xa7 0x03 0x80 0x00
6983
6984 # CHECK: tmhl %r0, 65535
6985 0xa7 0x03 0xff 0xff
6986
6987 # CHECK: tmhl %r15, 0
6988 0xa7 0xf3 0x00 0x00
6989
6990 # CHECK: tmlh %r0, 0
6991 0xa7 0x00 0x00 0x00
6992
6993 # CHECK: tmlh %r0, 32768
6994 0xa7 0x00 0x80 0x00
6995
6996 # CHECK: tmlh %r0, 65535
6997 0xa7 0x00 0xff 0xff
6998
6999 # CHECK: tmlh %r15, 0
7000 0xa7 0xf0 0x00 0x00
7001
7002 # CHECK: tmll %r0, 0
7003 0xa7 0x01 0x00 0x00
7004
7005 # CHECK: tmll %r0, 32768
7006 0xa7 0x01 0x80 0x00
7007
7008 # CHECK: tmll %r0, 65535
7009 0xa7 0x01 0xff 0xff
7010
7011 # CHECK: tmll %r15, 0
7012 0xa7 0xf1 0x00 0x00
7013
69667014 # CHECK: xgr %r0, %r0
69677015 0xb9 0x82 0x00 0x00
69687016
28632863 sy %r0, 524288
28642864
28652865 #CHECK: error: invalid operand
2866 #CHECK: tmhh %r0, -1
2867 #CHECK: error: invalid operand
2868 #CHECK: tmhh %r0, 0x10000
2869
2870 tmhh %r0, -1
2871 tmhh %r0, 0x10000
2872
2873 #CHECK: error: invalid operand
2874 #CHECK: tmhl %r0, -1
2875 #CHECK: error: invalid operand
2876 #CHECK: tmhl %r0, 0x10000
2877
2878 tmhl %r0, -1
2879 tmhl %r0, 0x10000
2880
2881 #CHECK: error: invalid operand
2882 #CHECK: tmlh %r0, -1
2883 #CHECK: error: invalid operand
2884 #CHECK: tmlh %r0, 0x10000
2885
2886 tmlh %r0, -1
2887 tmlh %r0, 0x10000
2888
2889 #CHECK: error: invalid operand
2890 #CHECK: tmll %r0, -1
2891 #CHECK: error: invalid operand
2892 #CHECK: tmll %r0, 0x10000
2893
2894 tmll %r0, -1
2895 tmll %r0, 0x10000
2896
2897 #CHECK: error: invalid operand
28662898 #CHECK: x %r0, -1
28672899 #CHECK: error: invalid operand
28682900 #CHECK: x %r0, 4096
72837283 sy %r0, 524287(%r15,%r1)
72847284 sy %r15, 0
72857285
7286 #CHECK: tmhh %r0, 0 # encoding: [0xa7,0x02,0x00,0x00]
7287 #CHECK: tmhh %r0, 32768 # encoding: [0xa7,0x02,0x80,0x00]
7288 #CHECK: tmhh %r0, 65535 # encoding: [0xa7,0x02,0xff,0xff]
7289 #CHECK: tmhh %r15, 0 # encoding: [0xa7,0xf2,0x00,0x00]
7290
7291 tmhh %r0, 0
7292 tmhh %r0, 0x8000
7293 tmhh %r0, 0xffff
7294 tmhh %r15, 0
7295
7296 #CHECK: tmhl %r0, 0 # encoding: [0xa7,0x03,0x00,0x00]
7297 #CHECK: tmhl %r0, 32768 # encoding: [0xa7,0x03,0x80,0x00]
7298 #CHECK: tmhl %r0, 65535 # encoding: [0xa7,0x03,0xff,0xff]
7299 #CHECK: tmhl %r15, 0 # encoding: [0xa7,0xf3,0x00,0x00]
7300
7301 tmhl %r0, 0
7302 tmhl %r0, 0x8000
7303 tmhl %r0, 0xffff
7304 tmhl %r15, 0
7305
7306 #CHECK: tmlh %r0, 0 # encoding: [0xa7,0x00,0x00,0x00]
7307 #CHECK: tmlh %r0, 32768 # encoding: [0xa7,0x00,0x80,0x00]
7308 #CHECK: tmlh %r0, 65535 # encoding: [0xa7,0x00,0xff,0xff]
7309 #CHECK: tmlh %r15, 0 # encoding: [0xa7,0xf0,0x00,0x00]
7310
7311 tmlh %r0, 0
7312 tmlh %r0, 0x8000
7313 tmlh %r0, 0xffff
7314 tmlh %r15, 0
7315
7316 #CHECK: tmll %r0, 0 # encoding: [0xa7,0x01,0x00,0x00]
7317 #CHECK: tmll %r0, 32768 # encoding: [0xa7,0x01,0x80,0x00]
7318 #CHECK: tmll %r0, 65535 # encoding: [0xa7,0x01,0xff,0xff]
7319 #CHECK: tmll %r15, 0 # encoding: [0xa7,0xf1,0x00,0x00]
7320
7321 tmll %r0, 0
7322 tmll %r0, 0x8000
7323 tmll %r0, 0xffff
7324 tmll %r15, 0
7325
72867326 #CHECK: x %r0, 0 # encoding: [0x57,0x00,0x00,0x00]
72877327 #CHECK: x %r0, 4095 # encoding: [0x57,0x00,0x0f,0xff]
72887328 #CHECK: x %r0, 0(%r1) # encoding: [0x57,0x00,0x10,0x00]