llvm.org GIT mirror llvm / 46aa7fb
[x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remove HasREPPrefix support from disassembler table generator since its now only used by CodeGenOnly instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201767 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 5 years ago
4 changed file(s) with 3 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
157157 class XOP8 { Map OpMap = XOP8; Prefix OpPrefix = PS; }
158158 class XOP9 { Map OpMap = XOP9; Prefix OpPrefix = PS; }
159159 class XOPA { Map OpMap = XOPA; Prefix OpPrefix = PS; }
160 class OBXS { Prefix OpPrefix = XS; }
160161 class PS : TB { Prefix OpPrefix = PS; }
161162 class PD : TB { Prefix OpPrefix = PD; }
162163 class XD : TB { Prefix OpPrefix = XD; }
37273727 // was introduced with SSE2, it's backward compatible.
37283728 def PAUSE : I<0x90, RawFrm, (outs), (ins),
37293729 "pause", [(int_x86_sse2_pause)], IIC_SSE_PAUSE>,
3730 REP, Requires<[HasSSE2]>;
3730 OBXS, Requires<[HasSSE2]>;
37313731
37323732 // Load, store, and memory fence
37333733 def SFENCE : I<0xAE, MRM_F8, (outs), (ins),
202202 HasEVEX_K = Rec->getValueAsBit("hasEVEX_K");
203203 HasEVEX_KZ = Rec->getValueAsBit("hasEVEX_Z");
204204 HasEVEX_B = Rec->getValueAsBit("hasEVEX_B");
205 HasREPPrefix = Rec->getValueAsBit("hasREPPrefix");
206205 IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly");
207206 ForceDisassemble = Rec->getValueAsBit("ForceDisassemble");
208207
432431 insnContext = IC_ADSIZE;
433432 else if (OpPrefix == X86Local::XD)
434433 insnContext = IC_XD;
435 else if (OpPrefix == X86Local::XS || HasREPPrefix)
434 else if (OpPrefix == X86Local::XS)
436435 insnContext = IC_XS;
437436 else
438437 insnContext = IC;
7373 bool HasEVEX_KZ;
7474 /// The hasEVEX_B field from the record
7575 bool HasEVEX_B;
76 /// The hasREPPrefix field from the record
77 bool HasREPPrefix;
7876 /// The isCodeGenOnly field from the record
7977 bool IsCodeGenOnly;
8078 /// The ForceDisassemble field from the record