llvm.org GIT mirror llvm / 46812d9
Merge r329771, fixing $regname to be %regname. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@332937 91177308-0d34-0410-b5e6-96231b3b80d8 Chandler Carruth 1 year, 5 months ago
2 changed file(s) with 24 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
726726 if (!CondReg)
727727 CondReg = promoteCondToReg(TestMBB, TestPos, TestLoc, Cond);
728728
729 // Rewriting this is trivial: we just replace the register and remove the
730 // setcc.
731 MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
729 // Rewriting a register def is trivial: we just replace the register and
730 // remove the setcc.
731 if (!SetCCI.mayStore()) {
732 assert(SetCCI.getOperand(0).isReg() &&
733 "Cannot have a non-register defined operand to SETcc!");
734 MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
735 SetCCI.eraseFromParent();
736 return;
737 }
738
739 // Otherwise, we need to emit a store.
740 auto MIB = BuildMI(*SetCCI.getParent(), SetCCI.getIterator(),
741 SetCCI.getDebugLoc(), TII->get(X86::MOV8mr));
742 // Copy the address operands.
743 for (int i = 0; i < X86::AddrNumOperands; ++i)
744 MIB.add(SetCCI.getOperand(i));
745
746 MIB.addReg(CondReg);
747
748 MIB->setMemRefs(SetCCI.memoperands_begin(), SetCCI.memoperands_end());
749
732750 SetCCI.eraseFromParent();
733 }
751 return;
752 }
207207 %3:gr8 = SETAr implicit %eflags
208208 %4:gr8 = SETBr implicit %eflags
209209 %5:gr8 = SETEr implicit %eflags
210 %6:gr8 = SETNEr implicit killed %eflags
210 SETNEm %rsp, 1, %noreg, -16, %noreg, implicit killed %eflags
211211 MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %3
212212 MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %4
213213 MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %5
214 MOV8mr %rsp, 1, %noreg, -16, %noreg, killed %6
215214 ; CHECK-NOT: %eflags =
216215 ; CHECK-NOT: = SET{{.*}}
217216 ; CHECK: MOV8mr {{.*}}, killed %[[A_REG]]