llvm.org GIT mirror llvm / 445a12e
AMDGPU: Add testcases Make sure we are testing moving users of the moved and split SMRD loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248738 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 4 years ago
1 changed file(s) with 119 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
8686 ret void
8787 }
8888
89 ; GCN-LABEL: {{^}}smrd_valu2_salu_user:
90 ; GCN: buffer_load_dword [[MOVED:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16{{$}}
91 ; GCN: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, s{{[0-9]+}}, [[MOVED]]
92 ; GCN: buffer_store_dword [[ADD]]
93 define void @smrd_valu2_salu_user(i32 addrspace(1)* %out, [8 x i32] addrspace(2)* %in, i32 %a) #1 {
94 entry:
95 %tmp = call i32 @llvm.r600.read.tidig.x() #0
96 %tmp1 = add i32 %tmp, 4
97 %tmp2 = getelementptr [8 x i32], [8 x i32] addrspace(2)* %in, i32 %tmp, i32 4
98 %tmp3 = load i32, i32 addrspace(2)* %tmp2
99 %tmp4 = add i32 %tmp3, %a
100 store i32 %tmp4, i32 addrspace(1)* %out
101 ret void
102 }
103
89104 ; GCN-LABEL: {{^}}smrd_valu2_max_smrd_offset:
90105 ; GCN: buffer_load_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:1020{{$}}
91106 define void @smrd_valu2_max_smrd_offset(i32 addrspace(1)* %out, [1024 x i32] addrspace(2)* %in) #1 {
127142 ret void
128143 }
129144
145 ; GCN-LABEL: {{^}}s_load_imm_v8i32_salu_user:
146 ; GCN: buffer_load_dwordx4
147 ; GCN: buffer_load_dwordx4
148 ; GCN: v_add_i32_e32
149 ; GCN: v_add_i32_e32
150 ; GCN: v_add_i32_e32
151 ; GCN: v_add_i32_e32
152 ; GCN: v_add_i32_e32
153 ; GCN: v_add_i32_e32
154 ; GCN: v_add_i32_e32
155 ; GCN: buffer_store_dword
156 define void @s_load_imm_v8i32_salu_user(i32 addrspace(1)* %out, i32 addrspace(2)* nocapture readonly %in) #1 {
157 entry:
158 %tmp0 = tail call i32 @llvm.r600.read.tidig.x()
159 %tmp1 = getelementptr inbounds i32, i32 addrspace(2)* %in, i32 %tmp0
160 %tmp2 = bitcast i32 addrspace(2)* %tmp1 to <8 x i32> addrspace(2)*
161 %tmp3 = load <8 x i32>, <8 x i32> addrspace(2)* %tmp2, align 4
162
163 %elt0 = extractelement <8 x i32> %tmp3, i32 0
164 %elt1 = extractelement <8 x i32> %tmp3, i32 1
165 %elt2 = extractelement <8 x i32> %tmp3, i32 2
166 %elt3 = extractelement <8 x i32> %tmp3, i32 3
167 %elt4 = extractelement <8 x i32> %tmp3, i32 4
168 %elt5 = extractelement <8 x i32> %tmp3, i32 5
169 %elt6 = extractelement <8 x i32> %tmp3, i32 6
170 %elt7 = extractelement <8 x i32> %tmp3, i32 7
171
172 %add0 = add i32 %elt0, %elt1
173 %add1 = add i32 %add0, %elt2
174 %add2 = add i32 %add1, %elt3
175 %add3 = add i32 %add2, %elt4
176 %add4 = add i32 %add3, %elt5
177 %add5 = add i32 %add4, %elt6
178 %add6 = add i32 %add5, %elt7
179
180 store i32 %add6, i32 addrspace(1)* %out
181 ret void
182 }
183
130184 ; GCN-LABEL: {{^}}s_load_imm_v16i32:
131185 ; GCN: buffer_load_dwordx4
132186 ; GCN: buffer_load_dwordx4
142196 ret void
143197 }
144198
199 ; GCN-LABEL: {{^}}s_load_imm_v16i32_salu_user:
200 ; GCN: buffer_load_dwordx4
201 ; GCN: buffer_load_dwordx4
202 ; GCN: buffer_load_dwordx4
203 ; GCN: buffer_load_dwordx4
204 ; GCN: v_add_i32_e32
205 ; GCN: v_add_i32_e32
206 ; GCN: v_add_i32_e32
207 ; GCN: v_add_i32_e32
208 ; GCN: v_add_i32_e32
209 ; GCN: v_add_i32_e32
210 ; GCN: v_add_i32_e32
211 ; GCN: v_add_i32_e32
212 ; GCN: v_add_i32_e32
213 ; GCN: v_add_i32_e32
214 ; GCN: v_add_i32_e32
215 ; GCN: v_add_i32_e32
216 ; GCN: v_add_i32_e32
217 ; GCN: v_add_i32_e32
218 ; GCN: v_add_i32_e32
219 ; GCN: buffer_store_dword
220 define void @s_load_imm_v16i32_salu_user(i32 addrspace(1)* %out, i32 addrspace(2)* nocapture readonly %in) #1 {
221 entry:
222 %tmp0 = tail call i32 @llvm.r600.read.tidig.x() #1
223 %tmp1 = getelementptr inbounds i32, i32 addrspace(2)* %in, i32 %tmp0
224 %tmp2 = bitcast i32 addrspace(2)* %tmp1 to <16 x i32> addrspace(2)*
225 %tmp3 = load <16 x i32>, <16 x i32> addrspace(2)* %tmp2, align 4
226
227 %elt0 = extractelement <16 x i32> %tmp3, i32 0
228 %elt1 = extractelement <16 x i32> %tmp3, i32 1
229 %elt2 = extractelement <16 x i32> %tmp3, i32 2
230 %elt3 = extractelement <16 x i32> %tmp3, i32 3
231 %elt4 = extractelement <16 x i32> %tmp3, i32 4
232 %elt5 = extractelement <16 x i32> %tmp3, i32 5
233 %elt6 = extractelement <16 x i32> %tmp3, i32 6
234 %elt7 = extractelement <16 x i32> %tmp3, i32 7
235 %elt8 = extractelement <16 x i32> %tmp3, i32 8
236 %elt9 = extractelement <16 x i32> %tmp3, i32 9
237 %elt10 = extractelement <16 x i32> %tmp3, i32 10
238 %elt11 = extractelement <16 x i32> %tmp3, i32 11
239 %elt12 = extractelement <16 x i32> %tmp3, i32 12
240 %elt13 = extractelement <16 x i32> %tmp3, i32 13
241 %elt14 = extractelement <16 x i32> %tmp3, i32 14
242 %elt15 = extractelement <16 x i32> %tmp3, i32 15
243
244 %add0 = add i32 %elt0, %elt1
245 %add1 = add i32 %add0, %elt2
246 %add2 = add i32 %add1, %elt3
247 %add3 = add i32 %add2, %elt4
248 %add4 = add i32 %add3, %elt5
249 %add5 = add i32 %add4, %elt6
250 %add6 = add i32 %add5, %elt7
251 %add7 = add i32 %add6, %elt8
252 %add8 = add i32 %add7, %elt9
253 %add9 = add i32 %add8, %elt10
254 %add10 = add i32 %add9, %elt11
255 %add11 = add i32 %add10, %elt12
256 %add12 = add i32 %add11, %elt13
257 %add13 = add i32 %add12, %elt14
258 %add14 = add i32 %add13, %elt15
259
260 store i32 %add14, i32 addrspace(1)* %out
261 ret void
262 }
263
145264 attributes #0 = { nounwind readnone }
146265 attributes #1 = { nounwind }