llvm.org GIT mirror llvm / 43600e9
Remove the TII::scheduleTwoAddrSource() hook. It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161794 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 8 years ago
4 changed file(s) with 0 addition(s) and 66 deletion(s). Raw diff Collapse all Expand all
186186 unsigned DestReg, unsigned SubIdx,
187187 const MachineInstr *Orig,
188188 const TargetRegisterInfo &TRI) const = 0;
189
190 /// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the
191 /// two-addrss instruction inserted by two-address pass.
192 virtual void scheduleTwoAddrSource(MachineInstr *SrcMI,
193 MachineInstr *UseMI,
194 const TargetRegisterInfo &TRI) const {
195 // Do nothing.
196 }
197189
198190 /// duplicate - Create a duplicate of the Orig instruction in MF. This is like
199191 /// MachineFunction::CloneMachineInstr(), but the target may update operands
13511351 }
13521352 }
13531353 }
1354
1355 // We didn't change anything if there was a single tied pair, and that
1356 // pair didn't require copies.
1357 if (AllUsesCopied || TiedPairs.size() > 1) {
1358 // Schedule the source copy / remat inserted to form two-address
1359 // instruction. FIXME: Does it matter the distance map may not be
1360 // accurate after it's scheduled?
1361 MachineBasicBlock::iterator PrevMI = MI;
1362 --PrevMI;
1363 TII->scheduleTwoAddrSource(PrevMI, MI, *TRI);
1364 }
13651354 }
13661355
13671356 /// runOnMachineFunction - Reduce two-address instructions to two operands.
562562 return Offset == 0;
563563 }
564564
565 /// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the
566 /// two-addrss instruction inserted by two-address pass.
567 void
568 Thumb2InstrInfo::scheduleTwoAddrSource(MachineInstr *SrcMI,
569 MachineInstr *UseMI,
570 const TargetRegisterInfo &TRI) const {
571 if (SrcMI->getOpcode() != ARM::tMOVr || SrcMI->getOperand(1).isKill())
572 return;
573
574 unsigned PredReg = 0;
575 ARMCC::CondCodes CC = getInstrPredicate(UseMI, PredReg);
576 if (CC == ARMCC::AL || PredReg != ARM::CPSR)
577 return;
578
579 // Schedule the copy so it doesn't come between previous instructions
580 // and UseMI which can form an IT block.
581 unsigned SrcReg = SrcMI->getOperand(1).getReg();
582 ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC);
583 MachineBasicBlock *MBB = UseMI->getParent();
584 MachineBasicBlock::iterator MBBI = SrcMI;
585 unsigned NumInsts = 0;
586 while (--MBBI != MBB->begin()) {
587 if (MBBI->isDebugValue())
588 continue;
589
590 MachineInstr *NMI = &*MBBI;
591 ARMCC::CondCodes NCC = getInstrPredicate(NMI, PredReg);
592 if (!(NCC == CC || NCC == OCC) ||
593 NMI->modifiesRegister(SrcReg, &TRI) ||
594 NMI->modifiesRegister(ARM::CPSR, &TRI))
595 break;
596 if (++NumInsts == 4)
597 // Too many in a row!
598 return;
599 }
600
601 if (NumInsts) {
602 MBB->remove(SrcMI);
603 MBB->insert(++MBBI, SrcMI);
604 }
605 }
606
607565 ARMCC::CondCodes
608566 llvm::getITInstrPredicate(const MachineInstr *MI, unsigned &PredReg) {
609567 unsigned Opc = MI->getOpcode();
5656 const TargetRegisterClass *RC,
5757 const TargetRegisterInfo *TRI) const;
5858
59 /// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the
60 /// two-addrss instruction inserted by two-address pass.
61 void scheduleTwoAddrSource(MachineInstr *SrcMI, MachineInstr *UseMI,
62 const TargetRegisterInfo &TRI) const;
63
6459 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
6560 /// such, whenever a client has an instance of instruction info, it should
6661 /// always be able to get register info as well (through this method).