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AMDGPU: Fix splitting kill blocks with defs before kill git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275508 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 4 years ago
2 changed file(s) with 51 addition(s) and 13 deletion(s). Raw diff Collapse all Expand all
10901090 MachineBasicBlock *SplitBB
10911091 = MF->CreateMachineBasicBlock(BB->getBasicBlock());
10921092
1093 SmallSet SplitDefRegs;
1094 for (auto I = SplitPoint, E = BB->end(); I != E; ++I) {
1095 for (MachineOperand &Def : I->defs())
1096 SplitDefRegs.insert(Def.getReg());
1097 }
1098
10991093 // Fix the block phi references to point to the new block for the defs in the
11001094 // second piece of the block.
11011095 for (MachineBasicBlock *Succ : BB->successors()) {
11031097 if (!MI.isPHI())
11041098 break;
11051099
1106 for (unsigned I = 1, E = MI.getNumOperands(); I != E; I += 2) {
1107 unsigned IncomingReg = MI.getOperand(I).getReg();
1108 MachineOperand &FromBB = MI.getOperand(I + 1);
1100 for (unsigned I = 2, E = MI.getNumOperands(); I != E; I += 2) {
1101 MachineOperand &FromBB = MI.getOperand(I);
11091102 if (BB == FromBB.getMBB()) {
1110 if (SplitDefRegs.count(IncomingReg))
1111 FromBB.setMBB(SplitBB);
1112
1103 FromBB.setMBB(SplitBB);
11131104 break;
11141105 }
11151106 }
11181109
11191110 MF->insert(++MachineFunction::iterator(BB), SplitBB);
11201111 SplitBB->splice(SplitBB->begin(), BB, SplitPoint, BB->end());
1121
11221112
11231113 SplitBB->transferSuccessors(BB);
11241114 BB->addSuccessor(SplitBB);
248248 ret void
249249 }
250250
251 ; bug 28550
252 ; CHECK-LABEL: {{^}}phi_use_def_before_kill:
253 ; CHECK: v_cndmask_b32_e64 [[PHIREG:v[0-9]+]], 0, -1.0,
254 ; CHECK: v_cmpx_le_f32_e32 vcc, 0,
255 ; CHECK-NEXT: s_cbranch_execnz [[BB4:BB[0-9]+_[0-9]+]]
256
257 ; CHECK: exp
258 ; CHECK-NEXT: s_endpgm
259
260 ; CHECK: [[KILLBB:BB[0-9]+_[0-9]+]]:
261 ; CHECK: s_and_b64 vcc, exec,
262 ; CHECK-NEXT: s_cbranch_vccz [[PHIBB:BB[0-9]+_[0-9]+]]
263
264 ; CHECK: [[PHIBB]]:
265 ; CHECK: v_cmp_eq_f32_e32 vcc, 0, [[PHIREG]]
266 ; CHECK: s_and_b64 vcc, exec, vcc
267 ; CHECK: s_cbranch_vccz [[ENDBB:BB[0-9]+_[0-9]+]]
268
269 ; CHECK: ; BB#3: ; %bb10
270 ; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 9
271 ; CHECK: buffer_store_dword
272
273 ; CHECK: [[ENDBB]]:
274 ; CHECK-NEXT: s_endpgm
275 define amdgpu_ps void @phi_use_def_before_kill() #0 {
276 bb:
277 %tmp = fadd float undef, 1.000000e+00
278 %tmp1 = fcmp olt float 0.000000e+00, %tmp
279 %tmp2 = select i1 %tmp1, float -1.000000e+00, float 0.000000e+00
280 call void @llvm.AMDGPU.kill(float %tmp2)
281 br i1 undef, label %phibb, label %bb8
282
283 phibb:
284 %tmp5 = phi float [ %tmp2, %bb ], [ 4.0, %bb8 ]
285 %tmp6 = fcmp oeq float %tmp5, 0.000000e+00
286 br i1 %tmp6, label %bb10, label %end
287
288 bb8:
289 store volatile i32 8, i32 addrspace(1)* undef
290 br label %phibb
291
292 bb10:
293 store volatile i32 9, i32 addrspace(1)* undef
294 br label %end
295
296 end:
297 ret void
298 }
251299
252300 declare void @llvm.AMDGPU.kill(float) #0
253301