llvm.org GIT mirror llvm / 434dd4f
Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8 Bruno Cardoso Lopes 11 years ago
9 changed file(s) with 211 addition(s) and 202 deletion(s). Raw diff Collapse all Expand all
5050 class JIT : public ExecutionEngine {
5151 TargetMachine &TM; // The current target we are compiling to
5252 TargetJITInfo &TJI; // The JITInfo for the target we are compiling to
53 JITCodeEmitter *JCE; // JCE object
53 JITCodeEmitter *JCE; // JCE object
5454
5555 JITState *jitstate;
5656
9797 FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
9898 MachineCodeEmitter &MCE);
9999
100 FunctionPass *createARMCodeEmitterPass(
101 ARMTargetMachine &TM, MachineCodeEmitter &MCE);
102 /*
103 template< class machineCodeEmitter>
104 FunctionPass *createARMCodeEmitterPass(
105 ARMTargetMachine &TM, machineCodeEmitter &MCE);
106 */
107 FunctionPass *createARMJITCodeEmitterPass(
108 ARMTargetMachine &TM, JITCodeEmitter &JCE);
100 FunctionPass *createARMCodeEmitterPass( ARMTargetMachine &TM,
101 MachineCodeEmitter &MCE);
102 FunctionPass *createARMJITCodeEmitterPass( ARMTargetMachine &TM,
103 JITCodeEmitter &JCE);
109104
110105 FunctionPass *createARMLoadStoreOptimizationPass();
111106 FunctionPass *createARMConstantIslandPass();
4444
4545 class ARMCodeEmitter {
4646 public:
47
4847 /// getBinaryCodeForInstr - This function, generated by the
4948 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
5049 /// machine instructions.
51
5250 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
5351 };
5452
55 template< class machineCodeEmitter>
56 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
57 public ARMCodeEmitter
58 {
53 template
54 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
55 public ARMCodeEmitter {
5956 ARMJITInfo *JTI;
6057 const ARMInstrInfo *II;
6158 const TargetData *TD;
6259 TargetMachine &TM;
63 machineCodeEmitter &MCE;
60 CodeEmitter &MCE;
6461 const std::vector *MCPEs;
6562 const std::vector *MJTEs;
6663 bool IsPIC;
6764
6865 public:
6966 static char ID;
70 explicit Emitter(TargetMachine &tm, machineCodeEmitter &mce)
67 explicit Emitter(TargetMachine &tm, CodeEmitter &mce)
7168 : MachineFunctionPass(&ID), JTI(0), II(0), TD(0), TM(tm),
7269 MCE(mce), MCPEs(0), MJTEs(0),
7370 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
74 Emitter(TargetMachine &tm, machineCodeEmitter &mce,
71 Emitter(TargetMachine &tm, CodeEmitter &mce,
7572 const ARMInstrInfo &ii, const TargetData &td)
7673 : MachineFunctionPass(&ID), JTI(0), II(&ii), TD(&td), TM(tm),
7774 MCE(mce), MCPEs(0), MJTEs(0),
169166 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc,
170167 intptr_t JTBase = 0);
171168 };
172 template
173 char Emitter::ID = 0;
169 template
170 char Emitter::ID = 0;
174171 }
175172
176173 /// createARMCodeEmitterPass - Return a pass that emits the collected ARM code
177174 /// to the specified MCE object.
178175
179176 namespace llvm {
180
181 FunctionPass *createARMCodeEmitterPass(
182 ARMTargetMachine &TM, MachineCodeEmitter &MCE)
183 {
177
178 FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
179 MachineCodeEmitter &MCE) {
184180 return new Emitter(TM, MCE);
185181 }
186 FunctionPass *createARMJITCodeEmitterPass(
187 ARMTargetMachine &TM, JITCodeEmitter &JCE)
188 {
182 FunctionPass *createARMJITCodeEmitterPass(ARMTargetMachine &TM,
183 JITCodeEmitter &JCE) {
189184 return new Emitter(TM, JCE);
190185 }
191186
192187 } // end namespace llvm
193188
194 template< class machineCodeEmitter>
195 bool Emitter< machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
189 template
190 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
196191 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
197192 MF.getTarget().getRelocationModel() != Reloc::Static) &&
198193 "JIT relocation model must be set to static or default!");
221216
222217 /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
223218 ///
224 template< class machineCodeEmitter>
225 unsigned Emitter< machineCodeEmitter>::getShiftOp(unsigned Imm) const {
219 template
220 unsigned Emitter::getShiftOp(unsigned Imm) const {
226221 switch (ARM_AM::getAM2ShiftOpc(Imm)) {
227222 default: assert(0 && "Unknown shift opc!");
228223 case ARM_AM::asr: return 2;
236231
237232 /// getMachineOpValue - Return binary encoding of operand. If the machine
238233 /// operand requires relocation, record the relocation and return zero.
239 template< class machineCodeEmitter>
240 unsigned Emitter< machineCodeEmitter>::getMachineOpValue(const MachineInstr &MI,
241 const MachineOperand &MO) {
234 template
235 unsigned Emitter::getMachineOpValue(const MachineInstr &MI,
236 const MachineOperand &MO) {
242237 if (MO.isReg())
243238 return ARMRegisterInfo::getRegisterNumbering(MO.getReg());
244239 else if (MO.isImm())
266261
267262 /// emitGlobalAddress - Emit the specified address to the code stream.
268263 ///
269 template< class machineCodeEmitter>
270 void Emitter< machineCodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
271 bool NeedStub, intptr_t ACPV) {
272 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
273 Reloc, GV, ACPV, NeedStub));
264 template
265 void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
266 bool NeedStub, intptr_t ACPV) {
267 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
268 GV, ACPV, NeedStub));
274269 }
275270
276271 /// emitExternalSymbolAddress - Arrange for the address of an external symbol to
277272 /// be emitted to the current location in the function, and allow it to be PC
278273 /// relative.
279 template< class machineCodeEmitter>
280 void Emitter< machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
274 template
275 void Emitter::emitExternalSymbolAddress(const char *ES,
276 unsigned Reloc) {
281277 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
282278 Reloc, ES));
283279 }
285281 /// emitConstPoolAddress - Arrange for the address of an constant pool
286282 /// to be emitted to the current location in the function, and allow it to be PC
287283 /// relative.
288 template< class machineCodeEmitter>
289 void Emitter< machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned Reloc) {
284 template
285 void Emitter::emitConstPoolAddress(unsigned CPI,
286 unsigned Reloc) {
290287 // Tell JIT emitter we'll resolve the address.
291288 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
292289 Reloc, CPI, 0, true));
295292 /// emitJumpTableAddress - Arrange for the address of a jump table to
296293 /// be emitted to the current location in the function, and allow it to be PC
297294 /// relative.
298 template< class machineCodeEmitter>
299 void Emitter< machineCodeEmitter>::emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) {
295 template
296 void Emitter::emitJumpTableAddress(unsigned JTIndex,
297 unsigned Reloc) {
300298 MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
301299 Reloc, JTIndex, 0, true));
302300 }
303301
304302 /// emitMachineBasicBlock - Emit the specified address basic block.
305 template< class machineCodeEmitter>
306 void Emitter< machineCodeEmitter>::emitMachineBasicBlock(MachineBasicBlock *BB,
307 unsigned Reloc, intptr_t JTBase) {
303 template
304 void Emitter::emitMachineBasicBlock(MachineBasicBlock *BB,
305 unsigned Reloc, intptr_t JTBase) {
308306 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
309307 Reloc, BB, JTBase));
310308 }
311309
312 template< class machineCodeEmitter>
313 void Emitter< machineCodeEmitter>::emitWordLE(unsigned Binary) {
310 template
311 void Emitter::emitWordLE(unsigned Binary) {
314312 #ifndef NDEBUG
315313 DOUT << " 0x" << std::hex << std::setw(8) << std::setfill('0')
316314 << Binary << std::dec << "\n";
318316 MCE.emitWordLE(Binary);
319317 }
320318
321 template< class machineCodeEmitter>
322 void Emitter< machineCodeEmitter>::emitDWordLE(uint64_t Binary) {
319 template
320 void Emitter::emitDWordLE(uint64_t Binary) {
323321 #ifndef NDEBUG
324322 DOUT << " 0x" << std::hex << std::setw(8) << std::setfill('0')
325323 << (unsigned)Binary << std::dec << "\n";
329327 MCE.emitDWordLE(Binary);
330328 }
331329
332 template< class machineCodeEmitter>
333 void Emitter< machineCodeEmitter>::emitInstruction(const MachineInstr &MI) {
330 template
331 void Emitter::emitInstruction(const MachineInstr &MI) {
334332 DOUT << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI;
335333
336334 NumEmitted++; // Keep track of the # of mi's emitted
396394 }
397395 }
398396
399 template< class machineCodeEmitter>
400 void Emitter< machineCodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) {
397 template
398 void Emitter::emitConstPoolInstruction(const MachineInstr &MI) {
401399 unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index.
402400 unsigned CPIndex = MI.getOperand(1).getIndex(); // Actual cp entry index.
403401 const MachineConstantPoolEntry &MCPE = (*MCPEs)[CPIndex];
464462 }
465463 }
466464
467 template< class machineCodeEmitter>
468 void Emitter< machineCodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr &MI) {
465 template
466 void Emitter::emitMOVi2piecesInstruction(const MachineInstr &MI) {
469467 const MachineOperand &MO0 = MI.getOperand(0);
470468 const MachineOperand &MO1 = MI.getOperand(1);
471469 assert(MO1.isImm() && "Not a valid so_imm value!");
506504 emitWordLE(Binary);
507505 }
508506
509 template< class machineCodeEmitter>
510 void Emitter< machineCodeEmitter>::emitLEApcrelJTInstruction(const MachineInstr &MI) {
507 template
508 void Emitter::emitLEApcrelJTInstruction(const MachineInstr &MI) {
511509 // It's basically add r, pc, (LJTI - $+8)
512510
513511 const TargetInstrDesc &TID = MI.getDesc();
535533 emitWordLE(Binary);
536534 }
537535
538 template< class machineCodeEmitter>
539 void Emitter< machineCodeEmitter>::emitPseudoMoveInstruction(const MachineInstr &MI) {
536 template
537 void Emitter::emitPseudoMoveInstruction(const MachineInstr &MI) {
540538 unsigned Opcode = MI.getDesc().Opcode;
541539
542540 // Part of binary is determined by TableGn.
575573 emitWordLE(Binary);
576574 }
577575
578 template< class machineCodeEmitter>
579 void Emitter< machineCodeEmitter>::addPCLabel(unsigned LabelID) {
576 template
577 void Emitter::addPCLabel(unsigned LabelID) {
580578 DOUT << " ** LPC" << LabelID << " @ "
581579 << (void*)MCE.getCurrentPCValue() << '\n';
582580 JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
583581 }
584582
585 template< class machineCodeEmitter>
586 void Emitter< machineCodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
583 template
584 void Emitter::emitPseudoInstruction(const MachineInstr &MI) {
587585 unsigned Opcode = MI.getDesc().Opcode;
588586 switch (Opcode) {
589587 default:
652650 }
653651 }
654652
655 template< class machineCodeEmitter>
656 unsigned Emitter< machineCodeEmitter>::getMachineSoRegOpValue(const MachineInstr &MI,
653 template
654 unsigned Emitter::getMachineSoRegOpValue(
655 const MachineInstr &MI,
657656 const TargetInstrDesc &TID,
658657 const MachineOperand &MO,
659658 unsigned OpIdx) {
711710 return Binary | ARM_AM::getSORegOffset(MO2.getImm()) << 7;
712711 }
713712
714 template< class machineCodeEmitter>
715 unsigned Emitter< machineCodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
713 template
714 unsigned Emitter::getMachineSoImmOpValue(unsigned SoImm) {
716715 // Encode rotate_imm.
717716 unsigned Binary = (ARM_AM::getSOImmValRot(SoImm) >> 1)
718717 << ARMII::SoRotImmShift;
722721 return Binary;
723722 }
724723
725 template< class machineCodeEmitter>
726 unsigned Emitter< machineCodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
727 const TargetInstrDesc &TID) const {
724 template
725 unsigned Emitter::getAddrModeSBit(const MachineInstr &MI,
726 const TargetInstrDesc &TID) const {
728727 for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){
729728 const MachineOperand &MO = MI.getOperand(i-1);
730729 if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)
733732 return 0;
734733 }
735734
736 template< class machineCodeEmitter>
737 void Emitter< machineCodeEmitter>::emitDataProcessingInstruction(const MachineInstr &MI,
735 template
736 void Emitter::emitDataProcessingInstruction(
737 const MachineInstr &MI,
738738 unsigned ImplicitRd,
739739 unsigned ImplicitRn) {
740740 const TargetInstrDesc &TID = MI.getDesc();
797797 emitWordLE(Binary);
798798 }
799799
800 template< class machineCodeEmitter>
801 void Emitter< machineCodeEmitter>::emitLoadStoreInstruction(const MachineInstr &MI,
800 template
801 void Emitter::emitLoadStoreInstruction(
802 const MachineInstr &MI,
802803 unsigned ImplicitRd,
803804 unsigned ImplicitRn) {
804805 const TargetInstrDesc &TID = MI.getDesc();
872873 emitWordLE(Binary);
873874 }
874875
875 template< class machineCodeEmitter>
876 void Emitter< machineCodeEmitter>::emitMiscLoadStoreInstruction(const MachineInstr &MI,
877 unsigned ImplicitRn) {
876 template
877 void Emitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
878 unsigned ImplicitRn) {
878879 const TargetInstrDesc &TID = MI.getDesc();
879880 unsigned Form = TID.TSFlags & ARMII::FormMask;
880881 bool IsPrePost = (TID.TSFlags & ARMII::IndexModeMask) != 0;
956957 return Binary;
957958 }
958959
959 template< class machineCodeEmitter>
960 void Emitter< machineCodeEmitter>::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
960 template
961 void Emitter::emitLoadStoreMultipleInstruction(
962 const MachineInstr &MI) {
961963 // Part of binary is determined by TableGn.
962964 unsigned Binary = getBinaryCodeForInstr(MI);
963965
989991 emitWordLE(Binary);
990992 }
991993
992 template< class machineCodeEmitter>
993 void Emitter< machineCodeEmitter>::emitMulFrmInstruction(const MachineInstr &MI) {
994 template
995 void Emitter::emitMulFrmInstruction(const MachineInstr &MI) {
994996 const TargetInstrDesc &TID = MI.getDesc();
995997
996998 // Part of binary is determined by TableGn.
10271029 emitWordLE(Binary);
10281030 }
10291031
1030 template< class machineCodeEmitter>
1031 void Emitter< machineCodeEmitter>::emitExtendInstruction(const MachineInstr &MI) {
1032 template
1033 void Emitter::emitExtendInstruction(const MachineInstr &MI) {
10321034 const TargetInstrDesc &TID = MI.getDesc();
10331035
10341036 // Part of binary is determined by TableGn.
10651067 emitWordLE(Binary);
10661068 }
10671069
1068 template< class machineCodeEmitter>
1069 void Emitter< machineCodeEmitter>::emitMiscArithInstruction(const MachineInstr &MI) {
1070 template
1071 void Emitter::emitMiscArithInstruction(const MachineInstr &MI) {
10701072 const TargetInstrDesc &TID = MI.getDesc();
10711073
10721074 // Part of binary is determined by TableGn.
11041106 emitWordLE(Binary);
11051107 }
11061108
1107 template< class machineCodeEmitter>
1108 void Emitter< machineCodeEmitter>::emitBranchInstruction(const MachineInstr &MI) {
1109 template
1110 void Emitter::emitBranchInstruction(const MachineInstr &MI) {
11091111 const TargetInstrDesc &TID = MI.getDesc();
11101112
11111113 if (TID.Opcode == ARM::TPsoft)
11231125 emitWordLE(Binary);
11241126 }
11251127
1126 template< class machineCodeEmitter>
1127 void Emitter< machineCodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
1128 template
1129 void Emitter::emitInlineJumpTable(unsigned JTIndex) {
11281130 // Remember the base address of the inline jump table.
11291131 uintptr_t JTBase = MCE.getCurrentPCValue();
11301132 JTI->addJumpTableBaseAddr(JTIndex, JTBase);
11431145 }
11441146 }
11451147
1146 template< class machineCodeEmitter>
1147 void Emitter< machineCodeEmitter>::emitMiscBranchInstruction(const MachineInstr &MI) {
1148 template
1149 void Emitter::emitMiscBranchInstruction(const MachineInstr &MI) {
11481150 const TargetInstrDesc &TID = MI.getDesc();
11491151
11501152 // Handle jump tables.
12241226 return Binary;
12251227 }
12261228
1227 template< class machineCodeEmitter>
1228 void Emitter< machineCodeEmitter>::emitVFPArithInstruction(const MachineInstr &MI) {
1229 template
1230 void Emitter::emitVFPArithInstruction(const MachineInstr &MI) {
12291231 const TargetInstrDesc &TID = MI.getDesc();
12301232
12311233 // Part of binary is determined by TableGn.
12641266 emitWordLE(Binary);
12651267 }
12661268
1267 template< class machineCodeEmitter>
1268 void Emitter< machineCodeEmitter>::emitVFPConversionInstruction(const MachineInstr &MI) {
1269 template
1270 void Emitter::emitVFPConversionInstruction(
1271 const MachineInstr &MI) {
12691272 const TargetInstrDesc &TID = MI.getDesc();
12701273 unsigned Form = TID.TSFlags & ARMII::FormMask;
12711274
13211324 emitWordLE(Binary);
13221325 }
13231326
1324 template< class machineCodeEmitter>
1325 void Emitter< machineCodeEmitter>::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
1327 template
1328 void Emitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
13261329 // Part of binary is determined by TableGn.
13271330 unsigned Binary = getBinaryCodeForInstr(MI);
13281331
13561359 emitWordLE(Binary);
13571360 }
13581361
1359 template< class machineCodeEmitter>
1360 void Emitter< machineCodeEmitter>::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) {
1362 template
1363 void Emitter::emitVFPLoadStoreMultipleInstruction(
1364 const MachineInstr &MI) {
13611365 // Part of binary is determined by TableGn.
13621366 unsigned Binary = getBinaryCodeForInstr(MI);
13631367
13911395 emitWordLE(Binary);
13921396 }
13931397
1394 template< class machineCodeEmitter>
1395 void Emitter< machineCodeEmitter>::emitMiscInstruction(const MachineInstr &MI) {
1398 template
1399 void Emitter::emitMiscInstruction(const MachineInstr &MI) {
13961400 // Part of binary is determined by TableGn.
13971401 unsigned Binary = getBinaryCodeForInstr(MI);
13981402
3131 class AlphaCodeEmitter {
3232 MachineCodeEmitter &MCE;
3333 public:
34 AlphaCodeEmitter( MachineCodeEmitter &mce) : MCE(mce) {}
34 AlphaCodeEmitter(MachineCodeEmitter &mce) : MCE(mce) {}
3535
3636 /// getBinaryCodeForInstr - This function, generated by the
3737 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
4141
4242 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
4343
44 unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
44 unsigned getMachineOpValue(const MachineInstr &MI,
45 const MachineOperand &MO);
4546 };
4647
47 template machineCodeEmitter>
48 template CodeEmitter>
4849 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
4950 public AlphaCodeEmitter
5051 {
5152 const AlphaInstrInfo *II;
52 TargetMachine &TM;
53 machineCodeEmitter &MCE;
53 TargetMachine &TM;
54 CodeEmitter &MCE;
5455
5556 public:
5657 static char ID;
57 explicit Emitter(TargetMachine &tm, machineCodeEmitter &mce)
58 : MachineFunctionPass(&ID), AlphaCodeEmitter( mce),
58 explicit Emitter(TargetMachine &tm, CodeEmitter &mce)
59 : MachineFunctionPass(&ID), AlphaCodeEmitter(mce),
5960 II(0), TM(tm), MCE(mce) {}
60 Emitter(TargetMachine &tm, machineCodeEmitter &mce,
61 const AlphaInstrInfo& ii)
62 : MachineFunctionPass(&ID), AlphaCodeEmitter( mce),
61 Emitter(TargetMachine &tm, CodeEmitter &mce, const AlphaInstrInfo& ii)
62 : MachineFunctionPass(&ID), AlphaCodeEmitter(mce),
6363 II(&ii), TM(tm), MCE(mce) {}
6464
6565 bool runOnMachineFunction(MachineFunction &MF);
7474 void emitBasicBlock(MachineBasicBlock &MBB);
7575 };
7676
77 template
78 char Emitter::ID = 0;
79 }
80
81 /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
82 /// to the specified MCE object.
83
84 FunctionPass *llvm::createAlphaCodeEmitterPass( AlphaTargetMachine &TM,
77 template
78 char Emitter::ID = 0;
79 }
80
81 /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha
82 /// code to the specified MCE object.
83
84 FunctionPass *llvm::createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
8585 MachineCodeEmitter &MCE) {
8686 return new Emitter(TM, MCE);
8787 }
8888
89 FunctionPass *llvm::createAlphaJITCodeEmitterPass( AlphaTargetMachine &TM,
90 JITCodeEmitter &JCE) {
89 FunctionPass *llvm::createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
90 JITCodeEmitter &JCE) {
9191 return new Emitter(TM, JCE);
9292 }
9393
94 template
95 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
94 template
95 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
9696 II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
9797
9898 do {
104104 return false;
105105 }
106106
107 template
108 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
107 template
108 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
109109 MCE.StartMachineBasicBlock(&MBB);
110110 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
111111 I != E; ++I) {
164164 }
165165
166166 unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
167 const MachineOperand &MO) {
167 const MachineOperand &MO) {
168168
169169 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
170170 // or things that get fixed up later by the JIT.
2222 #include "llvm/CodeGen/MachineInstrBuilder.h"
2323 #include "llvm/CodeGen/MachineModuleInfo.h"
2424 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/Debug.h"
2626 #include "llvm/Support/Compiler.h"
2727 #include "llvm/Target/TargetOptions.h"
2828 using namespace llvm;
3232 TargetMachine &TM;
3333 MachineCodeEmitter &MCE;
3434 public:
35 PPCCodeEmitter( TargetMachine &tm, MachineCodeEmitter &mce) :
36 TM( tm), MCE( mce) {}
35 PPCCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce):
36 TM(tm), MCE(mce) {}
3737
3838 /// getBinaryCodeForInstr - This function, generated by the
3939 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
4343
4444 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
4545
46 unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
46 unsigned getMachineOpValue(const MachineInstr &MI,
47 const MachineOperand &MO);
4748
4849 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
4950 /// its address in the function into this pointer.
5152 void *MovePCtoLROffset;
5253 };
5354
54 template machineCodeEmitter>
55 template CodeEmitter>
5556 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
5657 public PPCCodeEmitter
5758 {
5859 TargetMachine &TM;
59 machineCodeEmitter &MCE;
60 CodeEmitter &MCE;
6061
6162 void getAnalysisUsage(AnalysisUsage &AU) const {
6263 AU.addRequired();
6566
6667 public:
6768 static char ID;
68 Emitter(TargetMachine &tm, machineCodeEmitter &mce)
69 : MachineFunctionPass(&ID), PPCCodeEmitter( tm, mce), TM(tm), MCE(mce) {}
69 Emitter(TargetMachine &tm, CodeEmitter &mce)
70 : MachineFunctionPass(&ID), PPCCodeEmitter(tm, mce), TM(tm), MCE(mce) {}
7071
7172 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
7273
8384 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
8485 };
8586
86 template
87 char Emitter::ID = 0;
87 template
88 char Emitter::ID = 0;
8889 }
8990
9091 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
9192 /// to the specified MCE object.
9293 FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
93 MachineCodeEmitter &MCE) {
94 MachineCodeEmitter &MCE) {
9495 return new Emitter(TM, MCE);
9596 }
9697
9798 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
98 JITCodeEmitter &JCE) {
99 JITCodeEmitter &JCE) {
99100 return new Emitter(TM, JCE);
100101 }
101102
102 template
103 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
103 template
104 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
104105 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
105106 MF.getTarget().getRelocationModel() != Reloc::Static) &&
106107 "JIT relocation model must be set to static or default!");
116117 return false;
117118 }
118119
119 template
120 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
120 template
121 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
121122 MCE.StartMachineBasicBlock(&MBB);
122123
123124 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
219219
220220 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
221221 CodeGenOpt::Level OptLevel,
222 bool DumpAsm, MachineCodeEmitter &MCE) {
222 bool DumpAsm,
223 MachineCodeEmitter &MCE) {
223224 // Machine code emitter pass for PowerPC.
224225 PM.add(createPPCCodeEmitterPass(*this, MCE));
225226 if (DumpAsm) {
233234
234235 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
235236 CodeGenOpt::Level OptLevel,
236 bool DumpAsm, JITCodeEmitter &JCE) {
237 bool DumpAsm,
238 JITCodeEmitter &JCE) {
237239 // Machine code emitter pass for PowerPC.
238240 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
239241 if (DumpAsm) {
2727 /// createX86ISelDag - This pass converts a legalized DAG into a
2828 /// X86-specific DAG, ready for instruction scheduling.
2929 ///
30 FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOpt::Level OptLevel);
30 FunctionPass *createX86ISelDag(X86TargetMachine &TM,
31 CodeGenOpt::Level OptLevel);
3132
3233 /// createX86FloatingPointStackifierPass - This function returns a pass which
3334 /// converts floating point register references and pseudo instructions into
5253 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
5354 /// to the specified MCE object.
5455
55 FunctionPass *createX86CodeEmitterPass(
56 X86TargetMachine &TM, MachineCodeEmitter &MCE);
57 FunctionPass *createX86JITCodeEmitterPass(
58 X86TargetMachine &TM, JITCodeEmitter &JCE);
56 FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
57 MachineCodeEmitter &MCE);
58 FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
59 JITCodeEmitter &JCE);
5960
6061 /// createX86EmitCodeToMemory - Returns a pass that converts a register
6162 /// allocated function into raw machine code in a dynamically
6364 ///
6465 FunctionPass *createEmitX86CodeToMemory();
6566
66 /// createX86MaxStackAlignmentCalculatorPass - This function returns a pass which
67 /// calculates maximal stack alignment required for function
67 /// createX86MaxStackAlignmentCalculatorPass - This function returns a pass
68 /// which calculates maximal stack alignment required for function
6869 ///
6970 FunctionPass *createX86MaxStackAlignmentCalculatorPass();
7071
3535 STATISTIC(NumEmitted, "Number of machine instructions emitted");
3636
3737 namespace {
38 template< class machineCodeEmitter>
38 template<class CodeEmitter>
3939 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass {
4040 const X86InstrInfo *II;
4141 const TargetData *TD;
4242 X86TargetMachine &TM;
43 machineCodeEmitter &MCE;
43 CodeEmitter &MCE;
4444 intptr_t PICBaseOffset;
4545 bool Is64BitMode;
4646 bool IsPIC;
4747 public:
4848 static char ID;
49 explicit Emitter(X86TargetMachine &tm, machineCodeEmitter &mce)
49 explicit Emitter(X86TargetMachine &tm, CodeEmitter &mce)
5050 : MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
5151 MCE(mce), PICBaseOffset(0), Is64BitMode(false),
5252 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
53 Emitter(X86TargetMachine &tm, machineCodeEmitter &mce,
53 Emitter(X86TargetMachine &tm, CodeEmitter &mce,
5454 const X86InstrInfo &ii, const TargetData &td, bool is64)
5555 : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
5656 MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
9898 bool gvNeedsNonLazyPtr(const GlobalValue *GV);
9999 };
100100
101 template< class machineCodeEmitter>
102 char Emitter::ID = 0;
101 template
102 char Emitter::ID = 0;
103103 }
104104
105105 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
107107
108108 namespace llvm {
109109
110 FunctionPass *createX86CodeEmitterPass(
111 X86TargetMachine &TM, MachineCodeEmitter &MCE)
112 {
110 FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
111 MachineCodeEmitter &MCE) {
113112 return new Emitter(TM, MCE);
114113 }
115 FunctionPass *createX86JITCodeEmitterPass(
116 X86TargetMachine &TM, JITCodeEmitter &JCE)
117 {
114 FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
115 JITCodeEmitter &JCE) {
118116 return new Emitter(TM, JCE);
119117 }
120118
121119 } // end namespace llvm
122120
123 template< class machineCodeEmitter>
124 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
121 template
122 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
125123
126124 MCE.setModuleInfo(&getAnalysis());
127125
155153 /// necessary to resolve the address of this block later and emits a dummy
156154 /// value.
157155 ///
158 template< class machineCodeEmitter>
159 void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
156 template
157 void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
160158 // Remember where this reference was and where it is to so we can
161159 // deal with it later.
162160 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
167165 /// emitGlobalAddress - Emit the specified address to the code stream assuming
168166 /// this is part of a "take the address of a global" instruction.
169167 ///
170 template< class machineCodeEmitter>
171 void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
168 template
169 void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
172170 intptr_t Disp /* = 0 */,
173171 intptr_t PCAdj /* = 0 */,
174172 bool NeedStub /* = false */,
194192 /// emitExternalSymbolAddress - Arrange for the address of an external symbol to
195193 /// be emitted to the current location in the function, and allow it to be PC
196194 /// relative.
197 template< class machineCodeEmitter>
198 void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
195 template
196 void Emitter::emitExternalSymbolAddress(const char *ES,
197 unsigned Reloc) {
199198 intptr_t RelocCST = (Reloc == X86::reloc_picrel_word) ? PICBaseOffset : 0;
200199 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
201200 Reloc, ES, RelocCST));
208207 /// emitConstPoolAddress - Arrange for the address of an constant pool
209208 /// to be emitted to the current location in the function, and allow it to be PC
210209 /// relative.
211 template< class machineCodeEmitter>
212 void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
210 template
211 void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
213212 intptr_t Disp /* = 0 */,
214213 intptr_t PCAdj /* = 0 */) {
215214 intptr_t RelocCST = 0;
229228 /// emitJumpTableAddress - Arrange for the address of a jump table to
230229 /// be emitted to the current location in the function, and allow it to be PC
231230 /// relative.
232 template< class machineCodeEmitter>
233 void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
231 template
232 void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
234233 intptr_t PCAdj /* = 0 */) {
235234 intptr_t RelocCST = 0;
236235 if (Reloc == X86::reloc_picrel_word)
246245 MCE.emitWordLE(0);
247246 }
248247
249 template< class machineCodeEmitter>
250 unsigned Emitter::getX86RegNum(unsigned RegNo) const {
248 template
249 unsigned Emitter::getX86RegNum(unsigned RegNo) const {
251250 return II->getRegisterInfo().getX86RegNum(RegNo);
252251 }
253252
257256 return RM | (RegOpcode << 3) | (Mod << 6);
258257 }
259258
260 template< class machineCodeEmitter>
261 void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
259 template
260 void Emitter::emitRegModRMByte(unsigned ModRMReg,
261 unsigned RegOpcodeFld){
262262 MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
263263 }
264264
265 template< class machineCodeEmitter>
266 void Emitter::emitRegModRMByte(unsigned RegOpcodeFld) {
265 template
266 void Emitter::emitRegModRMByte(unsigned RegOpcodeFld) {
267267 MCE.emitByte(ModRMByte(3, RegOpcodeFld, 0));
268268 }
269269
270 template< class machineCodeEmitter>
271 void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
270 template
271 void Emitter::emitSIBByte(unsigned SS,
272 unsigned Index,
273 unsigned Base) {
272274 // SIB byte is in the same format as the ModRMByte...
273275 MCE.emitByte(ModRMByte(SS, Index, Base));
274276 }
275277
276 template< class machineCodeEmitter>
277 void Emitter::emitConstant(uint64_t Val, unsigned Size) {
278 template
279 void Emitter::emitConstant(uint64_t Val, unsigned Size) {
278280 // Output the constant in little endian byte order...
279281 for (unsigned i = 0; i != Size; ++i) {
280282 MCE.emitByte(Val & 255);
288290 return Value == (signed char)Value;
289291 }
290292
291 template< class machineCodeEmitter>
292 bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
293 template
294 bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
293295 // For Darwin, simulate the linktime GOT by using the same non-lazy-pointer
294296 // mechanism as 32-bit mode.
295297 return (!Is64BitMode || TM.getSubtarget().isTargetDarwin()) &&
296298 TM.getSubtarget().GVRequiresExtraLoad(GV, TM, false);
297299 }
298300
299 template< class machineCodeEmitter>
300 void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
301 template
302 void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
301303 int DispVal, intptr_t PCAdj) {
302304 // If this is a simple integer displacement that doesn't require a relocation,
303305 // emit it now.
331333 }
332334 }
333335
334 template< class machineCodeEmitter>
335 void Emitter::emitMemModRMByte(const MachineInstr &MI,
336 template
337 void Emitter::emitMemModRMByte(const MachineInstr &MI,
336338 unsigned Op, unsigned RegOpcodeField,
337339 intptr_t PCAdj) {
338340 const MachineOperand &Op3 = MI.getOperand(Op+3);
449451 }
450452 }
451453
452 template< class machineCodeEmitter>
453 void Emitter::emitInstruction(
454 template
455 void Emitter::emitInstruction(
454456 const MachineInstr &MI,
455457 const TargetInstrDesc *Desc) {
456458 DOUT << MI;
671673 getX86RegNum(MI.getOperand(CurOp).getReg()));
672674 CurOp += 2;
673675 if (CurOp != NumOps)
674 emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
676 emitConstant(MI.getOperand(CurOp++).getImm(),
677 X86InstrInfo::sizeOfImm(Desc));
675678 break;
676679
677680 case X86II::MRMSrcMem: {
691694 PCAdj);
692695 CurOp += AddrOperands + 1;
693696 if (CurOp != NumOps)
694 emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
697 emitConstant(MI.getOperand(CurOp++).getImm(),
698 X86InstrInfo::sizeOfImm(Desc));
695699 break;
696700 }
697701
115115 return getJITMatchQuality()/2;
116116 }
117117
118 X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
118 X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
119119 : X86TargetMachine(M, FS, false) {
120120 }
121121
220220
221221 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
222222 CodeGenOpt::Level OptLevel,
223 bool DumpAsm, MachineCodeEmitter &MCE) {
223 bool DumpAsm,
224 MachineCodeEmitter &MCE) {
224225 // FIXME: Move this to TargetJITInfo!
225226 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
226227 if (DefRelocModel == Reloc::Default &&
249250
250251 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
251252 CodeGenOpt::Level OptLevel,
252 bool DumpAsm, JITCodeEmitter &JCE) {
253 bool DumpAsm,
254 JITCodeEmitter &JCE) {
253255 // FIXME: Move this to TargetJITInfo!
254256 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
255257 if (DefRelocModel == Reloc::Default &&