llvm.org GIT mirror llvm / 42dac65
mop up: "Don’t duplicate function or class name at the beginning of the comment." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218218 91177308-0d34-0410-b5e6-96231b3b80d8 Sanjay Patel 6 years ago
3 changed file(s) with 45 addition(s) and 59 deletion(s). Raw diff Collapse all Expand all
3131 namespace llvm {
3232 class RegisterClassInfo;
3333
34 /// Class AggressiveAntiDepState
3534 /// Contains all the state necessary for anti-dep breaking.
3635 class AggressiveAntiDepState {
3736 public:
38 /// RegisterReference - Information about a register reference
39 /// within a liverange
37 /// Information about a register reference within a liverange
4038 typedef struct {
41 /// Operand - The registers operand
39 /// The registers operand
4240 MachineOperand *Operand;
43 /// RC - The register class
41 /// The register class
4442 const TargetRegisterClass *RC;
4543 } RegisterReference;
4644
4745 private:
48 /// NumTargetRegs - Number of non-virtual target registers
49 /// (i.e. TRI->getNumRegs()).
46 /// Number of non-virtual target registers (i.e. TRI->getNumRegs()).
5047 const unsigned NumTargetRegs;
5148
52 /// GroupNodes - Implements a disjoint-union data structure to
49 /// Implements a disjoint-union data structure to
5350 /// form register groups. A node is represented by an index into
5451 /// the vector. A node can "point to" itself to indicate that it
5552 /// is the parent of a group, or point to another node to indicate
5653 /// that it is a member of the same group as that node.
5754 std::vector GroupNodes;
5855
59 /// GroupNodeIndices - For each register, the index of the GroupNode
56 /// For each register, the index of the GroupNode
6057 /// currently representing the group that the register belongs to.
6158 /// Register 0 is always represented by the 0 group, a group
6259 /// composed of registers that are not eligible for anti-aliasing.
6360 std::vector GroupNodeIndices;
6461
65 /// RegRefs - Map registers to all their references within a live range.
62 /// Map registers to all their references within a live range.
6663 std::multimap RegRefs;
6764
68 /// KillIndices - The index of the most recent kill (proceding bottom-up),
65 /// The index of the most recent kill (proceding bottom-up),
6966 /// or ~0u if the register is not live.
7067 std::vector KillIndices;
7168
72 /// DefIndices - The index of the most recent complete def (proceding bottom
69 /// The index of the most recent complete def (proceding bottom
7370 /// up), or ~0u if the register is live.
7471 std::vector DefIndices;
7572
7673 public:
7774 AggressiveAntiDepState(const unsigned TargetRegs, MachineBasicBlock *BB);
7875
79 /// GetKillIndices - Return the kill indices.
76 /// Return the kill indices.
8077 std::vector &GetKillIndices() { return KillIndices; }
8178
82 /// GetDefIndices - Return the define indices.
79 /// Return the define indices.
8380 std::vector &GetDefIndices() { return DefIndices; }
8481
85 /// GetRegRefs - Return the RegRefs map.
82 /// Return the RegRefs map.
8683 std::multimap& GetRegRefs() { return RegRefs; }
8784
88 // GetGroup - Get the group for a register. The returned value is
85 // Get the group for a register. The returned value is
8986 // the index of the GroupNode representing the group.
9087 unsigned GetGroup(unsigned Reg);
9188
92 // GetGroupRegs - Return a vector of the registers belonging to a
93 // group. If RegRefs is non-NULL then only included referenced registers.
89 // Return a vector of the registers belonging to a group.
90 // If RegRefs is non-NULL then only included referenced registers.
9491 void GetGroupRegs(
9592 unsigned Group,
9693 std::vector &Regs,
9794 std::multimap
9895 AggressiveAntiDepState::RegisterReference> *RegRefs);
9996
100 // UnionGroups - Union Reg1's and Reg2's groups to form a new
101 // group. Return the index of the GroupNode representing the
102 // group.
97 // Union Reg1's and Reg2's groups to form a new group.
98 // Return the index of the GroupNode representing the group.
10399 unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
104100
105 // LeaveGroup - Remove a register from its current group and place
101 // Remove a register from its current group and place
106102 // it alone in its own group. Return the index of the GroupNode
107103 // representing the registers new group.
108104 unsigned LeaveGroup(unsigned Reg);
109105
110 /// IsLive - Return true if Reg is live
106 /// Return true if Reg is live.
111107 bool IsLive(unsigned Reg);
112108 };
113109
114110
115 /// Class AggressiveAntiDepBreaker
116111 class AggressiveAntiDepBreaker : public AntiDepBreaker {
117112 MachineFunction& MF;
118113 MachineRegisterInfo &MRI;
120115 const TargetRegisterInfo *TRI;
121116 const RegisterClassInfo &RegClassInfo;
122117
123 /// CriticalPathSet - The set of registers that should only be
118 /// The set of registers that should only be
124119 /// renamed if they are on the critical path.
125120 BitVector CriticalPathSet;
126121
127 /// State - The state used to identify and rename anti-dependence
128 /// registers.
122 /// The state used to identify and rename anti-dependence registers.
129123 AggressiveAntiDepState *State;
130124
131125 public:
134128 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
135129 ~AggressiveAntiDepBreaker();
136130
137 /// Start - Initialize anti-dep breaking for a new basic block.
131 /// Initialize anti-dep breaking for a new basic block.
138132 void StartBlock(MachineBasicBlock *BB) override;
139133
140 /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
141 /// path
134 /// Identifiy anti-dependencies along the critical path
142135 /// of the ScheduleDAG and break them by renaming registers.
143136 ///
144137 unsigned BreakAntiDependencies(const std::vector& SUnits,
147140 unsigned InsertPosIndex,
148141 DbgValueVector &DbgValues) override;
149142
150 /// Observe - Update liveness information to account for the current
143 /// Update liveness information to account for the current
151144 /// instruction, which will not be scheduled.
152145 ///
153146 void Observe(MachineInstr *MI, unsigned Count,
154147 unsigned InsertPosIndex) override;
155148
156 /// Finish - Finish anti-dep breaking for a basic block.
149 /// Finish anti-dep breaking for a basic block.
157150 void FinishBlock() override;
158151
159152 private:
160153 /// Keep track of a position in the allocation order for each regclass.
161154 typedef std::map RenameOrderType;
162155
163 /// IsImplicitDefUse - Return true if MO represents a register
156 /// Return true if MO represents a register
164157 /// that is both implicitly used and defined in MI
165158 bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO);
166159
167 /// GetPassthruRegs - If MI implicitly def/uses a register, then
160 /// If MI implicitly def/uses a register, then
168161 /// return that register and all subregisters.
169162 void GetPassthruRegs(MachineInstr *MI, std::set& PassthruRegs);
170163
2424
2525 namespace llvm {
2626
27 /// AntiDepBreaker - This class works into conjunction with the
28 /// post-RA scheduler to rename registers to break register
29 /// anti-dependencies.
27 /// This class works in conjunction with the post-RA scheduler to rename
28 /// registers to break register anti-dependencies (WAR hazards).
3029 class AntiDepBreaker {
3130 public:
3231 typedef std::vector >
3433
3534 virtual ~AntiDepBreaker();
3635
37 /// Start - Initialize anti-dep breaking for a new basic block.
36 /// Initialize anti-dep breaking for a new basic block.
3837 virtual void StartBlock(MachineBasicBlock *BB) =0;
3938
40 /// BreakAntiDependencies - Identifiy anti-dependencies within a
41 /// basic-block region and break them by renaming registers. Return
42 /// the number of anti-dependencies broken.
43 ///
39 /// Identifiy anti-dependencies within a basic-block region and break them by
40 /// renaming registers. Return the number of anti-dependencies broken.
4441 virtual unsigned BreakAntiDependencies(const std::vector& SUnits,
4542 MachineBasicBlock::iterator Begin,
4643 MachineBasicBlock::iterator End,
4744 unsigned InsertPosIndex,
4845 DbgValueVector &DbgValues) = 0;
4946
50 /// Observe - Update liveness information to account for the current
47 /// Update liveness information to account for the current
5148 /// instruction, which will not be scheduled.
52 ///
5349 virtual void Observe(MachineInstr *MI, unsigned Count,
5450 unsigned InsertPosIndex) =0;
5551
56 /// Finish - Finish anti-dep breaking for a basic block.
52 /// Finish anti-dep breaking for a basic block.
5753 virtual void FinishBlock() =0;
5854
59 /// UpdateDbgValue - Update DBG_VALUE if dependency breaker is updating
55 /// Update DBG_VALUE if dependency breaker is updating
6056 /// other machine instruction to use NewReg.
6157 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
6258 assert (MI->isDebugValue() && "MI is not DBG_VALUE!");
3737 const TargetRegisterInfo *TRI;
3838 const RegisterClassInfo &RegClassInfo;
3939
40 /// AllocatableSet - The set of allocatable registers.
40 /// The set of allocatable registers.
4141 /// We'll be ignoring anti-dependencies on non-allocatable registers,
4242 /// because they may not be safe to break.
4343 const BitVector AllocatableSet;
4444
45 /// Classes - For live regs that are only used in one register class in a
45 /// For live regs that are only used in one register class in a
4646 /// live range, the register class. If the register is not live, the
4747 /// corresponding value is null. If the register is live but used in
4848 /// multiple register classes, the corresponding value is -1 casted to a
4949 /// pointer.
5050 std::vector Classes;
5151
52 /// RegRefs - Map registers to all their references within a live range.
52 /// Map registers to all their references within a live range.
5353 std::multimap RegRefs;
5454 typedef std::multimap::const_iterator
5555 RegRefIter;
5656
57 /// KillIndices - The index of the most recent kill (proceeding bottom-up),
57 /// The index of the most recent kill (proceeding bottom-up),
5858 /// or ~0u if the register is not live.
5959 std::vector KillIndices;
6060
61 /// DefIndices - The index of the most recent complete def (proceeding
61 /// The index of the most recent complete def (proceeding
6262 /// bottom up), or ~0u if the register is live.
6363 std::vector DefIndices;
6464
65 /// KeepRegs - A set of registers which are live and cannot be changed to
65 /// A set of registers which are live and cannot be changed to
6666 /// break anti-dependencies.
6767 BitVector KeepRegs;
6868
7070 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo&);
7171 ~CriticalAntiDepBreaker();
7272
73 /// Start - Initialize anti-dep breaking for a new basic block.
73 /// Initialize anti-dep breaking for a new basic block.
7474 void StartBlock(MachineBasicBlock *BB) override;
7575
76 /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
77 /// path
76 /// Identifiy anti-dependencies along the critical path
7877 /// of the ScheduleDAG and break them by renaming registers.
79 ///
8078 unsigned BreakAntiDependencies(const std::vector& SUnits,
8179 MachineBasicBlock::iterator Begin,
8280 MachineBasicBlock::iterator End,
8381 unsigned InsertPosIndex,
8482 DbgValueVector &DbgValues) override;
8583
86 /// Observe - Update liveness information to account for the current
84 /// Update liveness information to account for the current
8785 /// instruction, which will not be scheduled.
88 ///
8986 void Observe(MachineInstr *MI, unsigned Count,
9087 unsigned InsertPosIndex) override;
9188
92 /// Finish - Finish anti-dep breaking for a basic block.
89 /// Finish anti-dep breaking for a basic block.
9390 void FinishBlock() override;
9491
9592 private: