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Spelling mistakes in comments. NFCI. Based on corrections mentioned in patch for clang for PR27635 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299072 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 2 years ago
14 changed file(s) with 17 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
None //===- MachineFunctionInitalizer.h - machine function initializer ---------===//
0 //===- MachineFunctionInitializer.h - machine function initializer ---------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
195195 // "}}" to print a literal '}'.
196196 //
197197 // ===Parameter Indexing===
198 // `index` specifies the index of the paramter in the parameter pack to format
198 // `index` specifies the index of the parameter in the parameter pack to format
199199 // into the output. Note that it is possible to refer to the same parameter
200200 // index multiple times in a given format string. This makes it possible to
201201 // output the same value multiple times without passing it multiple times to the
14941494 bool HasAlignment = Record[0] & 2;
14951495 // 2nd field used to be an artificial tag, either DW_TAG_auto_variable or
14961496 // DW_TAG_arg_variable, if we have alignment flag encoded it means, that
1497 // this is newer version of record which doesn't have artifical tag.
1497 // this is newer version of record which doesn't have artificial tag.
14981498 bool HasTag = !HasAlignment && Record.size() > 8;
14991499 DINode::DIFlags Flags = static_cast(Record[7 + HasTag]);
15001500 uint32_t AlignInBits = 0;
440440 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg);
441441 CrossCopy = isCrossCopy(*MRI, UseMI, DstRC, MO);
442442 if (CrossCopy)
443 DEBUG(dbgs() << "Copy accross incompatible classes: " << UseMI);
443 DEBUG(dbgs() << "Copy across incompatible classes: " << UseMI);
444444 }
445445
446446 if (!CrossCopy)
3535 ///
3636 /// A) A previous pass has created a compact branch directly.
3737 /// B) Transforming a delay slot branch into compact branch. This case can be
38 /// difficult to process as lookahead for hazards is insufficent, as
38 /// difficult to process as lookahead for hazards is insufficient, as
3939 /// backwards delay slot fillling can also produce hazards in previously
4040 /// processed instuctions.
4141 ///
15551555 }
15561556 ++OIdx;
15571557 }
1558 assert(StoreOperands.empty() && "Unfinished paramter store.");
1558 assert(StoreOperands.empty() && "Unfinished parameter store.");
15591559 if (VTs.size() > 0)
15601560 --OIdx;
15611561 ++paramCount;
21972197 } // UseVSXReg = 1
21982198
21992199 // Pattern for matching Vector HP -> Vector SP intrinsic. Defined as a
2200 // seperate pattern so that it can convert the input register class from
2200 // separate pattern so that it can convert the input register class from
22012201 // VRRC(v8i16) to VSRC.
22022202 def : Pat<(v4f32 (int_ppc_vsx_xvcvhpsp v8i16:$A)),
22032203 (v4f32 (XVCVHPSP (COPY_TO_REGCLASS $A, VSRC)))>;
771771 // the pseudo. The argument feeding EBX is ebx_input.
772772 //
773773 // The additional argument, $ebx_save, is a temporary register used to
774 // save the value of RBX accross the actual instruction.
774 // save the value of RBX across the actual instruction.
775775 //
776776 // To make sure the register assigned to $ebx_save does not interfere with
777777 // the definition of the actual instruction, we use a definition $dst which
778 // is tied to $rbx_save. That way, the live-range of $rbx_save spans accross
778 // is tied to $rbx_save. That way, the live-range of $rbx_save spans across
779779 // the instruction and we are sure we will have a valid register to restore
780780 // the value of RBX.
781781 let Defs = [EAX, EDX, EBX, EFLAGS], Uses = [EAX, ECX, EDX],
36223622 m_Intrinsic(m_Value(NextCond)))) {
36233623 Value *CurrCond = II->getArgOperand(0);
36243624
3625 // Remove a guard that it is immediately preceeded by an identical guard.
3625 // Remove a guard that it is immediately preceded by an identical guard.
36263626 if (CurrCond == NextCond)
36273627 return eraseInstFromFunction(*NextInst);
36283628
331331 /// The following is an attempt to document the grammar of the format, which is
332332 /// parsed by this function for little-endian machines. Since the format makes
333333 /// use of BitFields, when we support big-Endian architectures, we will need to
334 /// adjust not only the endianess parameter to llvm's RecordExtractor, but also
334 /// adjust not only the endianness parameter to llvm's RecordExtractor, but also
335335 /// the bit twiddling logic, which is consistent with the little-endian
336336 /// convention that BitFields within a struct will first be packed into the
337337 /// least significant bits the address they belong to.
362362 Optional UnitRangeAttribute;
363363 /// @}
364364
365 /// \brief Location attributes that need to be transfered from th
365 /// \brief Location attributes that need to be transferred from the
366366 /// original debug_loc section to the liked one. They are stored
367367 /// along with the PC offset that is to be applied to their
368368 /// function's address.
10831083
10841084 /// \brief Emit a FDE into the debug_frame section. \p FDEBytes
10851085 /// contains the FDE data without the length, CIE offset and address
1086 /// which will be replaced with the paramter values.
1086 /// which will be replaced with the parameter values.
10871087 void DwarfStreamer::emitFDE(uint32_t CIEOffset, uint32_t AddrSize,
10881088 uint32_t Address, StringRef FDEBytes) {
10891089 MS->SwitchSection(MC->getObjectFileInfo()->getDwarfFrameSection());
30703070 if (LineTable.Prologue.Version != 2 ||
30713071 LineTable.Prologue.DefaultIsStmt != DWARF2_LINE_DEFAULT_IS_STMT ||
30723072 LineTable.Prologue.OpcodeBase > 13)
3073 reportWarning("line table paramters mismatch. Cannot emit.");
3073 reportWarning("line table parameters mismatch. Cannot emit.");
30743074 else {
30753075 MCDwarfLineTableParams Params;
30763076 Params.DWARF2LineOpcodeBase = LineTable.Prologue.OpcodeBase;
219219 // The function also tries to find a hole in the address map to fit the __DWARF
220220 // segment of \a DwarfSegmentSize size. \a EndAddress is updated to point at the
221221 // highest segment address.
222 // When the __LINKEDIT segment is transfered, its offset and size are set resp.
222 // When the __LINKEDIT segment is transferred, its offset and size are set resp.
223223 // to \a LinkeditOffset and \a LinkeditSize.
224224 template
225225 static void transferSegmentAndSections(
590590 break;
591591 }
592592 case LLVMPHI: {
593 // We need to agressively set things here because of loops.
593 // We need to aggressively set things here because of loops.
594594 VMap[Src] = Dst = LLVMBuildPhi(Builder, CloneType(Src), Name);
595595
596596 SmallVector Values;
271271 lto_initialize();
272272 llvm::TargetOptions Options = InitTargetOptionsFromCodeGenFlags();
273273
274 // Create a local context. Ownership will be transfered to LTOModule.
274 // Create a local context. Ownership will be transferred to LTOModule.
275275 std::unique_ptr Context = llvm::make_unique();
276276 Context->setDiagnosticHandler(diagnosticHandler, nullptr, true);
277277