llvm.org GIT mirror llvm / 420cdeb
More constification of things. More comments added. No functionality changes. (Sorry for any formatting changes that creeped in.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47362 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 12 years ago
2 changed file(s) with 80 addition(s) and 48 deletion(s). Raw diff Collapse all Expand all
136136 // register references as presumed dead across basic blocks.
137137 MachineInstr **PhysRegInfo;
138138
139 // PhysRegUsed - Keep track whether the physical register has been used after
140 // its last definition. This is local property.
139 // PhysRegUsed - Keep track of whether the physical register has been used
140 // after its last definition. This is local property.
141141 bool *PhysRegUsed;
142142
143143 // PhysRegPartUse - Keep track of which instruction was the last partial use
159159 /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
160160 /// uses. Pay special attention to the sub-register uses which may come below
161161 /// the last use of the whole register.
162 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI,
162 bool HandlePhysRegKill(unsigned Reg, const MachineInstr *MI,
163163 SmallSet &SubKills);
164164 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
165165 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
147147 WorkList.push_back(*PI);
148148 }
149149
150 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
150 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
151151 MachineBasicBlock *DefBlock,
152152 MachineBasicBlock *MBB) {
153153 std::vector WorkList;
154154 MarkVirtRegAliveInBlock(VRInfo, DefBlock, MBB, WorkList);
155
155156 while (!WorkList.empty()) {
156157 MachineBasicBlock *Pred = WorkList.back();
157158 WorkList.pop_back();
162163
163164 void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
164165 MachineInstr *MI) {
165 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
166 const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
166167 assert(MRI.getVRegDef(reg) && "Register use before def!");
167168
168169 unsigned BBNum = MBB->getNumber();
193194 if (!VRInfo.AliveBlocks[BBNum])
194195 VRInfo.Kills.push_back(MI);
195196
196 // Update all dominating blocks to mark them known live.
197 // Update all dominating blocks to mark them as "known live".
197198 for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(),
198199 E = MBB->pred_end(); PI != E; ++PI)
199200 MarkVirtRegAliveInBlock(VRInfo, MRI.getVRegDef(reg)->getParent(), *PI);
255256 }
256257 }
257258
258 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI,
259 /// addRegisterKills - For all of a register's sub-registers that are killed in
260 /// other instructions (?), indicate that they are killed in this machine
261 /// instruction by marking the operand as "killed". (If the machine operand
262 /// isn't found, add it first.)
263 void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI,
264 SmallSet &SubKills) {
265 if (SubKills.count(Reg) == 0) {
266 MI->addRegisterKilled(Reg, RegInfo, true);
267 return;
268 }
269
270 for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
271 unsigned SubReg = *SubRegs; ++SubRegs)
272 addRegisterKills(SubReg, MI, SubKills);
273 }
274
275 /// HandlePhysRegKill - The recursive version of HandlePhysRegKill. Returns true
276 /// if:
277 ///
278 /// - The register has no sub-registers and the machine instruction is the
279 /// last def/use of the register, or
280 /// - The register has sub-registers and none of them are killed elsewhere.
281 ///
282 bool LiveVariables::HandlePhysRegKill(unsigned Reg, const MachineInstr *RefMI,
259283 SmallSet &SubKills) {
260 for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
261 unsigned SubReg = *SubRegs; ++SubRegs) {
262 MachineInstr *LastRef = PhysRegInfo[SubReg];
284 const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
285
286 for (; unsigned SubReg = *SubRegs; ++SubRegs) {
287 const MachineInstr *LastRef = PhysRegInfo[SubReg];
288
263289 if (LastRef != RefMI ||
264290 !HandlePhysRegKill(SubReg, RefMI, SubKills))
265291 SubKills.insert(SubReg);
266292 }
267293
268 if (*RegInfo->getImmediateSubRegisters(Reg) == 0) {
294 if (*SubRegs == 0) {
269295 // No sub-registers, just check if reg is killed by RefMI.
270296 if (PhysRegInfo[Reg] == RefMI)
271297 return true;
272 } else if (SubKills.empty())
273 // None of the sub-registers are killed elsewhere...
298 } else if (SubKills.empty()) {
299 // None of the sub-registers are killed elsewhere.
274300 return true;
301 }
302
275303 return false;
276304 }
277305
278 void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI,
279 SmallSet &SubKills) {
280 if (SubKills.count(Reg) == 0)
281 MI->addRegisterKilled(Reg, RegInfo, true);
282 else {
283 for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
284 unsigned SubReg = *SubRegs; ++SubRegs)
285 addRegisterKills(SubReg, MI, SubKills);
286 }
287 }
288
306 /// HandlePhysRegKill - Calls the recursive version of HandlePhysRegKill. (See
307 /// above for details.)
289308 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI) {
290309 SmallSet SubKills;
310
291311 if (HandlePhysRegKill(Reg, RefMI, SubKills)) {
312 // This machine instruction kills this register.
292313 RefMI->addRegisterKilled(Reg, RegInfo, true);
293314 return true;
294 } else {
295 // Some sub-registers are killed by another MI.
296 for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
297 unsigned SubReg = *SubRegs; ++SubRegs)
298 addRegisterKills(SubReg, RefMI, SubKills);
299 return false;
300 }
315 }
316
317 // Some sub-registers are killed by another machine instruction.
318 for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
319 unsigned SubReg = *SubRegs; ++SubRegs)
320 addRegisterKills(SubReg, RefMI, SubKills);
321
322 return false;
301323 }
302324
303325 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
308330 if (PhysRegPartUse[Reg])
309331 PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true);
310332 }
311 } else if (PhysRegPartUse[Reg])
333 } else if (PhysRegPartUse[Reg]) {
312334 // Add implicit use / kill to last partial use.
313335 PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true);
314 else if (LastRef != MI)
336 } else if (LastRef != MI) {
315337 // Defined, but not used. However, watch out for cases where a super-reg
316338 // is also defined on the same MI.
317339 LastRef->addRegisterDead(Reg, RegInfo);
340 }
318341 }
319342
320343 for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
325348 if (PhysRegPartUse[SubReg])
326349 PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true);
327350 }
328 } else if (PhysRegPartUse[SubReg])
351 } else if (PhysRegPartUse[SubReg]) {
329352 // Add implicit use / kill to last use of a sub-register.
330353 PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true);
331 else if (LastRef != MI)
354 } else if (LastRef != MI) {
332355 // This must be a def of the subreg on the same MI.
333356 LastRef->addRegisterDead(SubReg, RegInfo);
357 }
334358 }
335359 }
336360
359383 PhysRegUsed[Reg] = false;
360384 PhysRegPartDef[Reg].clear();
361385 PhysRegPartUse[Reg] = NULL;
386
362387 for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
363388 unsigned SubReg = *SubRegs; ++SubRegs) {
364389 PhysRegInfo[SubReg] = MI;
428453 // Process all uses...
429454 for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
430455 const MachineOperand &MO = MI->getOperand(i);
456
431457 if (MO.isRegister() && MO.isUse() && MO.getReg()) {
432458 unsigned MOReg = MO.getReg();
459
433460 if (TargetRegisterInfo::isVirtualRegister(MOReg))
434461 HandleVirtRegUse(MOReg, MBB, MI);
435462 else if (TargetRegisterInfo::isPhysicalRegister(MOReg) &&
441468 // Process all defs...
442469 for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
443470 const MachineOperand &MO = MI->getOperand(i);
471
444472 if (MO.isRegister() && MO.isDef() && MO.getReg()) {
445473 unsigned MOReg = MO.getReg();
474
446475 if (TargetRegisterInfo::isVirtualRegister(MOReg)) {
447476 VarInfo &VRInfo = getVarInfo(MOReg);
448477
465494 SmallVector& VarInfoVec = PHIVarInfo[MBB->getNumber()];
466495
467496 for (SmallVector::iterator I = VarInfoVec.begin(),
468 E = VarInfoVec.end(); I != E; ++I) {
469 // Only mark it alive only in the block we are representing.
497 E = VarInfoVec.end(); I != E; ++I)
498 // Mark it alive only in the block we are representing.
470499 MarkVirtRegAliveInBlock(getVarInfo(*I), MRI.getVRegDef(*I)->getParent(),
471500 MBB);
472 }
473501 }
474502
475503 // Finally, if the last instruction in the block is a return, make sure to mark
476504 // it as using all of the live-out values in the function.
477505 if (!MBB->empty() && MBB->back().getDesc().isReturn()) {
478506 MachineInstr *Ret = &MBB->back();
507
479508 for (MachineRegisterInfo::liveout_iterator
480509 I = MF->getRegInfo().liveout_begin(),
481510 E = MF->getRegInfo().liveout_end(); I != E; ++I) {
482511 assert(TargetRegisterInfo::isPhysicalRegister(*I) &&
483512 "Cannot have a live-in virtual register!");
484513 HandlePhysRegUse(*I, Ret);
514
485515 // Add live-out registers as implicit uses.
486516 if (Ret->findRegisterUseOperandIdx(*I) == -1)
487517 Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
497527 // Clear some states between BB's. These are purely local information.
498528 for (unsigned i = 0; i != NumRegs; ++i)
499529 PhysRegPartDef[i].clear();
530
500531 std::fill(PhysRegInfo, PhysRegInfo + NumRegs, (MachineInstr*)0);
501532 std::fill(PhysRegUsed, PhysRegUsed + NumRegs, false);
502533 std::fill(PhysRegPartUse, PhysRegPartUse + NumRegs, (MachineInstr*)0);
506537 // VirtRegInfo onto MI's.
507538 //
508539 for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i)
509 for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) {
510 if (VirtRegInfo[i].Kills[j] == MRI.getVRegDef(i +
511 TargetRegisterInfo::FirstVirtualRegister))
512 VirtRegInfo[i].Kills[j]->addRegisterDead(i +
513 TargetRegisterInfo::FirstVirtualRegister,
514 RegInfo);
540 for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j)
541 if (VirtRegInfo[i].Kills[j] ==
542 MRI.getVRegDef(i + TargetRegisterInfo::FirstVirtualRegister))
543 VirtRegInfo[i]
544 .Kills[j]->addRegisterDead(i +
545 TargetRegisterInfo::FirstVirtualRegister,
546 RegInfo);
515547 else
516 VirtRegInfo[i].Kills[j]->addRegisterKilled(i +
517 TargetRegisterInfo::FirstVirtualRegister,
518 RegInfo);
519 }
548 VirtRegInfo[i]
549 .Kills[j]->addRegisterKilled(i +
550 TargetRegisterInfo::FirstVirtualRegister,
551 RegInfo);
520552
521553 // Check to make sure there are no unreachable blocks in the MC CFG for the
522554 // function. If so, it is due to a bug in the instruction selector or some