llvm.org GIT mirror llvm / 41d59c6
Define SPARC code models. Currently, only abs32 and pic32 are implemented. Add a test case for abs32 with 64-bit code. 64-bit PIC code is currently broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179463 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 6 years ago
3 changed file(s) with 55 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
4949 return X;
5050 }
5151
52 // Code models. Some only make sense for 64-bit code.
53 //
54 // SunCC Reloc CodeModel Constraints
55 // abs32 Static Small text+data+bss linked below 2^32 bytes
56 // abs44 Static Medium text+data+bss linked below 2^44 bytes
57 // abs64 Static Large text smaller than 2^31 bytes
58 // pic13 PIC_ Small GOT < 2^13 bytes
59 // pic32 PIC_ Medium GOT < 2^32 bytes
60 //
61 // All code models require that the text segment is smaller than 2GB.
62
5263 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
5364 CodeModel::Model CM,
5465 CodeGenOpt::Level OL) {
5566 MCCodeGenInfo *X = new MCCodeGenInfo();
67
68 // The default 32-bit code model is abs32/pic32.
69 if (CM == CodeModel::Default)
70 CM = RM == Reloc::PIC_ ? CodeModel::Medium : CodeModel::Small;
71
5672 X->InitMCCodeGenInfo(RM, CM, OL);
5773 return X;
5874 }
5975
76 static MCCodeGenInfo *createSparcV9MCCodeGenInfo(StringRef TT, Reloc::Model RM,
77 CodeModel::Model CM,
78 CodeGenOpt::Level OL) {
79 MCCodeGenInfo *X = new MCCodeGenInfo();
80
81 // The default 64-bit code model is abs44/pic32.
82 if (CM == CodeModel::Default)
83 CM = CodeModel::Medium;
84
85 X->InitMCCodeGenInfo(RM, CM, OL);
86 return X;
87 }
6088 extern "C" void LLVMInitializeSparcTargetMC() {
6189 // Register the MC asm info.
6290 RegisterMCAsmInfo X(TheSparcTarget);
6694 TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
6795 createSparcMCCodeGenInfo);
6896 TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
69 createSparcMCCodeGenInfo);
97 createSparcV9MCCodeGenInfo);
7098
7199 // Register the MC instruction info.
72100 TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
11661166 setTruncStoreAction(MVT::f64, MVT::f32, Expand);
11671167
11681168 // Custom legalize GlobalAddress nodes into LO/HI parts.
1169 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
1170 setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
1171 setOperationAction(ISD::ConstantPool , MVT::i32, Custom);
1169 setOperationAction(ISD::GlobalAddress, getPointerTy(), Custom);
1170 setOperationAction(ISD::GlobalTLSAddress, getPointerTy(), Custom);
1171 setOperationAction(ISD::ConstantPool, getPointerTy(), Custom);
11721172
11731173 // Sparc doesn't have sext_inreg, replace them with shl/sra
11741174 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
0 ; RUN: llc < %s -march=sparc -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s
1 ; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s
2 ; RUN: llc < %s -march=sparc -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v8pic32 %s
3
4 @G = external global i8
5
6 define zeroext i8 @loadG() {
7 %tmp = load i8* @G
8 ret i8 %tmp
9 }
10
11 ; abs32: loadG
12 ; abs32: sethi %hi(G), %[[R:[gilo][0-7]]]
13 ; abs32: ldub [%[[R]]+%lo(G)], %i0
14 ; abs32: jmp %i7+8
15
16 ; v8pic32: loadG
17 ; v8pic32: _GLOBAL_OFFSET_TABLE_
18 ; v8pic32: sethi %hi(G), %[[R1:[gilo][0-7]]]
19 ; v8pic32: add %[[R1]], %lo(G), %[[Goffs:[gilo][0-7]]]
20 ; v8pic32: ld [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]]
21 ; v8pic32: ldub [%[[Gaddr]]], %i0
22 ; v8pic32: jmp %i7+8