llvm.org GIT mirror llvm / 4198c58
Next stage into switch lowering refactoring 1. Fix some bugs in the jump table lowering threshold 2. Implement much better metric for optimal pivot selection 3. Tune thresholds for different lowering methods 4. Implement shift-and trick for lowering small (<machine word length) cases with few destinations. Good testcase will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35816 91177308-0d34-0410-b5e6-96231b3b80d8 Anton Korobeynikov 13 years ago
4 changed file(s) with 411 addition(s) and 40 deletion(s). Raw diff Collapse all Expand all
123123 bool Emitted;
124124 };
125125 typedef std::pair JumpTableBlock;
126
126
127 struct BitTestCase {
128 BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr):
129 Mask(M), ThisBB(T), TargetBB(Tr) { };
130 uint64_t Mask;
131 MachineBasicBlock* ThisBB;
132 MachineBasicBlock* TargetBB;
133 };
134
135 typedef SmallVector BitTestInfo;
136
137 struct BitTestBlock {
138 BitTestBlock(uint64_t F, uint64_t R, Value* SV,
139 unsigned Rg, bool E,
140 MachineBasicBlock* P, MachineBasicBlock* D,
141 const BitTestInfo& C):
142 First(F), Range(R), SValue(SV), Reg(Rg), Emitted(E),
143 Parent(P), Default(D), Cases(C) { };
144 uint64_t First;
145 uint64_t Range;
146 Value *SValue;
147 unsigned Reg;
148 bool Emitted;
149 MachineBasicBlock *Parent;
150 MachineBasicBlock *Default;
151 BitTestInfo Cases;
152 };
127153 protected:
128154 /// Pick a safe ordering and emit instructions for each target node in the
129155 /// graph.
156182 /// JTCases - Vector of JumpTable structures which holds necessary information
157183 /// for emitting a jump tables during SwitchInst code generation.
158184 std::vector JTCases;
185
186 std::vector BitTestCases;
159187 };
160188
161189 }
377377 }
378378 };
379379
380 struct CaseBits {
381 uint64_t Mask;
382 MachineBasicBlock* BB;
383 unsigned Bits;
384
385 CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits):
386 Mask(mask), BB(bb), Bits(bits) { }
387 };
388
380389 typedef std::vector CaseVector;
390 typedef std::vector CaseBitsVector;
381391 typedef CaseVector::iterator CaseItr;
382392 typedef std::pair CaseRange;
383393
403413 /// The comparison function for sorting the switch case values in the vector.
404414 /// WARNING: Case ranges should be disjoint!
405415 struct CaseCmp {
406 bool operator () (const Case& C1,
407 const Case& C2) {
408
416 bool operator () (const Case& C1, const Case& C2) {
409417 assert(isa(C1.Low) && isa(C2.High));
410418 const ConstantInt* CI1 = cast(C1.Low);
411419 const ConstantInt* CI2 = cast(C2.High);
412420 return CI1->getValue().slt(CI2->getValue());
421 }
422 };
423
424 struct CaseBitsCmp {
425 bool operator () (const CaseBits& C1, const CaseBits& C2) {
426 return C1.Bits > C2.Bits;
413427 }
414428 };
415429
429443 /// JTCases - Vector of JumpTable structures used to communicate
430444 /// SwitchInst code generation information.
431445 std::vector JTCases;
446 std::vector BitTestCases;
432447
433448 /// FuncInfo - Information about the function as a whole.
434449 ///
530545 CaseRecVector& WorkList,
531546 Value* SV,
532547 MachineBasicBlock* Default);
548 bool handleBitTestsSwitchCase(CaseRec& CR,
549 CaseRecVector& WorkList,
550 Value* SV,
551 MachineBasicBlock* Default);
533552 void visitSwitchCase(SelectionDAGISel::CaseBlock &CB);
553 void visitBitTestHeader(SelectionDAGISel::BitTestBlock &B);
554 void visitBitTestCase(MachineBasicBlock* NextMBB,
555 unsigned Reg,
556 SelectionDAGISel::BitTestCase &B);
534557 void visitJumpTable(SelectionDAGISel::JumpTable &JT);
535558 void visitJumpTableHeader(SelectionDAGISel::JumpTable &JT,
536559 SelectionDAGISel::JumpTableHeader &JTH);
12091232 DAG.setRoot(BrCond);
12101233 else
12111234 DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, BrCond,
1212 DAG.getBasicBlock(JT.MBB)));
1213 }
1214
1235 DAG.getBasicBlock(JT.MBB)));
1236
1237 return;
1238 }
1239
1240 /// visitBitTestHeader - This function emits necessary code to produce value
1241 /// suitable for "bit tests"
1242 void SelectionDAGLowering::visitBitTestHeader(SelectionDAGISel::BitTestBlock &B) {
1243 // Subtract the minimum value
1244 SDOperand SwitchOp = getValue(B.SValue);
1245 MVT::ValueType VT = SwitchOp.getValueType();
1246 SDOperand SUB = DAG.getNode(ISD::SUB, VT, SwitchOp,
1247 DAG.getConstant(B.First, VT));
1248
1249 // Check range
1250 SDOperand RangeCmp = DAG.getSetCC(TLI.getSetCCResultTy(), SUB,
1251 DAG.getConstant(B.Range, VT),
1252 ISD::SETUGT);
1253
1254 SDOperand ShiftOp;
1255 if (VT > TLI.getShiftAmountTy())
1256 ShiftOp = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), SUB);
1257 else
1258 ShiftOp = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), SUB);
1259
1260 // Make desired shift
1261 SDOperand SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
1262 DAG.getConstant(1, TLI.getPointerTy()),
1263 ShiftOp);
1264
1265 unsigned SwitchReg = FuncInfo.MakeReg(TLI.getPointerTy());
1266 SDOperand CopyTo = DAG.getCopyToReg(getRoot(), SwitchReg, SwitchVal);
1267 B.Reg = SwitchReg;
1268
1269 SDOperand BrRange = DAG.getNode(ISD::BRCOND, MVT::Other, CopyTo, RangeCmp,
1270 DAG.getBasicBlock(B.Default));
1271
1272 // Set NextBlock to be the MBB immediately after the current one, if any.
1273 // This is used to avoid emitting unnecessary branches to the next block.
1274 MachineBasicBlock *NextBlock = 0;
1275 MachineFunction::iterator BBI = CurMBB;
1276 if (++BBI != CurMBB->getParent()->end())
1277 NextBlock = BBI;
1278
1279 MachineBasicBlock* MBB = B.Cases[0].ThisBB;
1280 if (MBB == NextBlock)
1281 DAG.setRoot(BrRange);
1282 else
1283 DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, CopyTo,
1284 DAG.getBasicBlock(MBB)));
1285
1286 CurMBB->addSuccessor(B.Default);
1287 CurMBB->addSuccessor(MBB);
1288
1289 return;
1290 }
1291
1292 /// visitBitTestCase - this function produces one "bit test"
1293 void SelectionDAGLowering::visitBitTestCase(MachineBasicBlock* NextMBB,
1294 unsigned Reg,
1295 SelectionDAGISel::BitTestCase &B) {
1296 // Emit bit tests and jumps
1297 SDOperand SwitchVal = DAG.getCopyFromReg(getRoot(), Reg, TLI.getPointerTy());
1298
1299 SDOperand AndOp = DAG.getNode(ISD::AND, TLI.getPointerTy(),
1300 SwitchVal,
1301 DAG.getConstant(B.Mask,
1302 TLI.getPointerTy()));
1303 SDOperand AndCmp = DAG.getSetCC(TLI.getSetCCResultTy(), AndOp,
1304 DAG.getConstant(0, TLI.getPointerTy()),
1305 ISD::SETNE);
1306 SDOperand BrAnd = DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
1307 AndCmp, DAG.getBasicBlock(B.TargetBB));
1308
1309 // Set NextBlock to be the MBB immediately after the current one, if any.
1310 // This is used to avoid emitting unnecessary branches to the next block.
1311 MachineBasicBlock *NextBlock = 0;
1312 MachineFunction::iterator BBI = CurMBB;
1313 if (++BBI != CurMBB->getParent()->end())
1314 NextBlock = BBI;
1315
1316 if (NextMBB == NextBlock)
1317 DAG.setRoot(BrAnd);
1318 else
1319 DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, BrAnd,
1320 DAG.getBasicBlock(NextMBB)));
1321
1322 CurMBB->addSuccessor(B.TargetBB);
1323 CurMBB->addSuccessor(NextMBB);
1324
1325 return;
1326 }
12151327
12161328 void SelectionDAGLowering::visitInvoke(InvokeInst &I) {
12171329 assert(0 && "Should never be visited directly");
12721384
12731385 // Size is the number of Cases represented by this range.
12741386 unsigned Size = CR.Range.second - CR.Range.first;
1275 if (Size >=3)
1387 if (Size > 3)
12761388 return false;
12771389
12781390 // Get the MachineFunction which holds the current MBB. This is used when
13531465 Case& FrontCase = *CR.Range.first;
13541466 Case& BackCase = *(CR.Range.second-1);
13551467
1356 // Size is the number of Cases represented by this range.
1357 unsigned Size = CR.Range.second - CR.Range.first;
1358
13591468 int64_t First = cast(FrontCase.Low)->getSExtValue();
13601469 int64_t Last = cast(BackCase.High)->getSExtValue();
13611470
13661475
13671476 if ((!TLI.isOperationLegal(ISD::BR_JT, MVT::Other) &&
13681477 !TLI.isOperationLegal(ISD::BRIND, MVT::Other)) ||
1369 Size <= 5)
1478 TSize <= 3)
13701479 return false;
13711480
13721481 double Density = (double)TSize / (double)((Last - First) + 1ULL);
13751484
13761485 DOUT << "Lowering jump table\n"
13771486 << "First entry: " << First << ". Last entry: " << Last << "\n"
1378 << "Size: " << TSize << ". Density: " << Density << "\n";
1487 << "Size: " << TSize << ". Density: " << Density << "\n\n";
13791488
13801489 // Get the MachineFunction which holds the current MBB. This is used when
13811490 // inserting any additional MBBs necessary to represent the switch.
14001509 CR.CaseBB->addSuccessor(JumpTableBB);
14011510
14021511 // Build a vector of destination BBs, corresponding to each target
1403 // of the jump table. If the value of the jump table slot corresponds to
1512 // of the jump table. If the value of the jump table slot corresponds to
14041513 // a case statement, push the case's BB onto the vector, otherwise, push
14051514 // the default BB.
14061515 std::vector DestBBs;
14711580
14721581 int64_t First = cast(FrontCase.Low)->getSExtValue();
14731582 int64_t Last = cast(BackCase.High)->getSExtValue();
1474 double Density = 0;
1583 double FMetric = 0;
14751584 CaseItr Pivot = CR.Range.first + Size/2;
14761585
14771586 // Select optimal pivot, maximizing sum density of LHS and RHS. This will
14831592
14841593 uint64_t LSize = FrontCase.size();
14851594 uint64_t RSize = TSize-LSize;
1595 DOUT << "Selecting best pivot: \n"
1596 << "First: " << First << ", Last: " << Last <<"\n"
1597 << "LSize: " << LSize << ", RSize: " << RSize << "\n";
14861598 for (CaseItr I = CR.Range.first, J=I+1, E = CR.Range.second;
14871599 J!=E; ++I, ++J) {
14881600 int64_t LEnd = cast(I->High)->getSExtValue();
14891601 int64_t RBegin = cast(J->Low)->getSExtValue();
1602 assert((RBegin-LEnd>=1) && "Invalid case distance");
14901603 double LDensity = (double)LSize / (double)((LEnd - First) + 1ULL);
14911604 double RDensity = (double)RSize / (double)((Last - RBegin) + 1ULL);
1492 if (Density < (LDensity + RDensity)) {
1605 double Metric = log(RBegin-LEnd)*(LDensity+RDensity);
1606 // Should always split in some non-trivial place
1607 DOUT <<"=>Step\n"
1608 << "LEnd: " << LEnd << ", RBegin: " << RBegin << "\n"
1609 << "LDensity: " << LDensity << ", RDensity: " << RDensity << "\n"
1610 << "Metric: " << Metric << "\n";
1611 if (FMetric < Metric) {
14931612 Pivot = J;
1494 Density = LDensity + RDensity;
1613 FMetric = Metric;
1614 DOUT << "Current metric set to: " << FMetric << "\n";
14951615 }
14961616
14971617 LSize += J->size();
14981618 RSize -= J->size();
14991619 }
1620 // If our case is dense we *really* should handle it earlier!
1621 assert((FMetric != 0) && "Should handle dense range earlier!");
15001622
15011623 CaseRange LHSR(CR.Range.first, Pivot);
15021624 CaseRange RHSR(Pivot, CR.Range.second);
15481670 return true;
15491671 }
15501672
1673 /// handleBitTestsSwitchCase - if current case range has few destination and
1674 /// range span less, than machine word bitwidth, encode case range into series
1675 /// of masks and emit bit tests with these masks.
1676 bool SelectionDAGLowering::handleBitTestsSwitchCase(CaseRec& CR,
1677 CaseRecVector& WorkList,
1678 Value* SV,
1679 MachineBasicBlock* Default) {
1680 unsigned IntPtrBits = getSizeInBits(TLI.getPointerTy());
1681
1682 Case& FrontCase = *CR.Range.first;
1683 Case& BackCase = *(CR.Range.second-1);
1684
1685 // Get the MachineFunction which holds the current MBB. This is used when
1686 // inserting any additional MBBs necessary to represent the switch.
1687 MachineFunction *CurMF = CurMBB->getParent();
1688
1689 unsigned numCmps = 0;
1690 for (CaseItr I = CR.Range.first, E = CR.Range.second;
1691 I!=E; ++I) {
1692 // Single case counts one, case range - two.
1693 if (I->Low == I->High)
1694 numCmps +=1;
1695 else
1696 numCmps +=2;
1697 }
1698
1699 // Count unique destinations
1700 SmallSet Dests;
1701 for (CaseItr I = CR.Range.first, E = CR.Range.second; I!=E; ++I) {
1702 Dests.insert(I->BB);
1703 if (Dests.size() > 3)
1704 // Don't bother the code below, if there are too much unique destinations
1705 return false;
1706 }
1707 DOUT << "Total number of unique destinations: " << Dests.size() << "\n"
1708 << "Total number of comparisons: " << numCmps << "\n";
1709
1710 // Compute span of values.
1711 Constant* minValue = FrontCase.Low;
1712 Constant* maxValue = BackCase.High;
1713 uint64_t range = cast(maxValue)->getSExtValue() -
1714 cast(minValue)->getSExtValue();
1715 DOUT << "Compare range: " << range << "\n"
1716 << "Low bound: " << cast(minValue)->getSExtValue() << "\n"
1717 << "High bound: " << cast(maxValue)->getSExtValue() << "\n";
1718
1719 if (range>IntPtrBits ||
1720 (!(Dests.size() == 1 && numCmps >= 3) &&
1721 !(Dests.size() == 2 && numCmps >= 5) &&
1722 !(Dests.size() >= 3 && numCmps >= 6)))
1723 return false;
1724
1725 DOUT << "Emitting bit tests\n";
1726 int64_t lowBound = 0;
1727
1728 // Optimize the case where all the case values fit in a
1729 // word without having to subtract minValue. In this case,
1730 // we can optimize away the subtraction.
1731 if (cast(minValue)->getSExtValue() >= 0 &&
1732 cast(maxValue)->getSExtValue() <= IntPtrBits) {
1733 range = cast(maxValue)->getSExtValue();
1734 } else {
1735 lowBound = cast(minValue)->getSExtValue();
1736 }
1737
1738 CaseBitsVector CasesBits;
1739 unsigned i, count = 0;
1740
1741 for (CaseItr I = CR.Range.first, E = CR.Range.second; I!=E; ++I) {
1742 MachineBasicBlock* Dest = I->BB;
1743 for (i = 0; i < count; ++i)
1744 if (Dest == CasesBits[i].BB)
1745 break;
1746
1747 if (i == count) {
1748 assert((count < 3) && "Too much destinations to test!");
1749 CasesBits.push_back(CaseBits(0, Dest, 0));
1750 count++;
1751 }
1752
1753 uint64_t lo = cast(I->Low)->getSExtValue() - lowBound;
1754 uint64_t hi = cast(I->High)->getSExtValue() - lowBound;
1755
1756 for (uint64_t j = lo; j <= hi; j++) {
1757 CasesBits[i].Mask |= 1 << j;
1758 CasesBits[i].Bits++;
1759 }
1760
1761 }
1762 std::sort(CasesBits.begin(), CasesBits.end(), CaseBitsCmp());
1763
1764 SelectionDAGISel::BitTestInfo BTC;
1765
1766 // Figure out which block is immediately after the current one.
1767 MachineFunction::iterator BBI = CR.CaseBB;
1768 ++BBI;
1769
1770 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
1771
1772 DOUT << "Cases:\n";
1773 for (unsigned i = 0, e = CasesBits.size(); i!=e; ++i) {
1774 DOUT << "Mask: " << CasesBits[i].Mask << ", Bits: " << CasesBits[i].Bits
1775 << ", BB: " << CasesBits[i].BB << "\n";
1776
1777 MachineBasicBlock *CaseBB = new MachineBasicBlock(LLVMBB);
1778 CurMF->getBasicBlockList().insert(BBI, CaseBB);
1779 BTC.push_back(SelectionDAGISel::BitTestCase(CasesBits[i].Mask,
1780 CaseBB,
1781 CasesBits[i].BB));
1782 }
1783
1784 SelectionDAGISel::BitTestBlock BTB(lowBound, range, SV,
1785 -1ULL, (CR.CaseBB == CurMBB),
1786 CR.CaseBB, Default, BTC);
1787
1788 if (CR.CaseBB == CurMBB)
1789 visitBitTestHeader(BTB);
1790
1791 BitTestCases.push_back(BTB);
1792
1793 return true;
1794 }
1795
1796
15511797 // Clusterify - Transform simple list of Cases into list of CaseRange's
15521798 unsigned SelectionDAGLowering::Clusterify(CaseVector& Cases,
15531799 const SwitchInst& SI) {
16321878 CaseRec CR = WorkList.back();
16331879 WorkList.pop_back();
16341880
1881 if (handleBitTestsSwitchCase(CR, WorkList, SV, Default))
1882 continue;
1883
16351884 // If the range has few cases (two or less) emit a series of specific
16361885 // tests.
16371886 if (handleSmallSwitchRange(CR, WorkList, SV, Default))
16381887 continue;
16391888
1640 // If the switch has more than 5 blocks, and at least 31.25% dense, and the
1889 // If the switch has more than 5 blocks, and at least 40% dense, and the
16411890 // target supports indirect branches, then emit a jump table rather than
16421891 // lowering the switch to a binary tree of conditional branches.
16431892 if (handleJTSwitchCase(CR, WorkList, SV, Default))
42434492 SwitchCases = SDL.SwitchCases;
42444493 JTCases.clear();
42454494 JTCases = SDL.JTCases;
4246
4495 BitTestCases.clear();
4496 BitTestCases = SDL.BitTestCases;
4497
42474498 // Make sure the root of the DAG is up-to-date.
42484499 DAG.setRoot(SDL.getRoot());
42494500 }
42924543 // Second step, emit the lowered DAG as machine code.
42934544 CodeGenAndEmitDAG(DAG);
42944545 }
4546
4547 DOUT << "Total amount of phi nodes to update: "
4548 << PHINodesToUpdate.size() << "\n";
4549 DEBUG(for (unsigned i = 0, e = PHINodesToUpdate.size(); i != e; ++i)
4550 DOUT << "Node " << i << " : (" << PHINodesToUpdate[i].first
4551 << ", " << PHINodesToUpdate[i].second << ")\n";);
42954552
42964553 // Next, now that we know what the last MBB the LLVM BB expanded is, update
42974554 // PHI nodes in successors.
4298 if (SwitchCases.empty() && JTCases.empty()) {
4555 if (SwitchCases.empty() && JTCases.empty() && BitTestCases.empty()) {
42994556 for (unsigned i = 0, e = PHINodesToUpdate.size(); i != e; ++i) {
43004557 MachineInstr *PHI = PHINodesToUpdate[i].first;
43014558 assert(PHI->getOpcode() == TargetInstrInfo::PHI &&
43054562 }
43064563 return;
43074564 }
4308
4565
4566 for (unsigned i = 0, e = BitTestCases.size(); i != e; ++i) {
4567 // Lower header first, if it wasn't already lowered
4568 if (!BitTestCases[i].Emitted) {
4569 SelectionDAG HSDAG(TLI, MF, getAnalysisToUpdate());
4570 CurDAG = &HSDAG;
4571 SelectionDAGLowering HSDL(HSDAG, TLI, FuncInfo);
4572 // Set the current basic block to the mbb we wish to insert the code into
4573 BB = BitTestCases[i].Parent;
4574 HSDL.setCurrentBasicBlock(BB);
4575 // Emit the code
4576 HSDL.visitBitTestHeader(BitTestCases[i]);
4577 HSDAG.setRoot(HSDL.getRoot());
4578 CodeGenAndEmitDAG(HSDAG);
4579 }
4580
4581 for (unsigned j = 0, ej = BitTestCases[i].Cases.size(); j != ej; ++j) {
4582 SelectionDAG BSDAG(TLI, MF, getAnalysisToUpdate());
4583 CurDAG = &BSDAG;
4584 SelectionDAGLowering BSDL(BSDAG, TLI, FuncInfo);
4585 // Set the current basic block to the mbb we wish to insert the code into
4586 BB = BitTestCases[i].Cases[j].ThisBB;
4587 BSDL.setCurrentBasicBlock(BB);
4588 // Emit the code
4589 if (j+1 != ej)
4590 BSDL.visitBitTestCase(BitTestCases[i].Cases[j+1].ThisBB,
4591 BitTestCases[i].Reg,
4592 BitTestCases[i].Cases[j]);
4593 else
4594 BSDL.visitBitTestCase(BitTestCases[i].Default,
4595 BitTestCases[i].Reg,
4596 BitTestCases[i].Cases[j]);
4597
4598
4599 BSDAG.setRoot(BSDL.getRoot());
4600 CodeGenAndEmitDAG(BSDAG);
4601 }
4602
4603 // Update PHI Nodes
4604 for (unsigned pi = 0, pe = PHINodesToUpdate.size(); pi != pe; ++pi) {
4605 MachineInstr *PHI = PHINodesToUpdate[pi].first;
4606 MachineBasicBlock *PHIBB = PHI->getParent();
4607 assert(PHI->getOpcode() == TargetInstrInfo::PHI &&
4608 "This is not a machine PHI node that we are updating!");
4609 // This is "default" BB. We have two jumps to it. From "header" BB and
4610 // from last "case" BB.
4611 if (PHIBB == BitTestCases[i].Default) {
4612 PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
4613 PHI->addMachineBasicBlockOperand(BitTestCases[i].Parent);
4614 PHI->addMachineBasicBlockOperand(BitTestCases[i].Cases.back().ThisBB);
4615 }
4616 // One of "cases" BB.
4617 for (unsigned j = 0, ej = BitTestCases[i].Cases.size(); j != ej; ++j) {
4618 MachineBasicBlock* cBB = BitTestCases[i].Cases[j].ThisBB;
4619 if (cBB->succ_end() !=
4620 std::find(cBB->succ_begin(),cBB->succ_end(), PHIBB)) {
4621 PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
4622 PHI->addMachineBasicBlockOperand(cBB);
4623 }
4624 }
4625 }
4626 }
4627
43094628 // If the JumpTable record is filled in, then we need to emit a jump table.
43104629 // Updating the PHI nodes is tricky in this case, since we need to determine
43114630 // whether the PHI is a successor of the range check MBB or the jump table MBB
43224641 HSDL.visitJumpTableHeader(JTCases[i].second, JTCases[i].first);
43234642 HSDAG.setRoot(HSDL.getRoot());
43244643 CodeGenAndEmitDAG(HSDAG);
4325 }
4644 }
43264645
43274646 SelectionDAG JSDAG(TLI, MF, getAnalysisToUpdate());
43284647 CurDAG = &JSDAG;
43414660 MachineBasicBlock *PHIBB = PHI->getParent();
43424661 assert(PHI->getOpcode() == TargetInstrInfo::PHI &&
43434662 "This is not a machine PHI node that we are updating!");
4663 // "default" BB. We can go there only from header BB.
43444664 if (PHIBB == JTCases[i].second.Default) {
43454665 PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
43464666 PHI->addMachineBasicBlockOperand(JTCases[i].first.HeaderBB);
43474667 }
4668 // JT BB. Just iterate over successors here
43484669 if (BB->succ_end() != std::find(BB->succ_begin(),BB->succ_end(), PHIBB)) {
43494670 PHI->addRegOperand(PHINodesToUpdate[pi].second, false);
43504671 PHI->addMachineBasicBlockOperand(BB);
11 ; RUN: llvm-as < %s | llc | grep jmp | wc -l | grep 0
22 ; PR 1200
33
4 ; ModuleID = 'bugpoint.test.bc'
4 ; ModuleID = ''
55 target datalayout = "e-p:32:32"
66 target triple = "i686-apple-darwin8"
77 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
2424 @outfile = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
2525 @str1 = external global [11 x i8] ; <[11 x i8]*> [#uses=1]
2626
27
2827 declare i32 @fprintf(%struct.FILE*, i8*, ...)
2928
3029 define i16 @main_bb_2E_i9_2E_i_2E_i932_2E_ce(%struct.list* %l_addr.01.0.i2.i.i929, %struct.operator** %tmp66.i62.i.out) {
3130 newFuncRoot:
3231 br label %bb.i9.i.i932.ce
3332
34 bb36.i.i.exitStub: ; preds = %bb.i9.i.i932.ce
33 NewDefault: ; preds = %LeafBlock, %LeafBlock1, %LeafBlock2, %LeafBlock3
34 br label %bb36.i.i.exitStub
35
36 bb36.i.i.exitStub: ; preds = %NewDefault
3537 store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
3638 ret i16 0
3739
38 bb.i14.i.exitStub: ; preds = %bb.i9.i.i932.ce
40 bb.i14.i.exitStub: ; preds = %LeafBlock
3941 store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
4042 ret i16 1
4143
42 bb12.i.i935.exitStub: ; preds = %bb.i9.i.i932.ce
44 bb12.i.i935.exitStub: ; preds = %LeafBlock1
4345 store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
4446 ret i16 2
4547
46 bb20.i.i937.exitStub: ; preds = %bb.i9.i.i932.ce
48 bb20.i.i937.exitStub: ; preds = %LeafBlock2
4749 store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
4850 ret i16 3
4951
50 bb28.i.i938.exitStub: ; preds = %bb.i9.i.i932.ce
52 bb28.i.i938.exitStub: ; preds = %LeafBlock3
5153 store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
5254 ret i16 4
5355
6062 %tmp3.i8.i = load %struct.FILE** @outfile ; <%struct.FILE*> [#uses=1]
6163 %tmp5.i9.i = call i32 (%struct.FILE*, i8*, ...)* @fprintf( %struct.FILE* %tmp3.i8.i, i8* getelementptr ([11 x i8]* @str1, i32 0, i32 0), i32 %tmp2.i7.i ) ; [#uses=0]
6264 %tmp7.i10.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 5 ; [#uses=1]
63 %tmp8.i11.i = load i32* %tmp7.i10.i ; [#uses=1]
64 switch i32 %tmp8.i11.i, label %bb36.i.i.exitStub [
65 i32 -1, label %bb.i14.i.exitStub
66 i32 0, label %bb12.i.i935.exitStub
67 i32 1, label %bb20.i.i937.exitStub
68 i32 2, label %bb28.i.i938.exitStub
69 ]
65 %tmp8.i11.i = load i32* %tmp7.i10.i ; [#uses=7]
66 br label %NodeBlock5
67
68 NodeBlock5: ; preds = %bb.i9.i.i932.ce
69 icmp slt i32 %tmp8.i11.i, 1 ; :0 [#uses=1]
70 br i1 %0, label %NodeBlock, label %NodeBlock4
71
72 NodeBlock4: ; preds = %NodeBlock5
73 icmp slt i32 %tmp8.i11.i, 2 ; :1 [#uses=1]
74 br i1 %1, label %LeafBlock2, label %LeafBlock3
75
76 LeafBlock3: ; preds = %NodeBlock4
77 icmp eq i32 %tmp8.i11.i, 2 ; :2 [#uses=1]
78 br i1 %2, label %bb28.i.i938.exitStub, label %NewDefault
79
80 LeafBlock2: ; preds = %NodeBlock4
81 icmp eq i32 %tmp8.i11.i, 1 ; :3 [#uses=1]
82 br i1 %3, label %bb20.i.i937.exitStub, label %NewDefault
83
84 NodeBlock: ; preds = %NodeBlock5
85 icmp slt i32 %tmp8.i11.i, 0 ; :4 [#uses=1]
86 br i1 %4, label %LeafBlock, label %LeafBlock1
87
88 LeafBlock1: ; preds = %NodeBlock
89 icmp eq i32 %tmp8.i11.i, 0 ; :5 [#uses=1]
90 br i1 %5, label %bb12.i.i935.exitStub, label %NewDefault
91
92 LeafBlock: ; preds = %NodeBlock
93 icmp eq i32 %tmp8.i11.i, -1 ; :6 [#uses=1]
94 br i1 %6, label %bb.i14.i.exitStub, label %NewDefault
7095 }
0 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$7 | wc -l | grep 1 &&
11 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$6 | wc -l | grep 1 &&
22 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1024 | wc -l | grep 1 &&
3 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1023 | wc -l | grep 1 &&
4 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep jg | wc -l | grep 1 &&
5 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep jb | wc -l | grep 1 &&
6 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep jae | wc -l | grep 1 &&
3 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep jb | wc -l | grep 2 &&
74 ; RUN: llvm-as < %s | llc -march=x86 -o - | grep je | wc -l | grep 1
85
96 define i32 @main(i32 %tmp158) {