llvm.org GIT mirror llvm / 40dee51
Implement the new varargs instructions and intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9316 91177308-0d34-0410-b5e6-96231b3b80d8 Vikram S. Adve 16 years ago
1 changed file(s) with 23 addition(s) and 25 deletion(s). Raw diff Collapse all Expand all
14141414 {
14151415 switch (iid) {
14161416 case LLVMIntrinsic::va_start: {
1417 // FIXME: this needs to be updated!
1418 abort();
1419
1420 // Get the address of the first vararg value on stack and copy it to
1421 // the argument of va_start(va_list* ap).
1417 // Get the address of the first incoming vararg argument on the stack
14221418 bool ignore;
14231419 Function* func = cast(callInstr.getParent()->getParent());
14241420 int numFixedArgs = func->getFunctionType()->getNumParams();
14271423 int firstVarArgOff = numFixedArgs * argSize + target.getFrameInfo().
14281424 getFirstIncomingArgOffset(MachineFunction::get(func), ignore);
14291425 mvec.push_back(BuildMI(V9::ADDi, 3).addMReg(fpReg).addSImm(firstVarArgOff).
1430 addRegDef(callInstr.getOperand(1)));
1426 addRegDef(&callInstr));
14311427 return true;
14321428 }
14331429
14351431 return true; // no-op on Sparc
14361432
14371433 case LLVMIntrinsic::va_copy:
1438 // FIXME: this needs to be updated!
1439 abort();
1440
1441 // Simple copy of current va_list (arg2) to new va_list (arg1)
1434 // Simple copy of current va_list (arg1) to new va_list (result)
14421435 mvec.push_back(BuildMI(V9::ORr, 3).
14431436 addMReg(target.getRegInfo().getZeroRegNum()).
1444 addReg(callInstr.getOperand(2)).
1445 addReg(callInstr.getOperand(1)));
1437 addReg(callInstr.getOperand(1)).
1438 addRegDef(&callInstr));
14461439 return true;
14471440
14481441 case LLVMIntrinsic::sigsetjmp:
28412834 case 64: // reg: Phi(reg,reg)
28422835 break; // don't forward the value
28432836
2844 case 65: // reg: VANext(reg): the va_next instruction
2837 case 65: // reg: VANext(reg): the va_next(va_list, type) instruction
2838 { // Increment the va_list pointer register according to the type.
2839 // All LLVM argument types are <= 64 bits, so use one doubleword.
2840 Instruction* vaNextI = subtreeRoot->getInstruction();
2841 assert(target.getTargetData().getTypeSize(vaNextI->getType()) <= 8 &&
2842 "We assumed that all LLVM parameter types <= 8 bytes!");
2843 int argSize = target.getFrameInfo().getSizeOfEachArgOnStack();
2844 mvec.push_back(BuildMI(V9::ADDi, 3).addReg(vaNextI->getOperand(0)).
2845 addSImm(argSize).addRegDef(vaNextI));
2846 }
2847
28452848 case 66: // reg: VAArg (reg): the va_arg instruction
2846 {
2847 abort(); // FIXME: This is incorrect!
2848 #if 0
2849 // Use value initialized by va_start as pointer to args on the stack.
2850 // Load argument via current pointer value, then increment pointer.
2851 int argSize = target.getFrameInfo().getSizeOfEachArgOnStack();
2849 { // Load argument from stack using current va_list pointer value.
2850 // Use 64-bit load for all non-FP args, and LDDF or double for FP.
28522851 Instruction* vaArgI = subtreeRoot->getInstruction();
2853 MachineOpCode loadOp = vaArgI->getType()->isFloatingPoint()? V9::LDDFi
2854 : V9::LDXi;
2852 MachineOpCode loadOp = (vaArgI->getType()->isFloatingPoint()
2853 ? (vaArgI->getType() == Type::FloatTy
2854 ? V9::LDFi : V9::LDDFi)
2855 : V9::LDXi);
28552856 mvec.push_back(BuildMI(loadOp, 3).addReg(vaArgI->getOperand(0)).
28562857 addSImm(0).addRegDef(vaArgI));
2857 mvec.push_back(BuildMI(V9::ADDi, 3).addReg(vaArgI->getOperand(0)).
2858 addSImm(argSize).addRegDef(vaArgI->getOperand(0)));
2859 break;
2860 #endif
2858 break;
28612859 }
28622860
28632861 case 71: // reg: VReg