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Merging r251622: ------------------------------------------------------------------------ r251622 | vkalintiris | 2015-10-29 10:17:16 +0000 (Thu, 29 Oct 2015) | 17 lines [mips] Check the register class before replacing materializations of zero with $zero in microMIPS. Summary: The microMIPS register class GPRMM16 does not contain the $zero register. However, MipsSEDAGToDAGISel::replaceUsesWithZeroReg() would replace uses of the $dst register: [d]addiu, $dst, $zero, 0 with the $zero register, without checking for membership in the register class of the target machine operand. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13984 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@252158 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 3 years ago
2 changed file(s) with 13 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
112112
113113 // Do not replace if it is a phi's operand or is tied to def operand.
114114 if (MI->isPHI() || MI->isRegTiedToDefOperand(OpNo) || MI->isPseudo())
115 continue;
116
117 // Also, we have to check that the register class of the operand
118 // contains the zero register.
119 if (!MRI->getRegClass(MO.getReg())->contains(ZeroReg))
115120 continue;
116121
117122 MO.setReg(ZeroReg);
0 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips,+nooddspreg -O0 < %s | FileCheck %s
1
2 ; CHECK: addiu $[[R0:[0-9]+]], $zero, 0
3 ; CHECK: subu16 $2, $[[R0]], ${{[0-9]+}}
4 define i32 @foo() {
5 %1 = sub i32 0, undef
6 ret i32 %1
7 }