llvm.org GIT mirror llvm / 40a627d
Move some calls to getVRegDef higher in the callgraph, so they don't get executed as frequently in performance sensitive code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46027 91177308-0d34-0410-b5e6-96231b3b80d8 Owen Anderson 12 years ago
2 changed file(s) with 15 addition(s) and 13 deletion(s). Raw diff Collapse all Expand all
302302 /// register.
303303 VarInfo &getVarInfo(unsigned RegIdx);
304304
305 void MarkVirtRegAliveInBlock(unsigned reg, MachineBasicBlock *BB);
306 void MarkVirtRegAliveInBlock(unsigned reg, MachineBasicBlock *BB,
305 void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
306 MachineBasicBlock *BB);
307 void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
308 MachineBasicBlock *BB,
307309 std::vector &WorkList);
308310 void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
309311 MachineInstr *MI);
111111 return false;
112112 }
113113
114 void LiveVariables::MarkVirtRegAliveInBlock(unsigned reg,
114 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
115 MachineBasicBlock *DefBlock,
115116 MachineBasicBlock *MBB,
116117 std::vector &WorkList) {
117118 unsigned BBNum = MBB->getNumber();
118
119 VarInfo& VRInfo = getVarInfo(reg);
120119
121120 // Check to see if this basic block is one of the killing blocks. If so,
122121 // remove it...
126125 break;
127126 }
128127
129 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
130 if (MBB == MRI.getVRegDef(reg)->getParent()) return; // Terminate recursion
128 if (MBB == DefBlock) return; // Terminate recursion
131129
132130 if (VRInfo.AliveBlocks[BBNum])
133131 return; // We already know the block is live
140138 WorkList.push_back(*PI);
141139 }
142140
143 void LiveVariables::MarkVirtRegAliveInBlock(unsigned reg,
141 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
142 MachineBasicBlock *DefBlock,
144143 MachineBasicBlock *MBB) {
145144 std::vector WorkList;
146 MarkVirtRegAliveInBlock(reg, MBB, WorkList);
145 MarkVirtRegAliveInBlock(VRInfo, DefBlock, MBB, WorkList);
147146 while (!WorkList.empty()) {
148147 MachineBasicBlock *Pred = WorkList.back();
149148 WorkList.pop_back();
150 MarkVirtRegAliveInBlock(reg, Pred, WorkList);
149 MarkVirtRegAliveInBlock(VRInfo, DefBlock, Pred, WorkList);
151150 }
152151 }
153152
189188 // Update all dominating blocks to mark them known live.
190189 for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(),
191190 E = MBB->pred_end(); PI != E; ++PI)
192 MarkVirtRegAliveInBlock(reg, *PI);
191 MarkVirtRegAliveInBlock(VRInfo, MRI.getVRegDef(reg)->getParent(), *PI);
193192 }
194193
195194 bool LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
431430 bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
432431 MF = &mf;
433432 RegInfo = MF->getTarget().getRegisterInfo();
433 MachineRegisterInfo& MRI = mf.getRegInfo();
434434 assert(RegInfo && "Target doesn't have register information?");
435435
436436 ReservedRegisters = RegInfo->getReservedRegs(mf);
522522 for (SmallVector::iterator I = VarInfoVec.begin(),
523523 E = VarInfoVec.end(); I != E; ++I) {
524524 // Only mark it alive only in the block we are representing.
525 MarkVirtRegAliveInBlock(*I, MBB);
525 MarkVirtRegAliveInBlock(getVarInfo(*I), MRI.getVRegDef(*I)->getParent(),
526 MBB);
526527 }
527528 }
528529
559560 // Convert and transfer the dead / killed information we have gathered into
560561 // VirtRegInfo onto MI's.
561562 //
562 MachineRegisterInfo& MRI = mf.getRegInfo();
563563 for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i)
564564 for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) {
565565 if (VirtRegInfo[i].Kills[j] == MRI.getVRegDef(i +